Abstract: A multi-layer ceramic capacitor is constituted by ceramic dielectric layers alternately laminated with conductive layers, wherein the ceramic dielectric layers are sintered in such a way that core-shell grains having a core-shell structure are mixed with uniform solid-solution grains resulting from uniform progression of the solid solution process. Such multi-layer ceramic capacitor is characterized in that the area ratio of the core-shell grains to all sintered grains constituting the ceramic dielectric layer is 5 to 15% and that the average grain size of all sintered grains including the core-shell grains and uniform solid-solution grains is 0.3 to 0.5 ?m.

Abstract: There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA1/CA1) of MA1 to CA1 is between 0.07 and 0.20, wherein CA1 represents an area of the multilayer body in a cross section of the multilayer body taken in a length and thickness direction, and MA1 represents an area of a first margin part in the cross section of the multilayer body taken in the length and thickness direction, the first margin part being a portion of the multilayer body, other than a first capacitance forming part thereof in which the first and second inner electrodes overlap in the thickness direction.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic body including a dielectric layer; a plurality of internal electrodes disposed to face each other within the ceramic body, having the dielectric layer interposed therebetween; and external electrodes electrically connected to the internal electrodes, wherein the ceramic body includes an active layer corresponding to a capacitance forming part and a cover layer formed on at least one of an upper surface and a lower surface of the active layer and corresponding to a non-capacitance forming part, an average thickness of the cover layer is 15 ?m or less, the external electrodes include a conductive metal and a glass, and when an area of the external electrodes occupied by the glass is A and an area thereof occupied by the conductive metal is B, 0.05?A/B?0.6 is satisfied.

Abstract: A capacitor forming unit according to one embodiment includes a dielectric plate with a plurality of through holes; a first conductor film formed on an upper surface of the dielectric plate; a first insulator film formed on the front end portion of the upper surface of the dielectric plate; a second conductor film formed on a lower surface of the dielectric plate; a second insulator film formed on the rear end portion of the lower surface of the dielectric plate; first electrode rods disposed in some of the through holes; and second electrode rods disposed in the remaining through holes where the first electrode rods are not disposed. The first electrodes are electrically connected to the first conductor film and electrically insulated from the second conductor film. The second electrode rods are electrically connected to the second conductor film and are electrically insulated from the first conductor film.

Abstract: A laminated ceramic capacitor having high electrostatic capacitance and excellent lifetime characteristics, even when in a high electric field intensity employs a dielectric ceramic including crystal grains and crystal grain boundaries which contains, as its main constituent, a perovskite-type compound including Ba, Ca, and Ti, and further contains Mg, R (Y, La, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and/or Yb), and Zr, such that when the laminated body is dissolved, the contents in terms of parts by mol are Ca: 3 to 15 parts by mol, Mg: 0.01 to 0.09 parts by mol, R: 2.5 to 8.4 parts by mol, and Zr: 0.05 to 3.0 parts by mol with respect to 100 parts by mol of Ti, and there is Ca at least at the centers of the crystal grains.

Abstract: There are disclosed a multilayer ceramic capacitor and a method of manufacturing the same. The multilayer ceramic capacitor includes: a ceramic body having a first side and a second side opposed to each other and having a third side and a fourth side connecting the first side to the second side, a plurality of inner electrodes formed within the ceramic body, and outer electrodes formed on the third side and the fourth side and electrically connected to the inner electrodes. A distance from distal edges of the inner electrodes to the first side or the second side of the ceramic body is 30 ?m or less.

Abstract: Disclosed are a multilayer ceramic condenser and a method for manufacturing the same. There is provided a multilayer ceramic condenser including: a multilayer main body in which a plurality of dielectric layers including a first side, a second side, a third side, and a fourth side are stacked; a first cover layer and a second cover layer forming the plurality of dielectric layers; a first dielectric layer disposed between the first cover layer and the second cover layer and printed with a first inner electrode pattern drawn to the first side; a second dielectric layer alternately stacked with the first dielectric layer and printed with a second inner electrode pattern drawn to the third side; and a first side portion and a second side portion each formed on the second side and the fourth side opposite to each other.

Abstract: There is provided a chip type laminated capacitor, including: a ceramic body including a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 ?m or less; first and second outer electrodes formed on both ends of the ceramic body in a length direction; first and second band parts formed to extend inwardly of the ceramic body in the length direction on a length-width (L-W) plane from the first and second outer electrodes and having different lengths; and third and fourth band parts formed to extend inwardly of the ceramic body in the length direction on a length-thickness (L-T) plane from the first and second outer electrodes and having different lengths.

Abstract: Two or more outer-layer dummy conductors are successively arranged at predetermined intervals in the height direction, thereby forming a plurality of outer-layer dummy groups. Given that an interval between the adjacent outer-layer dummy conductors within each of the outer-layer dummy groups is d and an interval between the adjacent outer-layer dummy groups is g, g is greater than d. On that condition, the outer-layer dummy groups can be positioned satisfactorily apart away from each other, while plating deposition points are ensured. As a result, pressing of inner electrodes through the outer-layer dummy conductors can be relieved, whereby the distance between the inner electrodes can be prevented from being locally shortened and a reduction of BDV can be prevented.

Abstract: A region where a plating film constituting an external electrode is formed can be accurately controlled in an electronic component in which the external electrode is formed by directly plating a particular region in a surface of a component body. In a component body, a bump is provided in a position in which a region where an external electrode should be formed is partitioned. In a plating process, growth of the plating film constituting the external electrode is substantially stopped or delayed in the bump. As a result, a termination point of the growth of the plating film constituting the external electrode can be accurately controlled in the position of the bump.

Abstract: There is provided a high voltage and high capacitance multilayer ceramic electronic component having enhanced reliability, including: a ceramic body; a first layer including conductive patterns; and a second layer including a floating pattern, wherein the sum of the number of the first and second layers is 100 or more, the ceramic body has first and second external electrodes formed on outer surfaces thereof, and a ratio of a length of the floating pattern to a length of the ceramic body is 0.7 to 0.9, and a ratio of a length of the overlapped portion to the length of the floating pattern is 0.5 to 0.95, in a cross section taken in a length direction in which the first and second external electrodes are connected to and extended from the ceramic body and a stacking direction of the first and second layers.

Abstract: An electronic component includes a ceramic sintered body, and a plurality of first and second inner electrodes alternately arranged inside the ceramic sintered body to be opposed to each other in a third direction with a ceramic layer interposed between the adjacent first and second inner electrodes. The first and second inner electrodes are each arranged to be exposed to a third or fourth surface without being exposed to fifth and sixth surfaces. Heterogeneous regions, which include solid solutions of metals included in the first and second inner electrodes and the ceramic sintered body, are arranged continuously in opposite end portions of the ceramic sintered body in a first direction to extend from one side end to an opposite side end of a region where the first and second inner electrodes are disposed in a third direction.

Abstract: A multilayer ceramic electronic component that is small, that has high electrical strength, and that is resistant to separation between ceramic layers includes a ceramic sintered body having a substantially rectangular parallelepiped shape and a plurality of first and second internal electrodes. The plurality of first and second internal electrodes are alternately arranged so as to face each other. The first and second internal electrodes are parallel or substantially parallel to first and second major surfaces. The first and second internal electrodes are exposed to at least one of the fifth and sixth surfaces and are not exposed to the third or fourth surface. No bends exist in any of the ends of each of the first and second internal electrodes adjacent to the third and fourth surfaces.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body having dielectric layers laminated in a width direction thereof; an active region in which capacitance is formed, by including first and second internal electrodes alternately exposed to end surfaces of the ceramic body while having the dielectric layer interposed therebetween; an upper margin part prepared above the active region; a lower margin part prepared below the active region on the dielectric layer and being thicker than the upper margin part; and first and second external electrodes, wherein, when half of thickness of the ceramic body is denoted by A, thickness of the lower margin part is denoted by B, half of thickness of the active region is denoted by C, and thickness of the upper margin part is denoted by D, 1.047?(B+C)/A?1.562 is satisfied.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body in which a plurality of dielectric layers are laminated; a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body with the dielectric layer interposed therebetween; and first and second external electrodes formed on both end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, wherein when it is defined that a thickness of a band of the first and second external electrodes is T1 and a thickness of the ceramic body is T2, a ratio (T1/T2) of the thickness of the band of the first or second external electrode to the thickness of the ceramic body is equal to or less than 0.18.

Abstract: There are provided a multilayer ceramic electronic component, and a method of fabricating the same. The multilayer ceramic electronic component includes: a ceramic main body including a dielectric layer; first and second internal electrodes disposed to face each other within the ceramic main body; and a first external electrode and a second external electrode, wherein the first and second external electrodes include a conductive metal and glass, and when at least one of the first and second external electrodes is divided into three equal parts in a thickness direction, an area of the glass in a central part thereof is 35% to 80% of the total area of the central part. A multilayer ceramic electronic component having improved reliability may be implemented by enhancing chip air-tightness.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body; an active layer including a plurality of electrodes formed to be alternately exposed to both end surfaces of the ceramic body; an upper cover layer; a lower cover layer having a thickness greater than that of the upper cover layer; and external electrodes, wherein when a distance from an end portion of the lowermost internal electrode of the active layer to an end portion of the external electrode covering a portion of a lower surface of the ceramic body is E, the shortest distance from the end portion of the external electrode to the lowermost internal electrode of the active layer is T, and a margin of the ceramic body in the length direction is F, 1.2?E/T and 30 ?m?F are satisfied.

Abstract: A capacitor assembly with a substrate having a first face and a second face. A multiplicity of capacitors are mounted on the first face wherein each capacitor has a first lead and a second lead of opposite polarity to the first lead. A bridge is in electrical contact with multiple first leads. A tree is in electrical contact with the bridge wherein the tree passes through a via of the substrate and is in electrical contact with a first trace of the second face. A second trace is on the second face wherein the second lead is in electrical contact with the second trace.

Abstract: There are provided a ceramic sheet product for a ceramic electronic component, a multilayer ceramic electronic component using the same, and a method of manufacturing the multilayer ceramic electronic component. The ceramic sheet product for a ceramic electronic component includes a ceramic layer; a metal layer formed on the ceramic layer; and metal nanostructures contacting the metal layer and protruding from the metal layer to an inner portion of the ceramic layer. With the multilayer ceramic electronic component using the ceramic sheet product for a ceramic electronic component, an interval between electrodes is reduced to thereby allow for the increase of capacitance, whereby a multilayer ceramic electronic component having high capacitance may be provided.

Abstract: In an electronic component and a substrate module, a laminated body includes a first capacitor conductor and a second capacitor conductor embedded therein, which define a capacitor. First and second external electrodes are connected to the first capacitor conductor and the second capacitor conductor through extraction conductors, respectively. Third and fourth external electrodes are connected to the first capacitor conductor through extraction conductors. Fifth and sixth external electrodes are connected to the second capacitor conductor through extraction conductors. On a first side surface, no external electrode having an electrical potential different from the electrical potential of the third external electrode is provided between a first end surface and the third external electrode.

Abstract: [Object] To provide a capacitor in which generation of warpage of a laminate can be prevented. [Solution] A capacitor 1 includes a laminate 2 in which a plurality of dielectric layers 6 are laminated, an inner electrode 3 disposed between the dielectric layers 6 of the laminate 2, an outer electrode 4 that is disposed on an end face of the laminate 2 so as to be connected to the inner electrode 3 and that has an extending portion 4A extending to a first main surface 2A of the laminate 2, and an underlying layer 5 including a base 5a disposed between the extending portion 4A and the first main surface 2A and metal particles 5b that are contained in the base 5a and that are joined to the outer electrode 4. With this structure, it is possible to provide a capacitor 1 in which warpage is not easily generated in the laminate 2 during sintering.

Abstract: There are provided a ceramic electronic component and a method of manufacturing the same. The ceramic electronic component includes: a ceramic element; and an internal electrode layer formed within the ceramic element, having a thickness of 0.5 ?m or less, and including a non-electrode region formed therein, wherein an area ratio of the non-electrode region to an electrode region of the internal electrode layer, in a cross section of the internal electrode layer is between 0.1% and 10%, and the non-electrode region includes a ceramic component.

Abstract: An electrical component includes a ceramic base body. The ceramic base body includes several ceramic layers including a function layer and a composite layer bordering the function layer. The composite layer can include a zirconium oxide-glass filler mixture.

Abstract: A multi-layer ceramic capacitor (MLCC) device includes a ceramic chip having electrically conductive layers embedded within the chip that form one or more capacitors connected by one or more vias to one or more upwardly facing wire-bondable pads on the top side of the device. One embodiment includes electrically conductive layers that form at least two stacked capacitors connected by vias to multiple upwardly facing wire-bondable pads on the top side, whereby the MLCC device has a reduced footprint while avoiding solder fillets. The wire-bondable pads may lie in a common plane or be pyramidally stepped. Metallization on the PCB-facing bottom side and at least one of the ends of the ceramic chip of another embodiment forms a downwardly facing capacitor terminal.

Abstract: A method for manufacturing a multilayer ceramic electronic component significantly reduces and prevents swelling or distortion when a conductive paste is applied to a green ceramic element body. A ceramic green sheet used in the method satisfies 180.56?A/B wherein A is a polymerization degree of an organic binder contained in the ceramic green sheet, and B is a volume content of a plasticizer contained in the ceramic green sheet.

Abstract: There are provided a multilayer ceramic capacitor and a manufacturing method thereof, the multilayer ceramic capacitor including: a ceramic body; first and second internal electrodes; first and second external electrodes; and a first insulating layer

Abstract: There is provided a multilayered ceramic electronic component including: a ceramic body including dielectric layers; internal electrodes disposed to face each other, having the dielectric layer therebetween; and external electrodes formed at an outer side of the ceramic body and respectively electrically connected to the internal electrodes, wherein the internal electrodes include a single ceramic layer therein. The disconnection generated by a difference in contraction and extension rates due to a difference in the sintering temperature between the internal electrodes and the dielectric is prevented and the electrode connectivity and the coverage are maintained, whereby the high capacitance multilayered ceramic electronic component having excellent reliability may be implemented.

Abstract: There is provided a multilayered ceramic electronic component including: a ceramic body including a dielectric layer and having first and second side surfaces; first and second internal electrodes having an overlapping region provided in the ceramic body, forming a capacitance forming area exposed to the first side surface, the first internal electrode having a first lead-out portion, and the second internal electrode being insulated from the first internal electrode and having a second lead-out portion; a first external electrode connected to the first lead-out portion and a second external electrode connected to the second lead-out portion; and an insulating layer formed on the first side surface, wherein the first and second external electrodes further include non-conductive layers formed on outer surfaces thereof.

Abstract: A multilayer ceramic electronic component includes: a ceramic body including dielectric layers; an oxide film formed on one surface of the ceramic body; first and second external electrodes formed on both sides of the oxide film on one surface of the ceramic body; a first internal electrode formed on the dielectric layer and including a first electrode lead-out portion exposed to the first external electrode and a first insulating lead-out portion exposed to the oxide film and having a composite-metal-oxide region formed in an exposed edge portion thereof; a second internal electrode facing the first internal electrode, having the dielectric layer interposed therebetween, and including a second electrode lead-out portion exposed to the second external electrode and a second insulating lead-out portion exposed to the oxide film, having a composite-metal-oxide region formed in an exposed edge portion thereof, and overlapped with the first insulating lead-out portion to form additional capacitance.

Abstract: A ceramic multilayer surface-mount capacitor with inherent crack mitigation void patterning to channel flex cracks into a safe zone, thereby negating any electrical failures.

Abstract: There is provided a multilayered chip electronic component including: a ceramic body including internal electrodes and dielectric layers; external electrodes covering both end surfaces of the ceramic body in a length direction; first plating layers forming the external electrodes and formed on outer surfaces of the ceramic body; non-conductive layers formed on outer side surfaces of the first plating layers; and second plating layers formed on regions of the first plating layers except for the non-conductive layers.

Abstract: A ceramic electronic component with metal terminals comprising a chip component formed with terminal electrodes at both ends, and a pair of metal terminals comprising a flat plate portion having a flat plate portion facing face provided so that it faces an end face of said chip component and connected to said terminal electrodes via a joining portion , and a mounting portion connected to one end portion of said flat plate portion and extending approximately perpendicular to said flat plate portion, wherein said mounting portion has a mounting portion bottom face forming an angle of approximately 270 degrees with respect to said flat plate portion, and a mounting portion upper face forming an angle of approximately 90 degrees with respect to said flat plate portion, and a solder adhering prevention area having lower wettability than said mounting portion bottom face is formed.

Abstract: There is provided a method of manufacturing a multilayer ceramic electronic component including: preparing a ceramic body including internal electrodes; forming electrode layers including at least one conductive metal selected from a group consisting of copper (Cu), silver (Ag), palladium (Pd), and platinum (Pt), an alloy thereof, or a coating material and electrically connected to the internal electrodes on external surfaces of the ceramic body; forming nickel (Ni) layers on external surfaces of the electrode layers by a firing method; and forming tin (Sn) layers on external surfaces of the nickel (Ni) layers by a firing method.

Abstract: There are provided a multi-layered ceramic electronic component and a method of manufacturing the same. The multi-layered ceramic electronic component includes: a ceramic body; internal electrodes formed within the ceramic body and including non-electrode regions formed therein; and external electrodes formed on ends of the ceramic body and electrically connected to the internal electrodes, wherein in a cross section of the internal electrode, 70% or more of the non-electrode regions are distributed in a region formed between points inwardly spaced apart from each of the upper and lower boundary surfaces of the internal electrodes by 5%.

Abstract: Provided is a package type multi-layer thin film capacitor for large capacitance, including: a ceramic sintered body formed with slots on one side and another side thereof, respectively; a plurality of first internal electrode layers formed within the ceramic sintered body; a plurality of second internal electrode layers formed within the ceramic sintered body to be positioned between the plurality of first internal electrode layers; a pair of first main connection electrode members inserted into the slots to be connected to the first internal electrode layers or the second internal electrode layers, respectively; a pair of first main lead members inserted into the slots and to be connected to the first main connection electrode members, respectively; and a sealing member sealing the ceramic sintered body to partially expose each of the pair of first main lead members.

Abstract: An electrical multi-layered component includes a monolithic base member that has a plurality of ceramic layers and electrode layers disposed one on top of the other in alternating fashion. The base member includes two end surfaces opposite to one another and two side surfaces opposite to one another. The multi-layered component includes a plurality of external electrodes and a plurality of internal electrodes designed into the electrode layers. The internal electrodes at least partially overlap and form overlap areas. Each internal electrode is associated with a respective external electrode. At least one first internal electrode extending from an end surface overlaps with at least one second internal electrode (8) extending from an opposite end surface. At least a third internal electrode extends from an end surface.

Abstract: A laminated ceramic electronic component includes curved surface portions provided in an outer surface of a ceramic element assembly, and internal conductors provided within the ceramic element assembly that are exposed in the curved surface portions and principal surfaces to define starting points for plating deposition. A base layer, in an external conductor, which is defined by a plating film is arranged so as to directly cover the exposed portions of the internal conductors.

Abstract: Disclosed herein is a mounting structure of a circuit board having a multi-layered ceramic capacitor thereon, the multi-layered ceramic capacitor including dielectric sheets laminated thereon and external terminal electrodes formed at both ends thereof, the dielectric sheets having internal electrodes formed thereon, and the external terminal electrodes being connected in parallel with the internal electrode, wherein the internal electrodes are disposed to be in parallel with the circuit board, the external terminal electrodes are bonded to lands of the circuit board by a conductive material, and a bonding height (Ts) of the conductive material is lower than a sum of a gap (Ta) between the circuit board and a bottom surface of the multi-layered ceramic capacitor and a thickness (Tc) of a cover layer on a lower portion of the multi-layered ceramic capacitor, whereby vibration noise can be greatly reduced.

Abstract: An electrical circuit arrangement provides a substrate and at least two conductive surfaces. The substrate comprises at least one layer disposed between the conductive surfaces. The conductive surfaces form a capacitor and overlap in part and form an overlapping area. In the event of a displacement of the conductive surfaces relative to one another, the resulting overlapping area is largely constant up to a threshold value of the displacement.

Abstract: A multilayer ceramic capacitor has an element body formed by alternately laminating a plurality of dielectric layers and a plurality of inner electrodes. On a substrate having a mounting surface provided with at least two lands, the multilayer ceramic capacitor is mounted such that the inner electrodes are parallel to the mounting surface. A multilayer ceramic capacitor mounting structure satisfies Tf/T>0.1 and 300??r?2800, where T is the height of the multilayer ceramic capacitor, Tf is the outer covering thickness of the element body, and ?r is the relative permittivity of the dielectric layers, and 0.6?Wp/W?1.0, where W is the width of the multilayer ceramic capacitor, and Wp is the size of the land in a direction corresponding to the width of the multilayer ceramic capacitor.

Abstract: Disclosed herein are a stacked chip device including: a stacked body in which a plurality of sheets having an internal electrode made of a conductive material are stacked; external electrodes provided at both sides of the stacked body; and connection electrodes extending from the internal electrode and electrically connecting the internal electrode with the external electrodes, wherein the connection electrodes include: a plating solution permeation preventing section extending from the internal electrode, however, extending with a thickness smaller than the thickness of the internal electrode; and a contact reinforcement section extending from the plating solution permeation preventing section, however, extending in the form in which the thickness thereof is gradually extended toward the external electrode, and a manufacturing method thereof.

Abstract: In a multilayer ceramic electronic component, when a region of a ceramic body in layers where neither of a first internal electrode and a second internal electrode is provided as viewed in a direction in which a plurality of ceramic layers are stacked on one another is defined as a non-effective layer region, a dummy lead-through conductor is arranged in the non-effective layer region so as to lead to at least two locations on portions of superficies of the ceramic body and be electrically connected to a second external electrode. When a conductive medium is brought into contact with one of a plurality of exposed edges of the dummy lead-through conductor, a current is also applied to the other exposed edges.

Abstract: A multilayer capacitor comprises a capacitor element body, a first terminal electrode connected to a first inner electrode, a second terminal electrode connected to a second inner electrode, a third terminal electrode connected to a third inner electrode, and a fourth terminal electrode connected to a fourth inner electrode. The capacitor element body includes therewithin a first capacitor unit having first and second inner electrodes stacked adjacent to each other through a dielectric layer and a second capacitor unit having third and fourth inner electrodes stacked adjacent to each other through a dielectric layer. The first and second terminal electrodes have high resistance layers exhibiting electrical resistances higher than those of the third and fourth terminal electrodes.

Abstract: A first inner electrode is integrally provided with a first terminal connection part connected to a first terminal electrode and a first linking connection part connected to a first linking electrode. A second inner electrode is integrally provided with a second terminal connection part connected to a second terminal electrode and a second linking connection part connected to a second linking electrode. A third inner electrode is integrally provided with a third linking connection part connected to the first linking electrode. A fourth inner electrode is integrally provided with a fourth linking connection part connected to the second linking electrode. The third inner electrode is adjacent to the first and fourth inner electrodes in a laminating direction of the plurality of dielectric layers. The first and fourth inner electrodes overlap the third inner electrode as seen in the laminating direction of the plurality of dielectric layers.

Abstract: A multilayer capacitor is provided with improved reliability and reduced ESL. In a width direction, a second principal-surface electrode portion is greater than a first principal-surface electrode portion, and a fifth principal-surface electrode portion is greater than a fourth principal-surface electrode portion. When viewed from a lamination direction, an outer edge of the second principal-surface electrode portion at the other end side is arranged near the other end side more than outer edge of the fifth principal-surface electrode portion at one end side. First lead portions are connected to the second principal-surface electrode portion, and second lead portions are connected to the fifth principal-surface electrode portion.

Abstract: There are provided a nickel powder for an internal electrode, synthesized by a vapor phase synthesis method using plasma, more particularly, a nickel powder for an internal electrode, having a favorable crystallite diameter and high density, a method of producing the same, and a multilayer ceramic electronic component including the same. According to the nickel powder for an internal electrode, the method of producing the same, and the multilayer ceramic electronic component including the same, a nickel powder having less impurities, a favorable crystallite diameter, and high density can be produced.

Abstract: There is provided a conductive paste composition for an internal electrode of a multilayered ceramic electronic component including: a metal powder; and a chrome (Cr) or cobalt (Co) powder having a melting point higher than that of the metal powder. In the conductive paste composition for the internal electrode, the sintering shrinkage temperature of the internal electrode may be increased, and the connectivity of the internal electrode may be improved.

Abstract: In a monolithic ceramic electronic component, given that an interval between outer-layer dummy conductors adjacent to each other in an outer layer portion is d1, and that an interval between first and second inner electrodes adjacent to each other in an inner layer portion is d2, 1.7d2?d1 is satisfied. By reducing a density of the outer-layer dummy conductors in the outer layer portion on that condition, pressing of the inner electrodes through the outer-layer dummy conductors is relieved in a pressing step before firing. As a result, a distance between the inner electrodes can be prevented from being locally shortened. It is hence possible to effectively reduce and prevent degradation of reliability of the monolithic ceramic electronic component, e.g., a reduction of BDV.

Abstract: Provided is a chip electronic device that has an increased reliability with a small size. A chip electronic component has a main body made of a ceramic having an internal electrode therein. Provided on the main body is an external electrode that is made of a first electrode layer on the main body, a conductive protective layer on the first electrode layer, and a second electrode layer on the conductive protective layer formed by electrolytic plating. The conductive protective layer prevents hydrogen from diffusing into the main body during the electrolytic plating.

Abstract: There is provided a multilayer ceramic electronic part having high reliability including: a ceramic body including a dielectric layer; internal electrodes formed in the ceramic body and disposed to face each other, having the dielectric layer interposed therebetween; an electrode layer formed on the exterior of the ceramic body and electrically connected to the internal electrodes; a conductive resin layer formed on the electrode layer; and a plating layer formed on the conductive resin layer, wherein the conductive resin layer includes a first conductive resin layer contacting the electrode layer, and a second conductive resin layer formed on the exterior of the first conductive resin layer, contacting the plating layer and having a resin content different from that of the first conductive resin layer.