By Specific Pattern On Board Patents (Class 361/777)
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Patent number: 11503715Abstract: The first capacitor is opposed to and electrically connected to the first back electrode. The second capacitor is opposed to and electrically connected to the second back electrode. Each of the first circuit and the second circuit has a main region that overlaps with a corresponding one of the first capacitor and the second capacitor. At least one circuit of the first circuit and the second circuit has an extension region extending from the main region toward another circuit of the first circuit and the second circuit. At least one of one of the pair of first wires and the second wire is bonded to the extension region.Type: GrantFiled: October 21, 2021Date of Patent: November 15, 2022Assignee: CIG PHOTONICS JAPAN LIMITEDInventors: Daisuke Noguchi, Hiroshi Yamamoto
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Patent number: 11483935Abstract: An electronic device includes: a housing and a printed circuit board (PCB) structure disposed in the housing. The PCB structure includes a circuit board including an opening area formed through a first surface of the circuit board and a second surface of the circuit board opposite the first surface and a conductive pattern formed in a peripheral area around the opening area, a plate disposed on the second surface of the circuit board covering the opening area, an electronic element disposed on the plate and electrically connected with the circuit board, a resin portion disposed between the plate and the circuit board and extending from the conductive pattern, the resin portion including a conductive material, and a solder portion formed between the resin portion and the plate.Type: GrantFiled: February 10, 2021Date of Patent: October 25, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Hwajoong Jung, Manho Kim, Taehwan Kim, Kihuk Lee, Yonghwan Choi
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Patent number: 11410791Abstract: In accordance with an aspect of the disclosure, a cable comprises a flexible cable portion; and an end cable portion connected to one end of the flexible cable portion, wherein the flexible cable portion comprises: a first wire comprising one or more signal transmission lines; and a second wire comprising one or more fill-cut areas corresponding to the signal transmission lines and at least one or more ground lines.Type: GrantFiled: July 16, 2020Date of Patent: August 9, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Bumhee Bae, Minseok Kim, Younho Kim
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Patent number: 11373781Abstract: In accordance with an aspect of the disclosure, a cable comprises a flexible cable portion; and an end cable portion connected to one end of the flexible cable portion, wherein the flexible cable portion comprises: a first wire comprising one or more signal transmission lines; and a second wire comprising one or more fill-cut areas corresponding to the signal transmission lines and at least one or more ground lines.Type: GrantFiled: July 16, 2020Date of Patent: June 28, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Bumhee Bae, Minseok Kim, Younho Kim
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Patent number: 11354554Abstract: A dynamic transaction card that is manufactured using conductive plastic jumpers that will dissolve when in contact with a solvent used to tamper with the dynamic transaction card. Internal components of a dynamic transaction card may be manufactured using a synthetic or semi-synthetic organic material, such as, for example, plastics. These materials may be conductive to provide functionality to a dynamic transaction card, such as a connection between an integrated circuit and other card components such that when the materials dissolve, the connections are broken and the dynamic transaction card may be inactive due to the loss of various connections.Type: GrantFiled: February 12, 2021Date of Patent: June 7, 2022Assignee: CAPITAL ONE SERVICES, LLCInventors: David Wurmfeld, James Zarakas, Theodore Markson, Saleem Sangi, Tyler Locke, Kevin P. Kelly
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Patent number: 11226524Abstract: According to one embodiment, a display device includes a first line extending in a first direction, an insulating layer covering the first line, a second line disposed on the insulating layer and extending in a second direction, and a drive circuit including an output line extending in the first direction and connected to the first line through a contact portion. The contact portion includes a first portion to which the first line is connected at a first position, and a second portion to which the output line is connected at a second position which is apart from the first position in the second direction, the second portion facing the first portion with the insulating layer interposed therebetween while being electrically connected to the first portion.Type: GrantFiled: October 15, 2020Date of Patent: January 18, 2022Assignee: Japan Display Inc.Inventor: Akira Yokogawa
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Patent number: 11019724Abstract: This application provides a multilayer printed circuit board (PCB). There is a pad array on a surface of the multilayer PCB. The pad array includes at least one padding unit, and each padding unit includes a first pad and a second pad that are adjacent. Both the first pad and the second pad are connected to a first Z-directed transmission line located in a Z-directed groove. In this way, to wire a signal wire on a signal layer of the multilayer PCB, a quantity of Z-directed grooves that need to be bypassed is less than a quantity of vias that need to be bypassed in the prior art. In other words, wiring of the signal wire is easier to some extent. In addition, this application further provides a corresponding communications device.Type: GrantFiled: December 26, 2019Date of Patent: May 25, 2021Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Feng Gao, Ertang Xie, Wei Jing
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Patent number: 10978780Abstract: An antenna apparatus includes a ground pattern having a through-hole; an antenna pattern disposed above the ground pattern and configured to either one or both of transmit and receive a radio-frequency (RF) signal; a feed via penetrating through the through-hole and having one end electrically connected to the antenna pattern; and a meta member comprising a plurality of cells repeatedly arranged and spaced apart from each other, each of the plurality of cells comprising a plurality of conductive patterns, and at least one conductive via electrically connecting the plurality of conductive patterns to each other, wherein the meta member is disposed along at least portions of side boundaries of the antenna pattern above the ground pattern, and extends above the antenna pattern.Type: GrantFiled: October 25, 2018Date of Patent: April 13, 2021Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jeong Ki Ryoo, Hong In Kim, Nam Ki Kim
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Patent number: 10930578Abstract: A plate-shaped conductor is placed on an upper surface of a plate-shaped heat dissipation member with an insulation member interposed therebetween. A heat insulation member is placed at a location that is different from a location where the conductor is placed, on the upper surface of the heat dissipation member. An FET is electrically connected to the conductor. When current flows through the FET, the FET generates heat. A microcomputer that outputs a control signal for controlling operation of the FET is connected to an upper surface of the circuit board and is located opposite to the heat insulation member with the circuit board interposed therebetween.Type: GrantFiled: March 9, 2018Date of Patent: February 23, 2021Assignees: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.Inventor: Akira Haraguchi
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Patent number: 10334718Abstract: A multi-functional high current circuit board comprises a current conduction layer having several strata for conduction of electric current, a switching layer comprising at least one power circuit breaker for switching an electric load, a control layer comprising at least one control element to control the at least one power circuit breaker, at least one shielding element for shielding the current conduction layer from the control layer and from the switching layer.Type: GrantFiled: October 21, 2014Date of Patent: June 25, 2019Assignee: ZF FRIEDRICHSHAFEN AGInventors: Wilfried Lassmann, Michael Sperber
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Patent number: 10201074Abstract: A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, the conductive layers including a signal layer; and via patterns formed in the plurality of layers, each of the via patterns comprising first and second signal vias extending from a first surface of the printed circuit board to the signal layer, the signal layer including first and second signal traces connected to the first and second signal vias, respectively, the signal layer further including a ground conductor located between the signal traces and adjacent signal-carrying elements.Type: GrantFiled: November 8, 2017Date of Patent: February 5, 2019Assignee: Amphenol CorporationInventors: Marc Robert Charbonneau, Jose Ricardo Paniagua
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Patent number: 10149386Abstract: Provided is a circuit assembly that can suppress deterioration of its heat releasing capability caused by a pit formed by the formation of a protruding portion that enters an opening formed in a substrate. Provided is a manufacturing method with which such a circuit assembly can be produced easily. A conductive member is provided with a protruding portion that enters an opening formed in a substrate and to which a terminal of an electronic component is connected, a pit formed by formation of the protruding portion is covered by a base member for supporting the conductive member, and an embedding member having a heat conductivity higher than that of air is provided inside the pit.Type: GrantFiled: July 1, 2015Date of Patent: December 4, 2018Assignees: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.Inventor: Arinobu Nakamura
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Patent number: 10123419Abstract: IC device assemblies including a power delivery bus board that is mounted to a primary PCB (i.e., motherboard) that further hosts a power-sink device and a power-source device. The bus board, as a secondary PCB, may be surface-mounted on a back side of the primary PCB opposite the power source and sink devices, which are mounted on the front side of the primary PCB. The bus board need only be dimensioned so as to bridge a length between first and second back-side regions of the primary PCB that are further coupled to a portion of the front-side pads employed by the power-sink device. The secondary PCB may be purpose-built for conveying power between the source and sink devices, and include, for example, short, wide traces, that may be formed from multiple heavyweight metallization layers.Type: GrantFiled: March 30, 2016Date of Patent: November 6, 2018Assignee: Intel CorporationInventors: Jeffrey A. Pihlman, John C. Tomlin
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Patent number: 10070514Abstract: A high current switch, in particular for a motor vehicle, having a first bus bar, a second bus bar in addition to a first semi-conductor switch that has a control connection and a first transmission connection as well as a second transmission connection. The first transmission connection is placed in direct contact with the first bus bar and the second transmission connection is placed in direct electric contact with the second bus bar.Type: GrantFiled: October 31, 2016Date of Patent: September 4, 2018Assignee: ELLENBERGER & POENSGEN GMBHInventors: Wolfgang Ullermann, Peter Meckler, Manuel Engewald, Matthias Schwarz, Ewald Schneider, Markus Miklis
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Patent number: 10064279Abstract: The present disclosure provides a method for protecting an electronic interconnect device from environmental effects. The electronic interconnect device may be connected to at least one electronic component, wherein the electronic interconnect device and the at least one electronic component are at least partially covered with an encapsulating material in a material-bonded manner. The method may include applying the encapsulating material to the electronic interconnect device with a 3D printer during a 3D printing process.Type: GrantFiled: March 25, 2015Date of Patent: August 28, 2018Assignee: ZF Friedrichshafen AGInventor: Hermann Josef Robin
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Patent number: 9673545Abstract: A printed wiring board (1) includes: a base substrate (3); a plurality of pads (15a, 17a) for electrical connection that are disposed at one surface side of the base substrate (3) and at a connection end portion (13) to be connected with another electronic component (50); wirings (9, 11) that are connected with the pads (15a, 17a); and engageable parts (28, 29) that are formed at side edge parts of the connection end portion (13) and are to be engaged with engagement parts (58) of the other electronic component (50) in the direction of disconnection. The flexible printed wiring board (1) further includes reinforcement layers (31, 32) that are disposed at the other surface side of the base substrate (3) and at a frontward side with respect to the engageable parts (28, 29) when viewed in the direction of connection with the other electronic component, and that are formed separately from the wirings (9, 11).Type: GrantFiled: September 4, 2014Date of Patent: June 6, 2017Assignees: FUJIKURA LTD., DDK LTD.Inventors: Yuki Ishida, Masayuki Suzuki, Yuki Nakano, Harunori Urai, Norifumi Nagae
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Patent number: 9622356Abstract: An assembly and method for mounting an electronic package to a printed circuit board (PCB) in which a gasket is shaped to fit tightly around and under a perimeter edge of an electronic package. The electronic package may be carried by the PCB and comprise electrical package contacts on an underside of the package, which contact PCB contacts on the PCB. The gasket may be disposed between the underside of the package and the PCB substrate and surround the contacts, and may be shaped to fit around and under a perimeter edge of the package to protect the contacts from contamination.Type: GrantFiled: July 17, 2013Date of Patent: April 11, 2017Assignee: Lockheed Martin CorporationInventors: Tom Rovere, James K. Lake, Rick Micha, Paul Coyne
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Patent number: 9226386Abstract: A printed circuit board including a first outer layer, a second outer layer and an integrated circuit mounted on the second outer layer. The integrated circuit has a single exposed pad electrically connected to a ground reference, a first supply pin electrically connected to a first power supply and a second supply pin electrically connected to a second power supply, wherein the first power supply is configured to generate a first supply current with frequency components higher than the frequency components of a second supply current generated by the second power supply.Type: GrantFiled: October 10, 2013Date of Patent: December 29, 2015Assignees: STMICROELECTRONICS S.R.L., FREESCALE SEMICONDUCTOR, INC.Inventors: Mario Rotigni, Richard Moseley, Piyush Bhatt, Gregory Edgington
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Patent number: 9184772Abstract: An electronic device includes a circuit board. The circuit board includes a power amplifier footprint configured for mounting a first power amplifier or a second power amplifier thereon. The power amplifier footprint includes a first part and a second part. The first part includes multiple I/O pads. When the first power amplifier is mounted on the circuit board, the I/O pads in the first part are coupled to the first power amplifier. The second part includes multiple I/O pads. When the second power amplifier is mounted on the circuit board, both the I/O pads in the first part and the I/O pads in the second part are coupled to the second power amplifier.Type: GrantFiled: July 30, 2012Date of Patent: November 10, 2015Assignee: MEDIATEK INC.Inventors: Hsin-Ying Lee, Chi-Sheng Yu, Lien Chien
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Patent number: 9171812Abstract: Methods and devices for a semiconductor device having conductive pads to prevent solder reflow are disclosed and may include a substrate comprising conductive pads of rectangular shape and neck-down portions on opposite sides of the rectangular shape, a semiconductor die comprising conductive pillars, and a solder electrically coupling the conductive pillars to the conductive pads. The neck-down portions may comprise a solder mask for the conductive pads to prevent solder from flowing in an unwanted direction on the conductive pads. The conductive pillars may comprise an elliptical cross-section with a minor axis length X and a major axis length Y. The major axis of the elliptical cross-section may be parallel to a long axis of the rectangular shape of the conductive pads. A decrease (W) in width of the conductive pads from the rectangular shape to the neck-down portions may be defined by X/5?W?X/2.Type: GrantFiled: November 25, 2013Date of Patent: October 27, 2015Assignee: Amkor Technology, Inc.Inventors: Byong Jin Kim, Min Chul Shin, Ho Choi
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Patent number: 9116311Abstract: A circuit board includes a mounting surface and a number of connecting pads on the mounting surface. Each of the connecting pads defines a mounting area for mounting an element thereon. At least two of the connecting pads are substantially circular-shaped.Type: GrantFiled: April 30, 2013Date of Patent: August 25, 2015Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: Kai-Wen Wu
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Land grid array package capable of decreasing a height difference between a land and a solder resist
Patent number: 9041181Abstract: A land grid array (LGA) package including a substrate having a plurality of lands formed on a first surface of the substrate, a semiconductor chip mounted on a second surface of the substrate, a connection portion connecting the semiconductor chip and the substrate, and a support layer formed on part of a surface of a first land.Type: GrantFiled: February 10, 2011Date of Patent: May 26, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hee-chul Lee, Myung-kee Chung, Kun-dae Yeom -
Publication number: 20150138743Abstract: A substrate package includes a woven fabric having electrically non-conductive strands woven between electrically conductive strands including wire strands, co-axial strands, and/or an inductor pattern of strands. The package may be formed by an inexpensive and high throughput process that first weaves the non-conductive strands (e.g., glass) between the conductive strands to form a circuit board pattern of conductive strands in a woven fabric. Next, the woven fabric is impregnated with a resin material to form an impregnated fabric, which is then cured to form a cured fabric. The upper and lower surfaces of the cured fabric are subsequently planarized. Planarizing segments and exposes ends of the wire, co-axial, and inductor pattern strands. Since the conductive strands were formed integrally within the planarized woven fabric, the substrate has a high mechanical stability and provides conductor strand based electrical components built in situ in the substrate package.Type: ApplicationFiled: November 20, 2013Publication date: May 21, 2015Inventors: Mihir K. ROY, Mathew J. Manusharow
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Patent number: 9019709Abstract: A protection circuit board is disclosed. The protection circuit board includes a main printed circuit board and an auxiliary printed circuit board. In the auxiliary printed circuit board, a thermistor is electrically interposed between an external electrode terminal and auxiliary electrodes.Type: GrantFiled: August 18, 2011Date of Patent: April 28, 2015Assignee: Samsung SDI Co., Ltd.Inventor: Young-Cheol Jang
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Patent number: 9013878Abstract: An electronic system includes an insulating structural element with a coupling surface configured for coupling the electronic system with at least one further electronic system. The electronic system further includes at least one conducting contact element at least partially exposed on the coupling surface. Each conducting contact element has a soldering surface supporting reflow soldering of the conducting contact element with a corresponding further contact element of the further electronic system. In addition, each conducting contact element has at least one lateral surface protruding from the insulating structural element. The soldering surface of the conducting contact element includes at least one channel having an opened end at the protruding lateral surface, the channel configured to facilitate dispersion of waste gas produced during reflow soldering.Type: GrantFiled: September 25, 2012Date of Patent: April 21, 2015Assignee: STMicroelectronics S.r.l.Inventors: Matteo Sebastiano Dimauro, Sebastiano Russo, Rosalba Cacciola, Cristiano Gianluca Stella
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Patent number: 9013894Abstract: A printed circuit board includes: a substrate; a land that is disposed on a surface of the substrate, and includes a central portion and a plurality of extended portions, the central portion having the same shape and the same size as a land of a surface mount device, and the extended portions being up-and-down symmetry and right-and-left symmetry with respect to a straight line which passes through the center of the central portion; gaps that are disposed on the surface of the substrate, each of the gaps being disposed on a periphery of the central portion and between the extended portions; and a resist that is disposed on the surface of the substrate, and has an opening portion formed at a position corresponding to the central portion and the gaps.Type: GrantFiled: September 10, 2013Date of Patent: April 21, 2015Assignee: Fujitsu Component LimitedInventor: Shinya Yamamoto
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Patent number: 9000306Abstract: An electronic apparatus (100) has an electronic device (151), a power supply plane (121) and a power supply plane (122) disposed with a gap (123) therebetween, a connection member (152) that electrically connects the power supply plane (122) and the electronic device (151), a ground plane (141) facing the power supply plane (121) or the power supply plane (122), a connection member (153) that electrically connects the ground plane (141) and the electronic device (151), a plurality of conductor elements (131) that is repeatedly arrayed, and open stubs (111) formed at a location overlapping the gap (123) included in an area surrounded by the conductor elements (131). In addition, at least some of the open stubs (111) face the power supply plane (122) which is not in contact with the open stubs (111).Type: GrantFiled: June 2, 2011Date of Patent: April 7, 2015Assignee: NEC CorporationInventors: Hiroshi Toyao, Manabu Kusumoto, Naoki Kobayashi, Noriaki Ando
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Patent number: 9000303Abstract: The invention provides a method for preparing a pattern for an electric circuit comprising the steps of: (a) providing a substrate; (b) providing a pattern of an inhibiting material for an electrical circuit onto said substrate by i) applying a layer of the inhibiting material onto said substrate and mechanically removing locally the layer of the inhibiting material to obtain said pattern; or ii) applying a layer of the inhibiting material onto said substrate, wherein said layer has pre-determined pattern which incompletely covers said substrate; (c) establishing a distribution of particles of a first metal or alloy thereof on the layer of the inhibiting material and the pattern as obtained in step.Type: GrantFiled: June 16, 2008Date of Patent: April 7, 2015Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNOInventors: Roland Anthony Tacken, Renatus Marius De Zwart, Erwin Rinaldo Meinders, Maria Peter
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Patent number: 8995141Abstract: An electronic device includes a first component electrically coupled to a second component. The first component and the second component are coupled by the base of a spring loaded connector.Type: GrantFiled: July 27, 2012Date of Patent: March 31, 2015Assignee: Amazon Technologies, Inc.Inventors: Nidhi Rathi, Edward A. Lilgegren
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Patent number: 8982576Abstract: Provided is a printed wiring board including a power source, a plurality of LSIs, and a planar power supply wiring for supplying power from the power source to the LSIs. A plurality of partial wiring patterns each forming a current path from the power source to the LSIs are provided by forming gaps in the power supply wiring.Type: GrantFiled: August 30, 2011Date of Patent: March 17, 2015Assignee: NEC CorporationInventor: Kazuhiro Kashiwakura
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Patent number: 8975735Abstract: A redistribution board includes a first conductive layer including a redistribution structure for low voltage signals, a second conductive layer including a redistribution structure for high voltage signals, and a non-conductive layer. The second conductive layer is spaced apart from the first conductive layer by the non-conductive layer. The redistribution board further includes a conductive connector extending from a mounting surface of the redistribution board to the second conductive layer. The conductive connector is surrounded by a low voltage trace of the first conductive layer.Type: GrantFiled: August 8, 2013Date of Patent: March 10, 2015Assignee: Infineon Technologies AGInventors: Ralf Otremba, Josef Höglauer
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Patent number: 8975528Abstract: Even in an electronic device where electrodes are coupled electrically using a solder, sections to which electrodes of an electronic component are coupled are switched by a method other than changing circuits of the electronic component or changing circuits of a wiring substrate. The electronic device includes: a wiring substrate having two or more first electrodes over one surface thereof; and an electronic component having, over one surface thereof, two or more second electrodes arranged corresponding to the two or more first electrodes, respectively. At least one of the first electrodes is a specific electrode divided into two or more divided portions, and the divided portions are coupled to different wirings, respectively. Further, at least one of the divided portions is coupled to a corresponding second electrode through a solder.Type: GrantFiled: August 21, 2012Date of Patent: March 10, 2015Assignee: Renesas Electronics CorporationInventor: Shuuichi Kariyazaki
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Patent number: 8955219Abstract: The invention relates to a method for fabricating a bond by providing a body including a metallic surface provided with an inorganic, dielectric protective layer. The protective layer covers at least one surface zone of the metallic surface in which the metallic surface is to be electrically conductive bonded to a contact conductor. To fabricate the bond, a portion of a provided contact conductor above the surface zone is pressed on to the protective layer and the body so that the protective layer is destroyed above the surface zone in achieving an electrically conductive bond between the metallic surface and the contact conductor.Type: GrantFiled: February 22, 2010Date of Patent: February 17, 2015Assignee: Infineon Technologies AGInventors: Roman Roth, Dirk Siepe
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Patent number: 8952263Abstract: A micro-wire electrode includes a substrate and an anisotropically conductive electrode extending in a length direction formed over the substrate. The electrode includes a plurality of electrically connected micro-wires formed in a micro-pattern over the substrate. The micro-pattern includes a plurality of substantially parallel and straight micro-wires extending substantially in the length direction and a plurality of angled micro-wires formed at a non-orthogonal angle to the straight micro-wires electrically connecting the straight micro-wires so that the anisotropically conductive electrode has a greater electrical conductivity in the length direction than in another conductive electrode direction.Type: GrantFiled: August 10, 2012Date of Patent: February 10, 2015Assignee: Eastman Kodak CompanyInventor: Ronald Steven Cok
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Patent number: 8951812Abstract: The present disclosure involves a semiconductor device. The semiconductor device includes a substrate. The semiconductor device includes an electronic device positioned over the substrate. The electronic device includes an opening. The semiconductor device includes a shielding device positioned over the substrate and surrounding the electronic device. The shielding device includes a plurality of elongate members. A subset of the plurality of elongate members extend through the opening of the electronic device. At least one of the electronic device and the shielding device is formed in an interconnect structure positioned over the substrate.Type: GrantFiled: February 19, 2014Date of Patent: February 10, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Hsiu-Ying Cho
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Patent number: 8952271Abstract: There is provided a circuit board to which a solder ball composed of a lead (Pb)-free solder is to be connected, a semiconductor device including an electrode and a solder ball composed of a lead (Pb)-free solder disposed on the electrode, and a method of manufacturing the semiconductor device, in which mounting reliability can be improved by enhancing the bonding strength (adhesion strength) between the solder ball composed of a lead (Pb)-free solder and the electrode.Type: GrantFiled: December 13, 2013Date of Patent: February 10, 2015Assignee: Fujitsu LimitedInventors: Masaharu Furuyama, Daisuke Mizutani, Seiki Sakuyama, Toshiya Akamatsu
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Patent number: 8946904Abstract: A substrate comprising a plurality of layers, a first side and a second side; and a via extending through the substrate from the first side to the second side. The via comprises:a first substrate via extending through a first layer of the plurality of layers, the first substrate via having a first cross-sectional area; a first capture pad disposed under the first substrate via, wherein the first capture pad physically contacts the first substrate via; a second substrate via extending through a second layer of the plurality of layers, the second substrate via physically contacting the first capture pad, the second substrate via having a second cross-sectional area that is greater than the first cross-sectional area; and a second thermal and electrical contact pad disposed under the second dielectric layer, wherein the second contact pad physically contacts the second substrate via.Type: GrantFiled: August 27, 2010Date of Patent: February 3, 2015Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Tarak A. Railkar, Ashish Alawani, Ray Parkhurst
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Patent number: 8947883Abstract: A low profile USB flash memory device, and methods of forming same, are disclosed. The USB flash memory device includes an integrated circuit memory portion and a USB connector. The memory portion and the USB connector may be integrally formed on the same substrate. The USB flash memory device includes a substrate on which is mounted one or more flash memory die, a controller die, passive components and an LED for indicating when the memory is being accessed. In contrast to prior art USB memory devices which used TSOP packages mounted on a printed circuit board, the semiconductor die of the present invention are affixed to the substrate and wire bonded in a SIP configuration. Omitting the encapsulated TSOP packages allows a reduction in the overall thickness of the USB flash memory device.Type: GrantFiled: December 27, 2007Date of Patent: February 3, 2015Assignee: SanDisk Technologies Inc.Inventors: Suresh Upadhyayula, Robert C. Miller, Hem Takiar, Steven Sprouse, Ka Ian Yung
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Publication number: 20150029690Abstract: A functional device includes a fixed electrode portion including a first fixed electrode portion and a second fixed electrode portion, a first wiring portion connected to the first fixed electrode portion, and a second wiring portion connected to the second fixed electrode portion. At least one of the first wiring portion and the second wiring portion is provided with a branch portion. One wiring line extending from the branch portion is connected to the fixed electrode portion, and another wiring line extending from the branch portion is provided along the first wiring portion or the second wiring portion.Type: ApplicationFiled: July 23, 2014Publication date: January 29, 2015Inventor: Satoru TANAKA
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Patent number: 8942002Abstract: Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to a thin interposer disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can insulate the components from one another and also couple signals between the components on the first and second layers. In one embodiment, the components in the first and second layers are passive components.Type: GrantFiled: August 27, 2012Date of Patent: January 27, 2015Inventors: Shawn X. Arnold, Douglas P. Kidd, Sean A. Mayo, Scott P. Mullins, Dennis R. Pyper, Jeffrey M. Thoma, Kenyu Tojima
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Patent number: 8923003Abstract: An electronic device may contain components such as flexible printed circuits and rigid printed circuits. Electrical contact pads on a flexible printed circuit may be coupled electrical contact pads on a rigid printed circuit using a coupling member. The coupling member may be configured to electrically couple contact pads on a top surface of the flexible circuit to contact pads on a top surface of the rigid circuit. The coupling member may be configured to bear against a top surface of the flexible circuit so that pads on a bottom surface of the flexible circuit rest against pads on a top surface of the rigid circuit. The coupling member may bear against the top surface of the flexible circuit. The coupling member may include protrusions that extend into openings in the rigid printed circuit. The protrusions may be engaged with engagement members in the openings.Type: GrantFiled: February 6, 2012Date of Patent: December 30, 2014Assignee: Apple Inc.Inventors: Alexander D. Schlaupitz, Joshua G. Wurzel
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Patent number: 8917107Abstract: An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided.Type: GrantFiled: July 31, 2012Date of Patent: December 23, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Guk Han, Seok-Joon Moon, Beom-jun Jin
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Patent number: 8913398Abstract: An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.Type: GrantFiled: September 3, 2013Date of Patent: December 16, 2014Assignee: NEC CorporationInventors: Shinji Watanabe, Nobuhiro Mikami, Junya Sato, Kenichiro Fujii, Katsumi Abe, Atsumasa Sawada
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Patent number: 8913399Abstract: Disclosed herein are a printed circuit board (PCB) and a probe including the same. The probe includes a transducer, a PCB having a pattern part contacting the transducer via face-to-face contact, and a bonding member bonding the transducer to the pattern part of the PCB. The bonding part of the PCB is provided with the pattern part to increase a bonding area of the bonding part and to allow the bonding member to contact not only a metal layer of the bonding part but also an electrical insulation part thereof, thereby improving a bonding force between the transducer and the PCB. As a result, the transducer can be reliably bonded to the PCB, so that performance of the transducer can be prevented from being deteriorated due to defective connection between the PCB and the transducer.Type: GrantFiled: June 26, 2012Date of Patent: December 16, 2014Assignee: Samsung Medison Co., Ltd.Inventors: Gil Ju Jin, Jung Lim Park, Jae Yk Kim
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Patent number: 8898891Abstract: Circuit boards and methods for their manufacture are disclosed. The circuit boards carry high-speed signals using conductors formed to include lengthwise channels. The channels increase the surface area of the conductors, and therefore enhance the ability of the conductors to carry high-speed signals. In at least some embodiments, a discontinuity also exists between the dielectric constant within the channels and just outside the channels, which is believed to reduce signal loss into the dielectric material.Type: GrantFiled: December 7, 2010Date of Patent: December 2, 2014Assignee: Force10 Networks, Inc.Inventors: Joel R. Goergen, Yi Zheng
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Patent number: 8897028Abstract: In a circuit module, a conductive partition is defined by a plurality of conductive chips provided on a component mounting surface. The component mounting surface is divided into a first block and a second block by the conductive partition. The shape of the conductive partition can be freely changed in accordance with the size of a circuit board and the arrangement of electronic components in the first block and the second block by changing the positions of the conductive chips and the number of conductive chips. Electromagnetic interference between the first block and the second block is prevented by the conductive partition.Type: GrantFiled: June 9, 2011Date of Patent: November 25, 2014Assignee: Murata Manufacturing Co., Ltd.Inventor: Tadaji Takemura
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Patent number: 8873246Abstract: A wiring board includes a metal cap pad that is arranged so as to surround a mounting position of an electronic component and is connected to an end portion of a metal cap, a power source plane that is connected to the electronic component through a connection member and has a gap, a ground plane that is connected to the electronic component through a connection member, and a plurality of conductive body elements that are repeatedly arranged so as to surround the connection members and the gap. The power source plane and the ground plane extend so as to include at least a part of an area that is surrounded by the plurality of conductive body elements and at least a part of an area facing the plurality of conductive body elements.Type: GrantFiled: February 18, 2011Date of Patent: October 28, 2014Assignee: NEC CorporationInventors: Hiroshi Toyao, Manabu Kusumoto, Naoki Kobayashi, Noriaki Ando
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Patent number: 8869391Abstract: A method for producing a wired circuit board includes the steps of preparing a metal supporting layer, forming an insulating layer on the metal supporting layer so as to form an opening, forming a conductive thin film on the insulating layer and on the metal supporting layer that is exposed from the opening of the insulating layer, heating the conductive thin film, forming a conductive pattern on the conductive thin film that is formed on the insulating layer, and forming a metal connecting portion to be continuous to the conductive pattern on the conductive thin film that is formed on the metal supporting layer exposing from the opening of the insulating layer.Type: GrantFiled: October 25, 2011Date of Patent: October 28, 2014Assignee: Nitto Denko CorporationInventors: Katsutoshi Kamei, Yuu Sugimoto, Hitoki Kanagawa
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Patent number: 8867229Abstract: A printed circuit includes a number of conductive wires. Each of the conductive wires includes a first conductive wire section, a second conductive wire section, and a first connection section. The first connection section includes a first end and a second end opposite to the first end, the first end of the first connection section is connected to the first conductive wire section, and the second end of the first connection section is connected to the second conductive wire section. An angle between the first conductive wire section and the first connection section can be in a range from about 90 degrees to about 180 degrees.Type: GrantFiled: October 17, 2012Date of Patent: October 21, 2014Assignee: Shih Hua Technology Ltd.Inventor: Ho-Chien Wu
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Patent number: 8867217Abstract: A circuit including a flexible substrate and at least one electric element attached to the substrate, the substrate including at least one cavity arranged near the electric element and helping to break or distort the electric element in response to a flexion or stretching of the substrate. Application in particular is to the manufacture of tear-proof electronic micromodules.Type: GrantFiled: January 29, 2010Date of Patent: October 21, 2014Assignee: STMicroelectronics Rousset SASInventors: Francis Steffen, Gilbert Assaud