By Specific Pattern On Board Patents (Class 361/777)
  • Patent number: 8345437
    Abstract: A connection structure for connecting a wiring board to a to-be-connected body having electric contacts, the wiring board including: a base having board-side contacts provided on its facing surface that is to face the to-be-connected body; and a cover film which covers the facing surface except the board-side contacts and a non-covered partial region of the facing surface, the connection structure including: conduction portions formed of electrically conductive resin, for bonding the electric contacts and the board-side contacts to permit electrical conduction therebetween; and a reinforcement portion formed of the same resin as the conduction portions and disposed at a position which is different from positions of the conductive portions and at which the reinforcement portion extends across both of a surface of the cover film and a surface of the non-covered partial region of the base, the reinforcement portion bonding the to-be-connected body and the wiring board for reinforcing connection therebetween.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: January 1, 2013
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Tomoyuki Kubo, Yuji Shinkai
  • Patent number: 8345438
    Abstract: An electronic part module includes a wiring substrate, a passive device group of passive devices formed on the wiring substrate, and device chips mounted on the wiring substrate. Such an electronic part module is made in the following manner. First, a wiring substrate wafer is made, to include a plurality of electronic part module formation areas. Then, a plurality of passive devices are formed in each of the electronic part module formation areas on the wiring substrate wafer. Then, the device chips are formed on each of the electronic part module formation areas on the wiring substrate wafer. Finally, the wiring substrate wafer is divided.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: January 1, 2013
    Assignees: Fujitsu Limited, Taiyo Yuden Co., Ltd.
    Inventors: Xiaoyu Mi, Tsuyoshi Matsuomoto, Satoshi Ueda, Takeo Takahashi
  • Patent number: 8339798
    Abstract: Printed circuit boards are provided with embedded components. The embedded components may be mounted within recesses in the surface of a printed circuit board substrate. The printed circuit board substrate may have grooves and buried channels in which wires may be mounted. Recesses may be provided with solder pads to which the wires may be soldered or attached with conductive adhesive. An integrated switch may be provided in an opening within a printed circuit board substrate. The integrated switch may have a dome switch member that is mounted within the opening. A cover member for the switch may be formed from a flexible layer that covers the dome switch member. Terminals for the integrated switch may be formed from conductive structures in an interior printed circuit board layer. Interconnects may be used to electrically connect embedded components such as switches, integrated circuits, solder pads for wires, and other devices.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: December 25, 2012
    Assignee: Apple Inc.
    Inventors: Jahan Minoo, Anthony P. N. Bidmead, Michael Nikkhoo
  • Patent number: 8339802
    Abstract: A module having a stacked magnetic device and semiconductor device, and method of forming the same. In one embodiment, the module includes a printed wiring board including a patterned conductor formed on an upper surface thereof. The module also includes a magnetic core mounted on the upper surface of the printed wiring board proximate the patterned conductor and a semiconductor device mounted on an upper surface of the magnetic core.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: December 25, 2012
    Assignee: Enpirion, Inc.
    Inventors: Ashraf W. Lotfi, Douglas Dean Lopata, John David Weld, Mathew A. Wilkowski
  • Patent number: 8330053
    Abstract: An optoelectronic device includes an optoelectronic component, the optoelectronic component having an active region and at least one first conductive path on a first substrate, wherein the first conductive path is electrically connected to the active region. Further, the optoelectronic device comprises a second substrate with at least one second conductive path, wherein the first conductive path and the second conductive path are electrically connected to one another.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: December 11, 2012
    Assignee: Osram Opto Semiconductors GmbH
    Inventor: Silvio Grespan
  • Patent number: 8331104
    Abstract: According to one embodiment, an electronic device includes a circuit board housed in a housing. The circuit board further includes a conductive layer, an insulating layer and a signal line. The conductive layer includes a base portion including a surface, a plurality of first projecting portions formed integrally with the base portion and extending in parallel with each other on the surface of the base portion, and a plurality of second projecting portions formed integrally with the base portion and extending in parallel with each other to cross the plurality of first projecting portions. The insulating layer is stacked on the conductive layer to cover the surface of the base portion, and the signal line is stacked on the insulating layer and extends in a direction crossing directions in which the first and second projecting portions extend.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: December 11, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Daigo Suzuki
  • Patent number: 8331103
    Abstract: Disclosed herein is a wiring board including: a shield layer; and n layers (n is an integer of two or more) of inductor wiring formed above the shield layer and forming an inductor; wherein of the n layers of inductor wiring, the inductor wiring closest to the shield layer has a smallest wiring area.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: December 11, 2012
    Assignee: Sony Corporation
    Inventor: Shuichi Oka
  • Patent number: 8315064
    Abstract: An apparatus for detecting pattern alignment error includes a first conductive pattern disposed over a first insulation member with a power source applied of the first conductive pattern; a second insulation member for covering the first conductive pattern; a second conductive pattern disposed on the second insulation member; a conductive via connected to the second conductive pattern and passing through the second insulation member; and an insulation pattern disposed in the first conductive pattern for detecting an alignment error in response to a position of the conductive via. The apparatus for detecting pattern alignment error can detect the alignment of lower wiring in a device with multi-layer wiring.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: November 20, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jeong Hyun Park
  • Patent number: 8314341
    Abstract: Disclosed is a printed circuit board into which an electromagnetic bandgap structure for blocking a noise is inserted. The electromagnetic bandgap structure can include a first conductive plate, a second conductive plate arranged on a planar surface that is different from that of the first conductive plate, a third conductive plate arranged on a planar surface that is different from that of the second conductive plate, a connection pattern arranged on a planar surface that is different from that of the second conductive plate, a first stitching via unit configured to connect the first conductive plate to one end of the connection pattern through the planar surface where the second conductive plate is arranged, and a second stitching via unit configured to connect the third conductive plate to the other end of the connection pattern through the planar surface where the second conductive plate is arranged.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: November 20, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Mi-Ja Han, Kang-Wook Bong, Hyo-Jic Jung
  • Patent number: 8310833
    Abstract: A method of making an electronic circuit device includes placing a circuit board in a cavity of a mold such that one side of the circuit board is held in close contact with an inner surface of the cavity, and encapsulating the circuit board in a casing by filling the cavity with a resin material. The one side of the circuit board is exposed to one side of an outer surface of the casing to define part of the one side of the outer surface of the casing. The method further includes thinning the casing by machining the entire one side of the outer surface of the casing.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: November 13, 2012
    Assignee: Denso Corporation
    Inventors: Keiichi Sugimoto, Mitsuru Nakagawa
  • Publication number: 20120281378
    Abstract: An electronic device is disclosed for coupling to a target platform, which includes a multitude of pad contacts. The electronic device includes a substrate, a multitude of pad contacts on the substrate, and a multitude of contact regions in one of the of pad contacts on the substrate. Each of the multitude of pad contacts on the substrate electrically couples to a corresponding one of the multitude of pad contacts on the target platform when the substrate and the target platform are assembled. The multitude of contact regions corresponds to one of the multitude of pad contacts on the target platform when the substrate and the target platform are assembled.
    Type: Application
    Filed: July 17, 2012
    Publication date: November 8, 2012
    Applicant: Wintec Industries, Inc.
    Inventor: Kong-Chen Chen
  • Publication number: 20120268908
    Abstract: Disclosed herein arc a printed circuit board (PCB) and a probe including the same. The probe includes a transducer, a PCB having a pattern part contacting the transducer via face-to-face contact, and a bonding member bonding the transducer to the pattern part of the PCB. The bonding part of the PCB is provided with the pattern part to increase a bonding area of the bonding part and to allow the bonding member to contact not only a metal layer of the bonding part but also an electrical insulation part thereof, thereby improving a bonding force between the transducer and the PCB. As a result, the transducer can be reliably bonded to the PCB, so that performance of the transducer can be prevented from being deteriorated due to defective connection between the PCB and the transducer.
    Type: Application
    Filed: June 26, 2012
    Publication date: October 25, 2012
    Applicant: Medison Co., Ltd.
    Inventors: Gil Ju JIN, Jung Lim Park, Jae Yk Kim
  • Patent number: 8288658
    Abstract: A multilayer circuit board in which wirings are arranged so that the inductance thereof is reduced. A ground wiring and a power source wiring which are provided in a multilayer circuit board are arranged so that most of the wirings are superposed vertically along a direction of a longer side of the circuit board, and since currents flow in an opposite direction to each other in the portions which are superposed, magnetic fields generated by the currents so flowing are canceled by each other. Similarly, a W-phase wiring, a V-phase wiring and a W-phase wiring are also arranged so that the wirings are partially superposed along their longer side direction vertically, and magnetic fields generated by currents flowing in the portions which are superposed vertically are canceled by one another. By this, the inductance of the wirings can be reduced by increasing a mutual inductance between these wirings.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: October 16, 2012
    Assignee: JTEKT Corporation
    Inventors: Nobuhiro Uchida, Motoo Nakai, Hiroshi Sumasu
  • Patent number: 8289726
    Abstract: An electronic device (10) has a screen (12) protecting against radiofrequency electromagnetic fields, wherein the screen is formed by an at least partially conductive cap (12). In order to avoid the formation of a defined conductive connection between the cap (12) and a reference potential, conductive two-dimensional regions (30) of the cap (12) are arranged in electrically insulated fashion at a short distance parallel to at least one two-dimensional region (42) of a conductor (22) of a reference potential. The two-dimensional regions act as a capacitor and a capacitive coupling (12) to the reference potential is produced which eliminates or attenuates radiofrequency electromagnetic interference fields, which enter the electronic device or are emitted from it.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: October 16, 2012
    Assignee: Continental Automotive GmbH
    Inventors: Stefan Köhler, Peter Wiese
  • Patent number: 8284564
    Abstract: A circuit board includes balls as electrodes in a grid, a power supply wiring pattern area connected to power supply terminals of an integrated circuit mounted thereon, and a feeding pattern area connected to a feeding point; the balls include first and second power supply ball groups connected respectively to power supply terminal arrays, at a predetermined interval, of the integrated circuit, and the power supply wiring pattern area includes first and second power supply connection patterns connected respectively to the first and second ball groups, and at least one connection pattern connecting the first and second power supply connection patterns noncontact to the balls, and has first and second connection portions connected respectively to the feeding pattern area and one electrode of a first bypass capacitor, and the second power supply connection pattern has a third connection portion connected to one electrode of a second bypass capacitor.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: October 9, 2012
    Assignee: Sony Corporation
    Inventor: Satoshi Mizuno
  • Patent number: 8279619
    Abstract: A method for fabricating a point-of-load (POL) power supply system can include providing a circuit board. The circuit board can include a first set of connections configured for coupling a predetermined first portion of components of a voltage regulator down (VRD) system to the circuit board and a second set of connections configured for coupling a replacement module to the circuit board. Each of the first set of connections and the second set of connections is electrically coupled with a third set of connections that is configured for coupling a second portion of components of the VRD system to the circuit board. The second portion of components of the VRD system is connected to the circuit board. The replacement module is connected onto the circuit board via the second set of connections such that the replacement module and the second portion of components of the VRD system cooperate to provide at least a portion of the POL system.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: October 2, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Howard Leverenz, Mohamed Amin Bemat, Reynaldo P. Domingo, Kailash Kishore Mirpuri
  • Patent number: 8273994
    Abstract: A printed circuit board (PCB) includes a ball grid array (BGA). The PCB further includes a first BGA pad having a circular shape, and a first via having a circular shape, where the circular shape of the first via overlaps a portion of the circular shape of the first BGA pad and is rotated diagonally relative to a center of the first BGA pad. The PCB also includes a second BGA pad having a circular shape, and a second via having a circular shape, where the circular shape of the second via overlaps a portion of the circular shape of the second BGA pad and is rotated diagonally relative to a center of the second pad, and where a center of the second via is located at a first distance from the center of the first via and at a first angle relative to an axis that crosses a center of the first via.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: September 25, 2012
    Assignee: Juniper Networks, Inc.
    Inventors: Boris Reynov, Ping Yue, Shreeram Siddhaye, John Cleveland, Chebrolu Srinivas, Srinivas Venkataraman
  • Patent number: 8270178
    Abstract: An active device array substrate has at least one patterned conductive layer. The patterned conductive layer includes a copper layer. A cross-section of the copper layer which is parallel to a normal line direction of the copper layer includes a first trapezoid and a second trapezoid stacked on the first trapezoid. A base angle of the first trapezoid and a base angle of the second trapezoid are acute angles, and a difference between the base angle of the first trapezoid and the base angle of the second trapezoid is from about 5° to about 30°.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: September 18, 2012
    Assignee: Au Optronics Corporation
    Inventors: Po-Lin Chen, Chih-Yuan Lin, Yu-Min Lin, Chun-Nan Lin
  • Publication number: 20120229998
    Abstract: A differential transmission circuit includes a pair of transmission line conductors and a ground conductor layer, wherein the pair of transmission line conductors include a first straight line region where both the pair of transmission line conductors extend in parallel to each other in a first direction with a first width in a first layer, a first cross region where one of the pair of transmission line conductors is formed in the first layer, the other thereof is formed in a second layer, and the pair of transmission line conductors cross the each other in a three-dimensional manner, the first cross region being disposed on the front side of the first straight line region, and wherein each of the widths of the pair of transmission line conductors in the first cross region is smaller than the first width.
    Type: Application
    Filed: February 23, 2012
    Publication date: September 13, 2012
    Applicant: OPNEXT JAPAN, INC.
    Inventor: Osamu KAGAYA
  • Patent number: 8264844
    Abstract: A conductive chassis plate faces a printed circuit board at a distance. One end of the conductive chassis plate is aligned with one end of the printed circuit board. One end of the conductive chassis plate is electrically connected to a ground wiring pattern provided on one end of the printed circuit board. One end of the conductive chassis plate is electrically connected to a conductive member that extends from one end of the conductive chassis plate toward the other end. As a result, in transmitting or receiving a signal with respect to external equipment attached to a connector, an influence of electrostatic discharge is reduced with a simple configuration.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: September 11, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Koji Hirai
  • Patent number: 8258408
    Abstract: As a multi-layered board, an EMI noise reduction board, having an electromagnetic bandgap structure with band stop frequency properties inserted into an inner portion of the board, includes a first area, in which a ground layer and a power layer are formed, and a second area, placed on a side surface of the first area, in which it has the electromagnetic bandgap structure formed therein so as to shield an EMI noise radiated to the outside through the side surface of the first area. The electromagnetic bandgap structure includes a plurality of first conductive plates, placed along the edge of the board, a plurality of second conductive plates, disposed on a planar surface that is different from the first conductive plates such that the second conductive plates are alternately disposed with the first conductive plates, and a via, which connects the first conductive plates to the second conductive plates.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: September 4, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Mi-Ja Han, Dae-Hyun Park, Hyo-Jic Jung, Kang-Wook Bong
  • Patent number: 8258407
    Abstract: A wiring board is provided to protect an electronic device from static electricity and lightning surge without reducing packaging density. A wiring board is provided with a first wiring pattern (3) including mounting pads (8, 10), on which an electronic device (5) is mounted, a second wiring pattern (21) having lower impedance than the first wiring pattern (3), ICT wirings (13, 15) extending from the mounting pads (8, 10) of the first wiring pattern (3), and ICT pads (17, 19) formed at distal ends of the ICT wirings (13, 15). The ICT wirings (13, 15) extend towards the second wiring pattern (21) so that the ICT pads (13, 15) are in the vicinity of the second wiring pattern (21), and discharge gaps (G) are formed between the ICT pads (13, 15) and the second wiring pattern (21).
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: September 4, 2012
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventor: Koji Kishimoto
  • Patent number: 8253025
    Abstract: Disclosed is a printed circuit board including an electromagnetic bandgap structure. The electromagnetic bandgap structure for blocking a noise is inserted into the printed circuit board. The electromagnetic bandgap structure can include a first conductive plate; a second conductive plate arranged on a planar surface that is different from that of the first conductive plate; a third conductive plate arranged on a planar surface that is different from that of the second conductive plate; and a stitching via unit configured to connect the first conductive plate and the third conductive plate by bypassing the planar surface on which the second conductive plate is arranged and including a first inductor element.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: August 28, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Mi-Ja Han, Dae-Hyun Park
  • Patent number: 8254136
    Abstract: A printed circuit board (“PCB”) includes a first pattern structure, a second pattern structure, a third pattern structure, and a fourth pattern structure. The first pattern structure includes a first ground pattern. The second pattern structure includes a first line pattern overlapping the first ground pattern and a second ground pattern electrically insulated from the first line pattern. The third pattern structure includes a third ground pattern overlapping the first line pattern and a second line pattern overlapping the second ground pattern. The fourth pattern structure includes a fourth ground pattern overlapping the second line pattern. Therefore, the PCB may decrease noise.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: August 28, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwan-Ho Kim, Ick-Kyu Jang, Ji-Man Myeong
  • Patent number: 8248093
    Abstract: An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: August 21, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Guk Han, Seok-Joon Moon
  • Patent number: 8243464
    Abstract: Disclosed is a printed circuit board structure which is manufactured by providing a core board, forming an inner circuit layer on the core board surface, forming a bonding pad on the inner circuit, forming a ring-shaped anti-etching layer on the bonding pad, forming an anti-soldering insulation layer on the ring-shaped anti-etching layer and the bonding pad, and forming an opening to expose a part of the bonding pad, wherein the radius of the opening is shorter than the radius of the ring-shaped anti-etching layer, and the bonding pad surface is free of concave. The described structure may prevent the solder extending along the bottom void of the anti-soldering insulation layer to other regions.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: August 14, 2012
    Assignee: Nan Ya PCB Corp.
    Inventor: Hsien-Chieh Lin
  • Patent number: 8237262
    Abstract: Provided is a method and system for designing an integrated circuit (IC) substrate, the substrate being formed to include at least one die. The method includes providing at least portions of IC power and a grounding function on a metal 2 substrate layer and utilizing all of a metal 3 substrate layer for the grounding function. Portions of the metal 2 layer and a metal 4 layer are utilized for the IC power, wherein all of the IC power is centralized underneath the die.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: August 7, 2012
    Assignee: Broadcom Corporation
    Inventor: Edmund Law
  • Patent number: 8232480
    Abstract: In one embodiment, differential signaling and ground contacts are located in a rectilinear array of rows and columns with ground contacts spaced apart by three times the pitch distance between adjacent rows or columns and signaling contacts are located immediately adjacent the ground contacts. In particular, the two contacts of each differential pair are located one pitch distance apart from each other and one contact of each differential pair of contacts is located one pitch distance from a ground contact and the other contact of the differential pair is located approximately sqrt(2)*pitch distance from the same ground contact. In a second embodiment, differential signaling and ground contacts are located in a hexagonal array with ground contacts located three times the pitch distance between adjacent contacts and signaling contacts located immediately adjacent the ground contacts.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: July 31, 2012
    Assignee: Altera Corporation
    Inventor: Hui Liu
  • Patent number: 8228681
    Abstract: Disclosed herein are a printed circuit board (PCB) and a probe including the same. The probe includes a transducer, a PCB having a pattern part contacting the transducer via face-to-face contact, and a bonding member bonding the transducer to the pattern part of the PCB. The bonding part of the PCB is provided with the pattern part to increase a bonding area of the bonding part and to allow the bonding member to contact not only a metal layer of the bonding part but also an electrical insulation part thereof, thereby improving a bonding force between the transducer and the PCB. As a result, the transducer can be reliably bonded to the PCB, so that performance of the transducer can be prevented from being deteriorated due to defective connection between the PCB and the transducer.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: July 24, 2012
    Assignee: Medison Co., Ltd.
    Inventors: Gil Ju Jin, Jung Lim Park, Jae Yk Kim
  • Patent number: 8228679
    Abstract: In the present electronic structure, a substrate is provided in the form of a circuit board. First and second electronic devices are positioned on opposite sides of the circuit board, each having a plurality of contacts connected to the circuit board. Each of the contacts of the first device is connected to a contact of the second device by a connector though the circuit board. At least one of the contacts of the first device is connected to the contact of the second device which is most adjacent to that contact of the first device across the circuit board.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: July 24, 2012
    Assignee: Spansion LLC
    Inventors: Thomas H. Shilling, Todd Snider, Melissa Grupen-Shemansky
  • Publication number: 20120170239
    Abstract: In one embodiment, a meta-module having circuitry for two or more modules is formed on a substrate, which is preferably a laminated substrate. The circuitry for the different modules is initially formed on the single meta-module. Each module will have one or more component areas in which the circuitry is formed. A metallic structure is formed on or in the substrate for each component area to be shielded. A single body, such as an overmold body, is then formed over all of the modules on the meta-module. At least a portion of the metallic structure for each component area to be shielded is then exposed through the body by a cutting, drilling, or like operation. Next, an electromagnetic shield material is applied to the exterior surface of the body of each of the component areas to be shielded and in contact with the exposed portion of the metallic structures.
    Type: Application
    Filed: March 8, 2012
    Publication date: July 5, 2012
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Ulrik Riis Madsen, Lars Sandahl Ubbesen
  • Patent number: 8203355
    Abstract: An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: June 19, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Guk Han, Seok-Joon Moon
  • Patent number: 8199519
    Abstract: A chip adapter used to install a chip on a first chip arranging area of a circuit board includes a board. The size of the board has the same size as the first chip arranging area of the circuit board. Edges of the chip adapter define a number of gaps corresponding to first pads of the circuit board. A second chip arranging area of the same size as the chip is arranged in a center of the chip adapter. A number of second pads are arranged around the second chip arranging area of the chip adapter corresponding to pins of the chip. Each second pad is electrically connected to a sidewall of the corresponding gap of the chip adapter.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: June 12, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Ming-Chih Hsieh, Heng-Chen Kuo
  • Patent number: 8199521
    Abstract: A memory module includes an electronic printed circuit board with at least one contact strip, a plurality of integrated memory components, at least one first and one second buffer component, and a number of conductor tracks, which proceed from the contact strip and which are arranged on or in the printed circuit board. The conductor tracks include data lines, control lines and address lines. The conductor tracks lead from the contact strip to the buffer components or to one of the buffer components. The printed circuit board has conductor tracks that are interposed between the first buffer component and the second buffer component and that lead from the first buffer component to the second buffer component.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: June 12, 2012
    Assignee: Qimonda AG
    Inventor: Simon Muff
  • Patent number: 8199517
    Abstract: Provided are a flexible printed circuit board (PCB), which can contribute to the reduction of damage to wiring layers and wiring defects regardless of a decrease in the width of wiring layers and can thus contribute to the miniaturization of various products, a method of fabricating the flexible PCB, and a display device having the flexible PCB. The flexible PCB includes a base film, one or more first pad patterns formed on the base film, one or more second pad patterns formed on the base film and connected to the one or more first pad patterns, a cover film formed on the one or more first pad patterns and the base film and exposing the one or more second patterns, and a plurality of expanded portions corresponding to the boundaries between the one or more first pad patterns and the one or more second pad patterns and having a greater width than the one or more first pad patterns and the one or more second pad patterns.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: June 12, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Min Cho, Gyung-Hyun Ko, Heung-Suk Chin
  • Patent number: 8194414
    Abstract: A sensor device includes a communication line having a high-level line and a low-level line, and printed wiring layers. The printed wiring layers are connected to the communication line so as to have a differential communication with an electronic control unit of an occupant protection system. First and second layers are ungrounded, and have a low-level conduction pattern connected to the low-level line and a circuit element having a standard corresponding to the low-level line. Third printed wiring layer is arranged between the first and second layers through insulations, and has a high-level conduction pattern connected to the high-level line.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: June 5, 2012
    Assignee: Denso Corporation
    Inventors: Takashi Inamoto, Tatsuki Tanaka
  • Publication number: 20120127682
    Abstract: A protection circuit board is disclosed. The protection circuit board includes a main printed circuit board and an auxiliary printed circuit board. In the auxiliary printed circuit board, a thermistor is electrically interposed between an external electrode terminal and auxiliary electrodes.
    Type: Application
    Filed: August 18, 2011
    Publication date: May 24, 2012
    Applicant: Samsung SDI Co., Ltd
    Inventor: Young-Cheol Jang
  • Patent number: 8179691
    Abstract: A wired circuit board includes a first insulating layer; a first wire formed on the first insulating layer; a second insulating layer formed on the first insulating layer so as to cover the first wire; and a second wire formed on the second insulating layer so as to be arranged in opposed relation to the first wire in a thickness direction. The thickness of the first wire is 1 ?m or less and is ? or less of the thickness of the second insulating layer.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: May 15, 2012
    Assignee: NITTO DENKO Corporation
    Inventors: Takahiko Yokai, Tetsuya Ohsawa, Yasunari Ooyabu
  • Patent number: 8176628
    Abstract: In accordance with one embodiment, a method of forming a protruding post substrate package includes applying a dielectric layer to a carrier. Via apertures are formed in the dielectric layer. Carrier cavities are formed in the carrier using the dielectric layer as a mask. The carrier cavities are lined with a first metal, the first metal being selectively etchable compared to the carrier. After encapsulation of an electronic component with an encapsulant, the carrier is removed such that protruding posts including the first metal protrude outward from a first surface of the dielectric layer.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: May 15, 2012
    Assignee: Amkor Technology, Inc.
    Inventors: Sukianto Rusli, Ronald Patrick Huemoeller, David Hiner
  • Patent number: 8164918
    Abstract: One embodiment of the present invention provides a system that facilitates reducing the power needed for proximity communication. This system includes an integrated circuit with an array of transmission pads that transmit signals using proximity communication. This array is comprised of a set of macropads, where each given macropad is comprised of a set of micropads that can be configured to transmit a signal. A steering fabric routes signals to and within macropads, such that a subset of the micropads in the array can be configured to transmit the signal to a receiving component. Each macropad receives a limited number of input signals, with the steering fabric routing input signals to the micropads of the macropads. By limiting the number of input signals that are routed to the micropads of the macropads, the steering fabric eliminates redundant steering configurations for the array and reduces the power needed to transmit the signal.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: April 24, 2012
    Assignee: Oracle America, Inc.
    Inventors: Alex Chow, Robert J. Drost, Ronald Ho, Robert Proebsting, Arlene Proebsting, legal representative
  • Patent number: 8143107
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a substrate including: patterning a bonding pad on the substrate, patterning a first signal trace coupled to the bonding pad, patterning a second signal trace on the substrate, and connecting a pedestal on the second signal trace; mounting an integrated circuit on the substrate; and coupling an electrical interconnect between the integrated circuit, the bonding pad, the pedestal, or a combination thereof.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: March 27, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Byung Tai Do, Il Kwon Shim, Seng Guan Chow
  • Patent number: 8130493
    Abstract: A method of arranging a plurality of components of a circuit board for optimal heat dissipation and a circuit apparatus having a plurality of components arranged by performing the method are provided. The method includes arranging a predetermined number of the plurality of components in the order of size of the components in a heat dissipation area having a predetermined width on a virtual straight line connecting the air inlet unit and the air outlet unit.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: March 6, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tae-kwon Na
  • Patent number: 8125789
    Abstract: A wiring substrate includes a plurality of electrode terminals, to which external connection terminals of an electronic component are coupled, arranged in a row on one principal surface thereof, wherein the electrode terminals each include: a first linear portion; a second linear portion extending from an end of the first linear portion in a direction different from a direction of the first linear portion; and a bent portion that is a part where the first linear portion and the second linear portion are connected.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: February 28, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Takao Nishimura
  • Patent number: 8110920
    Abstract: A mounting substrate for a processor includes a die side and a land side with a processor footprint configured on the die side. The processor footprint is coupled to at least one processor interconnect and a microelectronic die is embedded in the mounting substrate. The microelectronic die is coupled to the processor interconnect and communication between a processor to be installed on the processor footprint is in a rate between 10 Gb/s and 1 Tb/s.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: February 7, 2012
    Assignee: Intel Corporation
    Inventors: Sriram Dattaguru, Lesley A. Polka Wood, Yoshihiro Tomita, Kinya Ichikawa, Robert L. Sankman
  • Patent number: 8111521
    Abstract: A microelectronic package having a radio frequency (RF) amplifier circuit and, incorporating harmonic rejection filters and matching circuits integrally formed in the package is disclosed. A harmonic rejection filter may comprise a metal-insulator-metal (MIM) capacitor serially coupled between bond pads disposed on a RF amplifier circuit die, a first wire bond coupling a first bond pad to a package output, where the first bond pad is coupled to the output of the RF amplifier, and a second wire bond coupling a second bond pad to a package ground. The harmonic rejection filter may be appropriately configured to filter one or more harmonics at different frequencies.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: February 7, 2012
    Assignee: Intel Corporation
    Inventors: Telesphor Kamgaing, Emile Davies-Venn
  • Patent number: 8097815
    Abstract: The invention provides a printed circuit board capable of mounting BGA or other IC package of narrow terminal interval by using through-holes of conventional size. On one principal surface of printed circuit board (1), soldering lands (2a), (2b), (2c), and (2d) for connecting solder balls are disposed in lattice. Central point (B) of through-hole (3) is set eccentric to the side of soldering land (2a) at the same potential as through-hole (3), remote from intersection (A) formed by diagonal line (200ab) linking soldering lands (2a) and (2b) and diagonal line (200cd) linking soldering lands (2c) and (2d).
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: January 17, 2012
    Assignee: Panasonic Corporation
    Inventor: Masaki Watanabe
  • Patent number: 8094460
    Abstract: A land pattern, a method of manufacturing a printed circuit board (PCB) and a PCB incorporating a land pattern. In one embodiment, the land pattern includes: (1) a quadrilateral component outline area having diagonally opposed first and second corners and diagonally opposed third and fourth corners, defined according to a body configuration of a particular component type and located on a surface of a substrate and (2) first and second exposed conductive pads located within said area respectively proximate said first and second corners, coupled to respective first and second circuit conductors of said substrate, configured according to a terminal configuration of said type and separated from said third and fourth corners such that a component of said particular component type may be placed on the land pattern in multiple orientations without causing a short circuit.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: January 10, 2012
    Assignee: Alcatel Lucent
    Inventors: Brad G. Magnani, Raymond Eng, Susan M. Plul
  • Patent number: 8089776
    Abstract: A switch configured to contact an exposed contact on an edge of a multilayer circuit board when selectively activated. The switch is particularly useful for electronic equipment such as mobile phones, PDA's, etc. where space for key contacts on the circuit board is limited. By facilitating connection to terminals formed on edges of a circuit board and/or edges of layers of multilayer circuit boards, the switch provides additional options for button locations on the electronic device heretofore requiring routing of wiring.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: January 3, 2012
    Assignee: Sony Ericsson Mobile Communications AB
    Inventors: Tobias Kjerrman, Georgeta Anton, Pontus Bartilsson, Paul Larsson, Mikael Hansson, Bengt Mattsson
  • Patent number: 8080739
    Abstract: A signal connecting component is suitable to be disposed on a circuit board. The signal connecting component includes an insulation element, at least a first bridge line, at least a second bridge line, a plurality of first pins and a plurality of second pins. The first bridge line and the second bridge line are disposed on different layers of the insulation element. The first pins and the second pins are respectively electrically connected to both ends of the first bridge line and both ends of the second bridge line.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: December 20, 2011
    Assignee: Inventec Corporation
    Inventors: Zhi-Gang Ye, Xiao-Jiao Ding, Wen-Kang Fan
  • Publication number: 20110307911
    Abstract: A circuit board for supplying therethrough an electric current to a stator including windings arranged to generate magnetic fields includes a body portion having a rectangular shape when seen in a plan view and mounted with electronic parts, and an extension portion protruding from the body portion substantially along a circumferential direction around a rotation axis of the motor when seen in a plan view. The extension portion includes a distal end extension opposed to the body portion through a gap when seen in a plan view. The transverse width of the extension portion is smaller than the gap. The body portion includes an outward connector portion connected to an external power source or an external circuit board. The extension portion includes a winding connection portion connected to the outward connector portion through a wiring portion. The windings are soldered to the winding connection portion.
    Type: Application
    Filed: June 7, 2011
    Publication date: December 15, 2011
    Applicant: NIDEC CORPORATION
    Inventors: Masahiro Yamada, Satoshi Komatsu