Having Passive Component Patents (Class 361/782)
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Patent number: 8630098Abstract: A circuit board adapted for use in an switching converter for connecting a plurality of switches including a first switch, a second switch, a third switch and a fourth switch. The circuit board has a layout for connecting the switches. The layout is adapted for locating the switches substantially at or symmetrically with respect to the endpoints of a right-angle cross. The right-angle cross is formed from two line segments intersecting with a ninety degree angle. The circuit board may offsets the switches perpendicularly to the line segments at the endpoints of the line segments either in a clockwise or a counterclockwise direction.Type: GrantFiled: June 12, 2009Date of Patent: January 14, 2014Assignee: Solaredge Technologies Ltd.Inventors: Lior Handelsman, Tzachi Glovinsky, Amir Grossberg, Sönke Rogalia, Heribert Schmidt
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Publication number: 20130342998Abstract: An electronic assembly including a substrate, an electronic component, a fixture, and a housing. The substrate includes a first contact array. The electronic component includes a second contact array. The fixture includes an opening adapted to position the electronic component on the substrate and to connect the second contact array to the first contact array when the fixture is aligned at a first position on the substrate. The housing is adapted to hold the substrate populated with the electronic component. The housing includes a first conductive pathway adapted to connect from an external surface at the housing to the substrate in a serial continuous conductive path when the fixture is aligned at the first position on the substrate. The electronic assembly includes a sensing device connected to the continuous conductive path to detect the integrity of the electronic assembly.Type: ApplicationFiled: August 22, 2013Publication date: December 26, 2013Inventor: Kong-Chen Chen
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Patent number: 8612034Abstract: A printed circuit board includes a first signal layer, a first ground layer, a second signal layer, a power layer, a second ground layer, and a third signal layer. The first signal layer includes an analog audio input/output (I/O) port and an audio chip. The audio chip includes a main body, a first group of signal pins connected to the analog audio I/O port, and a second group of signal pins connected to a control chip. The first ground layer, the power layer, and the second ground layer are each divided into an audio part and a digital part. The three audio parts act as a reference plane for traces between the analog audio I/O port and the audio chip, the three digital parts act as reference planes for traces between the control chip and the audio chip.Type: GrantFiled: July 26, 2010Date of Patent: December 17, 2013Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Cheng-Sung Wang
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Publication number: 20130329389Abstract: A chip-component structure includes an interposer on which a multilayer capacitor is mounted. The interposer includes component connecting electrodes, external connection electrodes, side electrodes, and in-hole electrodes. The component connecting electrodes and the external connection electrodes are electrically connected by the side electrodes and the in-hole electrodes. Outer electrodes of the capacitor are joined to the component connecting electrodes.Type: ApplicationFiled: May 31, 2013Publication date: December 12, 2013Inventors: Kazuo HATTORI, Isamu FUJIMOTO
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Patent number: 8604621Abstract: A semiconductor device includes a semiconductor substrate, first and second penetration electrodes each penetrating the semiconductor substrate, a multi-level wiring structure formed on the semiconductor substrate, the multi-level wiring structure including a lower-level wiring, an upper-level wiring and an interlayer insulating film between the lower-level wiring and the upper-level wiring, a first wiring pad formed as the lower-level wiring and electrically connected to the first penetration electrode, a second wiring pad formed as the upper-level wiring, a plurality of first through electrodes each formed in the interlayer insulating film to form an electrical connection between the first and second wiring pads, a third wiring pad formed as the lower-level wiring and electrically connected to the second penetration electrode, a fourth wiring pad formed as the upper-level wiring, and a plurality of second through electrodes each formed in the interlayer insulating film.Type: GrantFiled: December 19, 2012Date of Patent: December 10, 2013Assignee: Elpida Memory, Inc.Inventors: Satoshi Itaya, Kayoko Shibata, Shoji Azuma, Akira Ide
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Patent number: 8593824Abstract: Tamper secure circuitry including a first printed circuit board having mounted thereon circuit components and a slotted anti-tamper grid containing printed circuit board mounted onto the first printed circuit board defining at least one slot and arranged to overlie at least some of the circuit components, which are located in a volume defined by the at least one slot and the first printed circuit board.Type: GrantFiled: October 27, 2010Date of Patent: November 26, 2013Assignee: Verifone, Inc.Inventor: Ehud Kirmayer
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Patent number: 8582317Abstract: A semiconductor component and a method of manufacturing the semiconductor component that reduces parasitic elements. A semiconductor chip is coupled to a semiconductor chip receiving area of a support structure. The semiconductor chip has at least two power semiconductor devices. A drain contact of a first power semiconductor device is coupled to a source contact of a second power semiconductor device and the drain and source contacts of the first and second power semiconductor devices are joined to the semiconductor chip receiving area. Another semiconductor chip may be bonded to a second semiconductor chip receiving area of the support structure. An energy storage element may be coupled between the source contact of the first power semiconductor device and the drain contact of the second semiconductor device. A protective structure may be formed over the semiconductor chips and the energy storage element.Type: GrantFiled: May 26, 2010Date of Patent: November 12, 2013Assignee: Semiconductor Components Industries, LLCInventors: Yenting Wen, Kisun Lee, Michael Stapleton, Gary H. Loechelt
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Patent number: 8581114Abstract: A packaged structure having a magnetic component and a method of manufacturing the same are provided. The packaged structure includes an insulating substrate having a ring-typed recess, an island portion and a surrounding portion defined by the ring-typed recess, wherein the ring-typed recess is laterally between the island portion and the surrounding portion.Type: GrantFiled: February 3, 2010Date of Patent: November 12, 2013Assignees: Planarmag, Inc., Mutual-Tek Industries Co., Ltd.Inventors: William Lee Harrison, Jung-Chien Chang
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Patent number: 8576574Abstract: A conductive paint electromagnetic interference (EMI) shield for an electronic module or device. The conductive paint is composed of metal particles suspended in a fluidic carrier. In one embodiment, the conductive paint is sprayed onto exterior surfaces of an electronic module or device from a spray gun. The sprayed conductive paint is cured to remove the fluidic carrier, leaving a metal film coated to the outside of the module or device. In one embodiment used with electronic packages in array form, grooves are cut into an encapsulation material of a module so that the shield protection includes sidewalls of the package. In another embodiment used with camera modules, masking is used to selectively shield portions of the module. In a further embodiment, the shield is electrically connected to a ground conductor of a circuit of the electronic module.Type: GrantFiled: April 21, 2010Date of Patent: November 5, 2013Assignee: STMicroelectronics Pte Ltd.Inventors: Wingshenq Wong, David Gani, Glenn De Los Reyes
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Patent number: 8570768Abstract: A transformer assembly is disclosed. An example circuit board assembly includes a circuit board. A drum core inductor is also included and has a drum core, a first winding, and first and second terminals extending from a first end of the drum core inductor. A wire of the first winding is wound around an axis of the drum core. The first winding has first and second ends coupled to the first and second terminals of the drum core inductor, respectively. A bobbin has first and second terminals extending from a first end of the bobbin. A wire of a second winding is wound around an axis of the bobbin. The second winding has first and second ends coupled to the first and second terminals of the bobbin, respectively. The first ends of the drum core inductor and the bobbin are attached to a circuit board such that the drum core inductor is positioned on the circuit board inside an opening of the bobbin defined along the axis of the bobbin. The drum core inductor and the bobbin are detached from one another.Type: GrantFiled: April 15, 2011Date of Patent: October 29, 2013Assignee: Power Integrations, Inc.Inventor: Eng Hwee Quek
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Patent number: 8569633Abstract: A hermetically sealed microelectromechanical system (MEMS) package for an implantable medical device is presented. The MEMS comprises a first substrate that includes an aperture. A feedthrough assembly is coupled to the aperture, the feedthrough assembly comprises a conductive element housed in a glass insulator member. A second substrate is coupled to the first substrate.Type: GrantFiled: November 30, 2007Date of Patent: October 29, 2013Assignee: Medtronic, Inc.Inventors: Rogier Receveur, Michael A. Schugt, William J. Taylor, Brad C. Tischendorf
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Publication number: 20130279137Abstract: An energy storage structure includes an energy storage device containing at least one porous structure (110, 120, 510, 1010) that contains multiple channels (111, 121), each one of which has an opening (112, 122) to a surface (115, 116, 515, 516, 1015, 1116) of the porous structure, and further includes a support structure (102, 402, 502, 1002) for the energy storage device. In a particular embodiment, the porous structure and the support structure are both formed from a first material, and the support structure physically contacts a first portion (513, 813, 1213) of the energy storage device and exposes a second portion (514, 814, 1214) of the energy storage device.Type: ApplicationFiled: November 3, 2011Publication date: October 24, 2013Inventors: Donald S. Gardner, Zhaohui Chen, Wei C. Jin, Eric C. Hannah, John L. Gustafson, Tomm V. Aldridge
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Publication number: 20130271938Abstract: Techniques are disclosed for integrating capacitors among the metal interconnect for embedded DRAM applications. In some embodiments, the technique uses a wet etch to completely remove the interconnect metal (e.g., copper) that is exposed prior to the capacitor formation. This interconnect metal removal precludes that metal from contaminating the hi-k dielectric of the capacitor. Another benefit is increased height (surface area) of the capacitor, which allows for increased charge storage. In one example embodiment, an integrated circuit device is provided that includes a substrate having at least a portion of a DRAM bit cell circuitry, an interconnect layer on the substrate and including one or more metal-containing interconnect features, and a capacitor at least partly in the interconnect layer and occupying space from which a metal-containing interconnect feature was removed. The integrated circuit device can be, for example, a processor or a communications device.Type: ApplicationFiled: October 7, 2011Publication date: October 17, 2013Applicant: INTEL CORPORATIONInventors: Nick Lindert, Joseph M. Steigerwald, Kanwal Jit Singh
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Patent number: 8559190Abstract: Methods and apparatus for memory systems with memory chips are described. In an embodiment, a system includes a memory controller chip, memory chips, and a module connector each on a first substrate and at least two groups of conductors to provide read data signals from at least some of the memory chips to the memory controller chip and to provide read data signals from the connector to the memory controller chip. Furthermore, a memory module is inserted in the module connector and including memory chips on a second substrate at least some of which are to receive signals from at least some for the memory chips on the first substrate and at least some of which are to provide the read data signals to be provided to the second group of conductors. Other embodiments are described.Type: GrantFiled: August 2, 2011Date of Patent: October 15, 2013Assignee: Intel CorporationInventor: Randy B. Osborne
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Publication number: 20130258627Abstract: Various resistor circuits and methods of making and using the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a resistor onboard an interposer. The resistor is adapted to dampen a capacitive network. The capacitive network has at least one capacitor positioned external to the interposer.Type: ApplicationFiled: March 30, 2012Publication date: October 3, 2013Inventors: Fei Guo, Feng Zhu, Julius Din, Anwar Kashem, Sally Yeung
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Patent number: 8546922Abstract: A wiring board including a core substrate made of an insulative material and having a penetrating portion, a first interlayer insulation layer formed on the surface of the core substrate, a first conductive circuit formed on the surface of the first interlayer insulation layer, a first via conductor formed in the first interlayer insulation layer, and an electronic component accommodated in the penetrating portion of the core substrate and including a semiconductor element, a bump body mounted on the semiconductor element, a conductive circuit connected to the bump body, an interlayer resin insulation layer formed on the conductive circuit, and a via conductor formed in the interlayer resin insulation layer. The first via conductor has a tapering direction which is opposite of a tapering direction of the via conductor in the electronic component.Type: GrantFiled: September 28, 2011Date of Patent: October 1, 2013Assignee: Ibiden Co., Ltd.Inventors: Toshiki Furutani, Daiki Komatsu, Nobuya Takahashi, Masatoshi Kunieda, Naomi Fujita, Koichi Tsunoda, Minetaka Oyama, Toshimasa Yano
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Patent number: 8547707Abstract: An electronic device is disclosed for coupling to a target platform, which includes a multitude of pad contacts. The electronic device includes a substrate, a multitude of pad contacts on the substrate, and a multitude of contact regions in one of the of pad contacts on the substrate. Each of the multitude of pad contacts on the substrate electrically couples to a corresponding one of the multitude of pad contacts on the target platform when the substrate and the target platform are assembled. The multitude of contact regions corresponds to one of the multitude of pad contacts on the target platform when the substrate and the target platform are assembled.Type: GrantFiled: July 17, 2012Date of Patent: October 1, 2013Assignee: Wintec Industries, Inc.Inventor: Kong-Chen Chen
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Patent number: 8525630Abstract: A laminated inductor having a laminate structure constituted by magnetic layers and internal conductive wire-forming layers, wherein the magnetic layer is formed by soft magnetic alloy grains, the internal conductive wire-forming layer has an internal conductive wire and a reverse pattern portion around it, and the reverse pattern portion is formed by soft magnetic alloy grains whose constituent elements are of the same types as those of, and whose average grain size is greater than that of, the soft magnetic alloy grains constituting the magnetic layer.Type: GrantFiled: March 23, 2012Date of Patent: September 3, 2013Assignee: Taiyo Yuden Co., Ltd.Inventors: Tomomi Kobayashi, Hitoshi Matsuura, Takayuki Arai, Masahiro Hachiya, Kenji Otake
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Patent number: 8520399Abstract: An electronics module has a flexible substrate having conductors, an array of functional components on the substrate, the functional components arranged to contact at least one conductor, and perforations in the flexible substrate, the perforations arranged to increase stretchability of the flexible substrate, the conductor arranged around the perforation and the functional components arranged to one of reside between the perforations or partially cover the perforations. A method of manufacturing a flexible electronics module involves mounting at least two functional components onto a flexible substrate, forming electrical interconnects configured to provide connection between the two functional components, and perforating the flexible substrate with cuts configured to increase stretchability of the substrate.Type: GrantFiled: October 29, 2010Date of Patent: August 27, 2013Assignee: Palo Alto Research Center IncorporatedInventor: Jurgen H. Daniel
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Patent number: 8508235Abstract: An electronic device, and associated method, provided with a circuit board (10), with a set of input contacts (IN/COM), a set of output contacts (OUT/COM) and an electrical circuit (18) connected between the input contacts (IN/COM) and the output contacts (OUT/COM) and a controller. The controller carries out a real-time test of the circuit board using a test signal introduced into the electrical circuit, the electrical circuit (18) being designed as a passive network having a characteristic transfer function and provided with at least one capacitive element, wherein the capacitive element is a conductor surface (221) forming a capacitor in the assembled state with a corresponding, device-side conductor surface (222?), which is connected to the electrical circuit (18) via a contact element in the assembled state, whereby the capacitive value of the capacitive element in the assembled state differs from the capacitive value of the capacitive element in the disassembled state.Type: GrantFiled: December 2, 2010Date of Patent: August 13, 2013Assignee: Sartorius Weighing Technology GmbHInventors: Swen Weitemeier, Christian Oldendorf
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Patent number: 8508236Abstract: An electronic device, and associated method, provided with a circuit board (10), with a set of input contacts (IN/COM), a set of output contacts (OUT/COM) and an electrical circuit (18) connected between the input contacts (IN/COM) and the output contacts (OUT/COM) and a controller. The controller carries out a real-time test of the circuit board using a test signal introduced into the electrical circuit, the electrical circuit (18) being designed as a passive network having a characteristic transfer function and provided with at least two separate partial circuits (18?, 18?) wherein the separate partial circuits are electrically connected in the assembled state by cooperation with at least one of: at least one device components and/or assembly components (181).Type: GrantFiled: December 2, 2010Date of Patent: August 13, 2013Assignee: Sartorius Weighing Technology GmbHInventors: Swen Weitemeier, Christian Oldendorf
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Publication number: 20130201645Abstract: An inductor assembly comprising a first magnetic core and an electrically conductive material configured to wind around at least a portion of the first magnetic core. The electrical conductive material has one or more support structures that extend beyond an outside boundary of the first magnetic core.Type: ApplicationFiled: February 6, 2012Publication date: August 8, 2013Inventor: Robert Catalano
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Publication number: 20130201631Abstract: A multilayer electronics assembly and associated method of manufacture are provided. The multilayer electronics assembly includes a plurality of stacked substrate layers. Each of the substrate layers is fusion bonded to at least an adjacent one of the plurality of substrate layers. A first discrete electrical circuit component is bonded to a first layer of the plurality of layers. A bonding material is interposed between the discrete electrical circuit component and the first layer. The bonding material has a reflow temperature at which the bonding material becomes flowable that is higher than a fusion bonding temperature of the substrate layers.Type: ApplicationFiled: February 4, 2013Publication date: August 8, 2013Applicant: CRANE ELECTRONICS, INC.Inventor: Crane Electronics, Inc.
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Patent number: 8503188Abstract: A mountable electronic circuit module which produces appropriate characteristics without a complicated structure can be a DC-DC converter including a baseboard made of a magnetic material. A helical electrode is provided in the baseboard so as to function as a smoothing inductor device. Capacitor devices in addition to a DC-DC converter IC are mounted on a main surface of the baseboard. A circuit electrode arranged to connect the circuit devices is provided to enable the circuit devices to function as the DC-DC converter. The DC-DC converter is mounted on a motherboard through external connection electrodes of the capacitor devices.Type: GrantFiled: April 27, 2011Date of Patent: August 6, 2013Assignee: Murata Manufacturing Co., Ltd.Inventor: Katsumi Taniguchi
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Publication number: 20130194767Abstract: A multi-inductor usable with a slim flat image display apparatus which includes an outer core with a number of through holes formed therein in a horizontal direction; a corresponding number of inner cores provided in respective through holes; a number of windings wound around a respective inner core; a number of electrode leads which project from a bottom surface of the outer core perpendicular to central axes of the through holes. The plurality of electrode are electrically connected with opposite ends of each of the windings. The multi-inductor further includes a sealing member that fixes each of the inner cores to a respective through hole of the outer core.Type: ApplicationFiled: August 15, 2012Publication date: August 1, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Jeong-il KANG
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Publication number: 20130194766Abstract: A signal filter mounting structure includes a circuit board having two spaced lines of metal contacts, a box mounted on the circuit board between the two spaced lines of metal contacts and having two lines of upright bars arranged at opposing front and back sides thereof and a wire management groove defined between each two adjacent upright bars, and signal filters accommodated in the box in reversed directions, each signal filter including a magnetic coil and a plurality of conductor wires wound on the magnetic coil with the end portions thereof respectively extending out of the box through the wire management grooves and respectively soldered to the metal contacts of the circuit board.Type: ApplicationFiled: January 31, 2012Publication date: August 1, 2013Applicant: U.D.ELECTRONIC CORP.Inventor: Po-Jung CHEN
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Publication number: 20130187480Abstract: A DC-DC converter module includes a multi-layer substrate, a switching IC, and a coil. The multi-layer substrate includes component mounting electrodes provided on the top surface and an input terminal, an output terminal, and ground terminals provided on the bottom surface. The switching IC switches an input voltage and includes an input electrode, an output electrode, and a ground electrode, and is mounted on the top surface of the substrate by connecting the electrodes to the component mounting electrodes. The coil is arranged within the multi-layer substrate in a spiral shape with an axis extending in the substrate stacking direction. The bottom surface side end of the coil is connected to the input/output electrode of the switching IC.Type: ApplicationFiled: March 11, 2013Publication date: July 25, 2013Applicant: Murata Manufacturing Co., Ltd.Inventor: Murata Manufacturing Co., Ltd.
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Publication number: 20130182401Abstract: A wiring board includes a substrate which has multiple opening portions and one or more boundary portions separating the opening portions, multiple electronic devices positioned in the opening portions of the substrate, respectively, a conductive pattern formed on a surface of the boundary portion, and an insulation layer formed on the substrate and the conductive pattern on the boundary portion of the substrate such that the insulation layer covers the electronic devices in the opening portions of the substrate.Type: ApplicationFiled: November 28, 2012Publication date: July 18, 2013Applicant: IBIDEN CO., LTD.Inventor: IBIDEN CO., LTD.
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Patent number: 8474126Abstract: A manufacturing method of a semiconductor device include forming a capacitor by forming an oxide film on a surface of a valve metal based on anodic oxidization and by forming a conductive part made of a conductive material on the oxide film; adhering the capacitor on a semiconductor element mounted on a supporting substrate; and coupling the capacitor to the supporting substrate via an outside connection terminal.Type: GrantFiled: August 9, 2011Date of Patent: July 2, 2013Assignee: Fujitsu LimitedInventors: Takeshi Shioga, Kazuaki Kurihara
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Publication number: 20130154411Abstract: An electromagnetic compatibility (EMC) shielding printed circuit board (PCB) has at least a routing layer and a ground layer. The shielding PCB has an opening that receives a motor bushing and at least one opening that receives motor terminals.Type: ApplicationFiled: December 16, 2011Publication date: June 20, 2013Applicant: CONTINENTAL AUTOMOTIVE SYSTEMS, INC.Inventors: Nicholas Lee Mawhinney, Andrew Malcolm Haig, Michael Zaitz
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Patent number: 8467193Abstract: A resin board is fixed to a plate member made of metal by a fixing member. A semi-conductor module and a capacitor are mounted on a first surface of the resin board. A first ground pattern is formed on the first surface and electrically connected to the plate member by means of the fixing member. A connector is also provided on the first surface such that the first ground pattern is interposed between the semi-conductor module and the connector. The heat from the semi-conductor module and the capacitor is transmitted to the plate member via the first ground pattern and the fixing member.Type: GrantFiled: September 2, 2011Date of Patent: June 18, 2013Assignee: Denso CorporationInventor: Shinsuke Oota
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Publication number: 20130141834Abstract: The present disclosure is directed to a device and a method for achieving a precise capacitance of a capacitor. The method includes trimming a first capacitance of the capacitor to a second capacitance, the capacitor having a first conductive layer separated from a second conductive layer by a dielectric layer. Changing a first dielectric constant of the dielectric layer to a second dielectric constant, where the first dielectric constant corresponding to the first capacitance and the second dielectric constant corresponding to the second dielectric constant includes heating the dielectric layer above a threshold temperature for a time period. The heat is provided by either one of the plates of the capacitor or from a separate heater.Type: ApplicationFiled: December 2, 2011Publication date: June 6, 2013Applicant: STMicroelectronics Pte Ltd.Inventors: Olivier Le Neel, Ravi Shankar
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Publication number: 20130141886Abstract: An electronic package structure including at least one first electronic element, a second electronic element and a lead frame is provided. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.Type: ApplicationFiled: January 31, 2013Publication date: June 6, 2013Applicant: CYNTEC CO., LTD.Inventor: Cyntec Co., Ltd.
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Patent number: 8456854Abstract: A repair system which prevents heating of weakly heat resistant devices together and causing deterioration of the quality when preheating a first surface of the circuit board, wherein an electromagnetic induction material is buried in advance inside the circuit board near a specific electronic device envisioned as needed repair when becoming a defective electronic device in a production process and an electromagnetic coil emitting electromagnetic waves to an electromagnetic induction member in the vicinity of the repair device is provided and the heat generated by the electromagnetic induction member due to the electromagnetic waves enables the repair device to be heated and detached from the circuit board.Type: GrantFiled: October 9, 2008Date of Patent: June 4, 2013Assignee: Fujitsu LimitedInventors: Shigeo Iriguchi, Kiyoyuki Hatanaka, Satoshi Watanabe, Nobuo Taketomi, Keiichi Yamamoto, Masaru Sugie
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Patent number: 8456855Abstract: A printed circuit board includes a first to a fifth connector pads, a first to an eighth coupling capacitor pads, a first to a tenth transmission lines, a first via and a second via, a first to a fourth sharing pads, and a voltage converting circuit. The printed circuit board is operable to selectively support different types of connectors.Type: GrantFiled: August 18, 2011Date of Patent: June 4, 2013Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Yung-Chieh Chen, Duen-Yi Ho, Shou-Kuo Hsu
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Publication number: 20130135835Abstract: A printed circuit board includes an antenna, an EMI source, and inductor. The EMI source is connected to the printed circuit board by a pin. The inductor is connected between the pin and a ground of the printed circuit board. The connected inductor increases the resonant frequency of the EMI source to make the resonant frequency of EMI source away from the antenna. Thereby the EMI generated by the EMI source is decreased and the radiation efficiency of the antenna increases.Type: ApplicationFiled: December 20, 2011Publication date: May 30, 2013Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: HSIN-HUNG LIU, SHU-WEI CHANG, FU-HSIUNG YANG
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Patent number: 8452989Abstract: A technique provides security to an electronic device. The technique involves disposing a microprocessor between a printed circuit board and a circuit element to restrict physical access to the microprocessor, the microprocessor having (i) a bottom which faces the printed circuit board in a first direction and (ii) a top which faces the circuit element in a second direction which is opposite the first direction. The technique further involves delivering power to the microprocessor from a power source while the microprocessor is disposed between the printed circuit board and the circuit element, the microprocessor performing electronic operations in response to the power delivered from the power source. The technique further involves electronically altering or preventing the microprocessor from further performing the electronic operations in response to tampering activity on the circuit element. Such detection of the tampering activity may involve monitoring a covert signal for tamper evidence detection.Type: GrantFiled: December 9, 2009Date of Patent: May 28, 2013Assignee: EMC CorporationInventors: Todd Morneau, William Duane
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Publication number: 20130120949Abstract: A method of manufacturing a passive component module, comprising the steps of: providing a carrier with alignment marks; bonding passive components to the carrier based on the alignment marks, wherein each passive component has interconnection pads; forming a molding material over the carrier for molding the passive components; separating the molding material with the passive components from the carrier; exposing all interconnection pads of each passive component; and building electrical interconnections between the passive components so that the passive component module is obtained.Type: ApplicationFiled: November 16, 2011Publication date: May 16, 2013Inventor: Tien-Wei SUN
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Publication number: 20130120950Abstract: A bandpass filter module includes a mounting board and a BPF chip mounted on a surface thereof. The BPF chip includes three or more resonators; a first-stage resonator located closest to an input terminal, a final-stage resonator located closest to an output terminal, and a middle-stage resonator connected between the first-stage and the final-stage resonators and located in a chip middle zone. The mounting board includes an area overlapping with the chip middle zone, viewed in plan, defining a ground-free space in which no ground electrode is disposed. The ground-free space is formed at least from the surface of the mounting board to a depth position at which a topmost internal wiring layer is located. The middle-stage resonator is prevented from being coupled to ground electrodes on the mounting board and from a lower Q-value and increased insertion loss.Type: ApplicationFiled: July 21, 2011Publication date: May 16, 2013Applicant: TDK CorporationInventors: Shigemitsu Tomaki, Yoshikazu Tsuya, Masamichi Tanaka, Isao Abe
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Patent number: 8441807Abstract: An electronic circuit is obtained that has reduced EMI levels. The circuit includes an integrated circuit, which is a source of noise, a bypass capacitor, and a circuit substrate on which they are mounted. An electronic circuit one electrode terminal of the bypass capacitor and one connecting electrode of the integrated circuit are connected through a first wire interconnect formed in the circuit substrate, and, additionally, another electrode terminal of the bypass capacitor and another connecting electrode of the integrated circuit are connected through a second wire interconnect, and the gap between the first wire interconnect and the second wire interconnect is made smaller than either the gap between the one connecting electrode and the other connecting electrode on the integrated circuit or the gap between the one electrode terminal and the other electrode terminal of the bypass capacitor.Type: GrantFiled: March 4, 2011Date of Patent: May 14, 2013Assignee: Panasonic CorporationInventors: Naofumi Kitano, Toshiro Nishimura
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Patent number: 8437143Abstract: A method for controlling an electronic device is provided. The electronic device includes a housing, a keypad, a first conductive surface, and a second conductive surface. The keypad is rotatable and includes buttons. The first conductive surface is attached to the bottom of the keypad, rotatable with the keypad, and includes first contact portions. The second conductive surface is fixed in the housing, arranged below the first conductive surface, spaced apart from the first conductive surface, and includes second contact portions. The method includes determining which of the buttons is pressed. Determining whether an activation signal is received, wherein when the first contact portion contacts one of the second contact portions which shape is the same as the first contact portion, the activation signal is generated. Determining the pressed button is activated if the activation signal is received, and executing a function corresponding to the activated button.Type: GrantFiled: August 24, 2010Date of Patent: May 7, 2013Assignees: Fu Tai Hua Industry (Shenzhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventor: Zhong Xu
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Publication number: 20130107486Abstract: An apparatus comprising: first and second circuit boards with respective electrodes thereon, the first and second circuit boards in a bonded configuration; One or more first layers positioned to be proximal to the one or more of the electrodes; electrolyte proximal to the respective electrodes; one or more second layers configured to provide for the bonded configuration in which the first and second circuit boards are bonded together, under curing, such that the respective one or more first layers are positioned between the one or more second layers and the electrodes, the bonding defining a chamber therebetween with the electrodes therein and facing one another, the chamber comprising the electrolyte; and wherein the one or more first layers are configured to inhibit interaction of the electrolyte with the one or more second layers during curing.Type: ApplicationFiled: August 21, 2012Publication date: May 2, 2013Inventor: Pritesh HIRALAL
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Patent number: 8427840Abstract: A multi-chip module is disclosed to include a pin frame, an electric power switch chip, and a battery protection chip. The pin frame has a chip placement region and six pins. The second pin and the fifth pin are electrically connected at the chip placement region, and the other pins are set electrically isolated from each other. A bottom surface of the electric power switch chip is electrically connected at the chip placement region, and a top surface thereof is electrically connected to the first pin and the third pin. A bottom surface of the battery protection chip is disposed at the top surface of the electric power switch chip in an electrically isolated fashion. A top surface of the battery protection chip is electrically connected to the top surface of the electric power switch chip, the first pin, the fourth pin, and the sixth pin.Type: GrantFiled: November 22, 2010Date of Patent: April 23, 2013Assignee: Fortune Semiconductor CorporationInventors: Kuo-Chiang Chen, Arthur Shaoyan Rong, Chen Hsing Liu, Yen-Yi Chen
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Patent number: 8416578Abstract: The manufacturing method for electronic substrate includes: forming an active region on a first face of a substrate; forming a first part of an interconnection pattern as a passive element on a second face of the substrate; forming an insulating layer as a stress-relieving layer on the second face of the substrate; and forming a second part of the interconnection pattern as the passive element on the insulating layer.Type: GrantFiled: May 18, 2010Date of Patent: April 9, 2013Assignee: Seiko Epson CorporationInventor: Nobuaki Hashimoto
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Publication number: 20130083484Abstract: A composite electronic component includes electronic components, a conductor layer, and a support. Each of the electronic components includes a first terminal electrode and a second terminal electrode that are arranged on respective opposing surfaces of an element body. The conductor layer electrically connects the first terminal electrodes of the electronic components to one another. The conductor layer is arranged on the support. The second terminal electrodes of the electronic components function as mounting terminal electrodes to be connected to terminals of a circuit substrate.Type: ApplicationFiled: September 25, 2012Publication date: April 4, 2013Applicant: TDK CORPORATIONInventor: TDK Corporation
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Patent number: 8411457Abstract: A semiconductor package substrate suitable for supporting a damage-sensitive device, including a substrate core having a first and opposite surface; at least one pair of metal layers covering the first and opposite surfaces of the package substrate core, which define first and opposite metal layer groups, at least one of said layer groups including at least one metal support zone; one pair of solder mask layers covering the outermost metal layers of the at least one pair of metal layers; and a plurality of routing lines; wherein the at least one metal support zone is formed so that it lies beneath at least one side of the base of the damage-sensitive device and so as to occupy a substantial portion of the area beneath the damage-sensitive device which is free of said routing lines; a method for the production of such substrate is also described.Type: GrantFiled: November 10, 2009Date of Patent: April 2, 2013Assignee: STMIcroelectronics S.r.l.Inventors: Federico Ziglioli, Giovanni Graziosi, Mario Cortese
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Patent number: 8411458Abstract: An apparatus capable of selectively applying different types of connectors to a substrate is disclosed. The memory apparatus includes a substrate having a controller. First and second connector pads may be arranged on edges of top and bottom surfaces of the substrate. A via hole may be arranged between the controller and the first and second connector pads. A first passive device pad may be arranged between the via hole and the first connector pads. A second passive device pad may be arranged between the via hole and the second connector pads. A passive device may be coupled to only one of the first passive device pad or the second passive device pad.Type: GrantFiled: May 21, 2010Date of Patent: April 2, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Kwang-soo Park, Kyung-suk Kim
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Patent number: 8395407Abstract: An electronic device, and associated method, provided with a circuit board (10) with a set of input contacts (IN/COM), a set of output contacts (OUT/COM) and an electrical circuit (18) connected between the input contacts (IN/COM) and the output contacts (OUT/COM), and a controller. The controller carries out a real-time test of the circuit board using a test signal introduced into the electrical circuit, the electrical circuit (18) being designed as a passive network having a characteristic transfer function and provided with at least one inductive element, which is formed by a conductor wire (201) wound into a coil around a break (202) in the circuit board (10), which in the assembled condition, is penetrated by a ferromagnetic bar or fixing pin (203), such that the inductance of the inductive element in the assembled state differs from the inductance thereof in the disassembled state.Type: GrantFiled: December 2, 2010Date of Patent: March 12, 2013Assignee: Sartorius Weighing Technology GmbHInventors: Swen Weitemeier, Christian Oldendorf
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Patent number: 8395902Abstract: An electronic apparatus includes an electronic component electrically connected to a substrate positioned beneath the electronic component. A member includes a plurality of decoupling capacitors having different voltages, and the decoupling capacitors are electrically connected to the electronic component. A plurality of voltage planes in the member are electrically connected to the decoupling capacitors. The decoupling capacitors, via the voltage planes in the member, provide different voltages to the voltage planes and thus the electronic component.Type: GrantFiled: May 21, 2008Date of Patent: March 12, 2013Assignee: International Business Machines CorporationInventor: John U. Knickerbocker
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Patent number: 8389870Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.Type: GrantFiled: March 9, 2010Date of Patent: March 5, 2013Assignee: International Business Machines CorporationInventors: Kevin Bills, Mahesh Bohra, Jinwoo Choi, Tae Hong Kim, Rohan Mandrekar