Interconnection Details Patents (Class 361/803)
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Patent number: 8040687Abstract: A retractable locking mechanism comprising: a lever having a handle end opposite a rotation end and a pivot point positioned between the handle end and the rotation end such that the lever pivots about an axis of rotation of the lever; a first cam positioned on the rotation end of the lever; an actuator with a front end and a back end, the front end attached to the pivot point of the lever; a lock disposed adjacent to the actuator and the lock having a first end and a second end and an axis of rotation of the lock; a second cam attached to the lock for bearing on the back end of the actuator; and wherein pivoting the lever moves the actuator along a plane of the actuator to contact and rotate the second cam such that the lock is disposed in one of a locked state and an unlocked state.Type: GrantFiled: March 27, 2008Date of Patent: October 18, 2011Assignee: Methode Electronics, Inc.Inventor: Alexandros Pirillis
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Publication number: 20110249419Abstract: A circuit board assembly includes a circuit board, a daughter card, and a connecting bracket with a supporting portion. The circuit board includes a first connector and a first position element. The daughter card includes a second connector and a second position element. A first connecting portion extends down from the supporting portion, a second connecting portion extends up from the supporting portion and is electrically connected to the first connecting portion. Two position portions extend from the supporting portion. The first connector of the circuit board is connected to the first connecting portion of the connecting bracket. The second connector of the daughter card is connected to the second connecting portion of the connecting bracket. The first position element of the circuit board and the second position element of the daughter card are latched with the position portions of the connecting bracket, respectively.Type: ApplicationFiled: April 20, 2010Publication date: October 13, 2011Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: ZHENG-HENG SUN
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Publication number: 20110228503Abstract: A power structure including a circuit board, a power transforming circuit board, and a fixing element is provided. The circuit board includes a substrate, a set of power supply connector, and a first power output structure. The set of power supply connector and the first power output structure are electrically connected. The first power output structure has a first fixing hole and at least one cable connecting hole. The power transforming circuit board has a power input structure and at least one power transforming circuit. The power input structure having a second fixing hole is electrically connected to the power transforming circuits. The fixing element penetrates through the first fixing hole of the first power output structure and the second fixing hole of the power input structure, so as to electrically connect the first power output structure to the power input structure.Type: ApplicationFiled: March 19, 2010Publication date: September 22, 2011Applicants: FSP TECHNOLOGY INC., 3Y POWER TECHNOLOGY (TAIWAN), INC.Inventor: Shao-Feng Lu
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Patent number: 8023282Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.Type: GrantFiled: September 18, 2007Date of Patent: September 20, 2011Assignee: Princo Corp.Inventor: Chih-kuang Yang
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Patent number: 8023283Abstract: A portable electronic device includes a main body and a supporting stand. The main body defines a sliding groove. The supporting stand includes a fixed bracket assembled in the sliding groove of the main body, and a rotatable bracket rotatably connected to the fixed bracket. The fixed bracket defines a receiving groove. The rotatable bracket is received in the receiving groove of the fixed bracket at a first state, and the rotatable bracket is rotated out from the receiving groove of the fixed bracket at a second state to support the portable electronic device to stand on a flat surface.Type: GrantFiled: May 21, 2009Date of Patent: September 20, 2011Assignee: Chi Mei Communication Systems, Inc.Inventors: Shih-Tse Cheng, Ching-Chin Pun
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Patent number: 8023280Abstract: A system and method is provided for transmitting a signal to a plurality of slave devices (e.g., memory devices, etc.) via a communication circuit having a plurality of segments that are substantially equal in length and/or impedance. Specifically, according to one embodiment of the invention, an electronic system includes a processor, a plurality of memory devices, and a communication circuit (i.e., a bus) having a central node and a plurality of segments. Specifically, the plurality of segments are used to connect the plurality of devices (e.g., the processor, the plurality of memory devices) to the central node. For example, the processor is connected to the central node via a primary segment, the first memory device (M0) is connected to the central node via a first segment, etc. In one embodiment of the invention, the plurality of segments are substantially equal in length. In other words, the central node is substantially electrically-equidistant from each memory device.Type: GrantFiled: August 7, 2003Date of Patent: September 20, 2011Assignee: QUALCOMM IncorporatedInventor: Quang Nguyen
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Patent number: 8018738Abstract: A voltage regulator. The voltage regulator includes an interposer having, on a first side, a plurality of electrical connections suitable for coupling to a printed circuit board (PCB). The interposer also includes at least one power plane and at least one ground plane, wherein each of the power and ground planes is coupled to one or more of the electrical connections. The voltage regulator further includes a DC-DC converter that is electro-mechanically attachable to and detachable from the interposer. The interposer includes a socket, on a second side, that is suitable to receive two or more electro-mechanical connecting members of the DC-DC converter. When the DC-DC converter is attached to the interposer, at least one of the electromechanical connecting members is electrically coupled to a power plane of the interposer, while at least one other one of the electromechanical connecting members is electrically coupled to the ground plane.Type: GrantFiled: June 2, 2008Date of Patent: September 13, 2011Assignee: Oracle America, Inc.,Inventors: Drew G. Doblar, Prabhansu Chakrabarti, Michael J. Bushue
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Patent number: 8018737Abstract: The invention provides a connecting structure of a circuit board, a connecting part of the circuit board, and an electronic device capable of alleviating a temperature difference between the connecting parts under hot pressure welding. A connecting structure 10 of a circuit board comprises a first circuit board 11 and a second circuit board 12, with a first connecting part 15 and a second connecting part 16 opposedly disposed via an adhesive 13. The first connecting part 15 and the second connecting part 16 are pinched by a pair of pressurizing jigs 20 and subjected to hot pressure welding so that first circuit patterns 17 and second circuit patterns 18 are in contact with each other.Type: GrantFiled: December 22, 2005Date of Patent: September 13, 2011Assignee: Panasonic CorporationInventors: Yoshihito Fujiwara, Masahito Kawabata
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Patent number: 8018733Abstract: A circuit board interconnection system is disclosed according to the embodiments of the present invention. The system includes a first circuit board, a second circuit board, a third circuit board, a first connector and a second connector. The first connector and the second connector are mounted at two sides of the first circuit board respectively so that the second circuit board mounted on the first connector is perpendicular to the third circuit board on the second connector. The first connector and the second connector mounted respectively at two sides of the first circuit board are coupled to each other via an impedance controlled mechanism on the first circuit board. Another circuit board interconnection system, a circuit board, a connector assembly and a method for manufacturing a circuit board are disclosed according to the present invention.Type: GrantFiled: December 10, 2010Date of Patent: September 13, 2011Assignee: Huawei Technologies Co., Ltd.Inventor: Gongxian Jia
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Card design with fully buffered memory modules and the use of a chip between two consecutive modules
Patent number: 8018736Abstract: The invention concerns the use of an AMB component (25) in a memory installation with fully buffered Dimm memory modules connected in series, characterised in that the AMB component (25) is placed on a connecting line (30) from the memory modules (2) to a memory controller (1) of the installation in order to re-amplify the connecting line (30) between two consecutive FBD memory modules (21, 22). The invention also concerns a connection interface that includes such an AMB amplifier component (25) for the connection of a maincard (3) that includes at least one processor, to an auxiliary memory card of the type with a series of memory modules (2), where the maincard has at least one pair of channels connected to the processor. Two series of FBD memory modules (2) are connected to respective FBD channels in the auxiliary memory card using FBD connectors (200) in a daisy-chain arrangement.Type: GrantFiled: January 11, 2007Date of Patent: September 13, 2011Assignee: Bull S.A.S.Inventor: Jean-Jacques Pairault -
Stacking integrated circuits containing serializer and deserializer blocks using through silicon via
Patent number: 8014166Abstract: Methods and systems for stacking multiple chips with high speed serialiser/deserialiser blocks are presented. These methods make use of Through Silicon Via (TSV) to connect the dice to each other, and to the external pads. The methods enable efficient multilayer stacking that simplifies design and manufacturing, and at the same time, ensure high speed operation of serialiser/deserialiser blocks, using the TSVs.Type: GrantFiled: September 6, 2008Date of Patent: September 6, 2011Assignee: Broadpak CorporationInventor: Farhang Yazdani -
Patent number: 8013454Abstract: An active matrix substrate includes a first substrate, a driving integrated circuit chip mounted on the first substrate with an anisotropic electrically conductive layer, and an insulating member. The insulating member isolates a terminal from a wiring and a bump electrode that are adjacent to the terminal portion and isolates a bump electrode facing the terminal portion from a bump electrode and a wiring that are adjacent to the bump electrode.Type: GrantFiled: June 13, 2006Date of Patent: September 6, 2011Assignee: Sharp Kabushiki KaishaInventors: Kenichi Yamashita, Tetsuya Aita
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Patent number: 8014164Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.Type: GrantFiled: January 28, 2011Date of Patent: September 6, 2011Assignee: Princo Corp.Inventor: Chih-kuang Yang
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Patent number: 8004848Abstract: Provided are a high reliability stack module fabricated at low cost by using simplified processes, a card using the stack module, and a system using the stack module. In the stack module, unit substrates are stacked with respect to each other and each unit substrate includes a selection terminal. First selection lines are electrically connected to selection terminals of first unit substrates disposed in odd-number layers, pass through some of the unit substrates, and extend to a lowermost substrate of the unit substrates. Second selection lines are electrically connected to selection terminals of second unit substrates disposed in even-number layers, pass through some of the unit substrates, and extend to the lowermost substrate of the unit substrates. The selection terminal is disposed between the first selection lines and the second selection lines.Type: GrantFiled: May 23, 2008Date of Patent: August 23, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Seung-Duk Baek, Mitsuo Umemoto, Kang-Wook Lee
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Patent number: 7995350Abstract: A component retention mechanism facilitates improved installation, retention and removal of hardware components (e.g., PCI cards) on a personal computer. The retention mechanism includes a locking component, support member, and release mechanism coupled to each other. The locking component can be a steel bar or other stiff item positioned proximate to multiple socket connectors on a circuit board. The locking component moves between unlocked and locked positions that mechanically and simultaneously unlock or lock in place multiple add-in cards inserted into the socket connectors. The support member moves and thereby facilitates movement of the locking component between locked and unlocked positions. The release mechanism facilitates movement of the support member and is actuated when a force is exerted by a user thereto. An associated slider housing coupled to the release mechanism and support member includes a fan, support shelves and a door that provides additional support to oversized PCI cards.Type: GrantFiled: December 19, 2008Date of Patent: August 9, 2011Assignee: Apple Inc.Inventors: Vinh H. Diep, Giles Matthew Lowe, Peter Russell-Clarke, Phillip Satterfield, Clark Everett Waterfall, Alex Chun lap Yeung
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Publication number: 20110188220Abstract: Communications system housings, assemblies, and related alignment features and methods are disclosed. In certain embodiments, communications cards and related assemblies and methods that include one or more alignment features are disclosed. In certain embodiments, at least one digital connector disposed in the communications card is configured to engage at least one complementary digital connector to align at least one RF connector also disposed in the communications card with at least one complementary RF connector. In other embodiments, printed circuit board (PCB) assemblies are disclosed that include a moveable standoff to provide an alignment feature. In other embodiments, distributed antenna systems and assemblies that include one or more alignment features are disclosed.Type: ApplicationFiled: March 31, 2010Publication date: August 4, 2011Inventors: Chois A. Blackwell, JR., Terry D. Cox
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Publication number: 20110188209Abstract: An enhanced 3D integration structure comprises a logic microprocessor chip bonded to a collection of vertically stacked memory slices and an optional set of outer vertical slices comprising optoelectronic devices. Such a device enables both high memory content in close proximity to the logic circuits and a high bandwidth for logic to memory communication. Additionally, the provision of optoelectronic devices in the outer slices of the vertical slice stack enables high bandwidth direct communication between logic processor chips on adjacent enhanced 3D modules mounted next to each other or on adjacent packaging substrates. A method to fabricate such structures comprises using a template assembly which enables wafer format processing of vertical slice stacks.Type: ApplicationFiled: February 2, 2010Publication date: August 4, 2011Applicant: International Business Machines CorporationInventors: Evan G. Colgan, Sampath Purushothaman, Roy R. Yu
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Patent number: 7990732Abstract: A bracket is used for retaining an expansion card. The expansion card includes a slot cover. The bracket includes a top and a back and a retaining member. The top is perpendicular to the back. The back defines at least one expansion slot. The retaining member comprises an elongated body. The retaining member is pivotally attached to the top about a pivot axis. The pivot axis is substantially perpendicular to the back. The retaining member is capable of securing the slot cover to the mounting flange of the back at a locked position.Type: GrantFiled: March 8, 2010Date of Patent: August 2, 2011Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Che-Yu Kuo, Li-Ping Chen
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Patent number: 7990737Abstract: In some embodiments, a system includes a memory controller chip, memory chips on a first substrate, and a module connector. A first group of conductors is included to provide read data signals from at least some of the memory chips to the memory controller chip, and a second group of conductors to provide read data signals from the connector to the memory controller chip. The module connector may receive a continuity card or memory module. Other embodiments are described.Type: GrantFiled: December 23, 2005Date of Patent: August 2, 2011Assignee: Intel CorporationInventor: Randy B. Osborne
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Patent number: 7990729Abstract: A battery holder in an electronic device includes a battery receptacle, a locking member, and at least one resilient member. The battery is received in the battery receptacle. The locking member partially protrudes into the battery receptacle and locks the battery. The at least one resilient member and the electronic device are integrally formed. The battery includes a base wall, beyond which the at least one resilient member elastically extends into the battery receptacle.Type: GrantFiled: June 3, 2009Date of Patent: August 2, 2011Assignee: Chi Mei Communcation Systems, Inc.Inventor: Pen-Uei Lu
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Patent number: 7986530Abstract: A fixing structure for a battery positions the battery in a casing of an electronic device. The fixing structure includes at least a connecting portion, at least a locking portion, and a receiving portion. The connecting portion is on one side of the battery and with a waterproof element. The locking portion is on the other side of the battery and is opposite to the connecting portion. The receiving portion is on the casing and with a first inserting portion and a plurality of second inserting portions. The first inserting portion and the second inserting portions correspond in position to the connecting portion and the locking portion respectively. Hence, the fixing structure protects the electronic device against permeation of water and ensures secure positioning of the battery.Type: GrantFiled: October 22, 2009Date of Patent: July 26, 2011Assignee: Askey Computer Corp.Inventors: Ching-Hui Chang, Ching-Feng Hsieh, Ko-Hsien Lee
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Patent number: 7983056Abstract: In a semiconductor device provided with terminals for external connection, input terminals, power supply terminals and ground terminals are disposed close together on part of one edge portion of two opposing edge portions. Output terminals are disposed in the vicinity of both ends of the one edge portion and on another edge portion of the two edge portions. A ground wiring is routed from the other edge portion and connected to the ground terminals. In so doing, elemental devices connected to the input terminals are disposed close together, whereby needless gaps do not arise between the elemental devices. A ground potential is also supplied by the ground wiring.Type: GrantFiled: June 21, 2006Date of Patent: July 19, 2011Assignees: Fuji Electric Systems Co., Ltd., LG Electronics Inc.Inventor: Takahiro Nomiyama
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Publication number: 20110170266Abstract: a 4D device comprises a 2D multi-core logic and a 3D memory stack connected through the memory stack sidewall using a fine pitch T&J connection. The 3D memory in the stack is thinned from the original wafer thickness to no remaining Si. A tounge and groove device at the memory wafer top and bottom surfaces allows an accurate stack alignment. The memory stack also has micro-channels on the backside to allow fluid cooling. The memory stack is further diced at the fixed clock-cycle distance and is flipped on its side and re-assembled on to a template into a pseudo-wafer format. The top side wall of the assembly is polished and built with BEOL to fan-out and use the T&J fine pitch connection to join to the 2D logic wafer. The other side of the memory stack is polished, fanned-out, and bumped with C4 solder. The invention also comprises a process for manufacturing the device.Type: ApplicationFiled: January 8, 2010Publication date: July 14, 2011Applicant: IBM CorporationInventors: Wilfried Haensch, Roy R. Yu
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Patent number: 7973247Abstract: In a circuit board-connecting portion 10, a first connecting portion 15 and a second connecting portion 20 are disposed in facing relation such that first conductors 14 contact second conductors 19, and also a first substrate 12 and a second substrate 17 are fixed to each other by an adhesive 22. The first connecting portion 15 has rigid members 24 provided at a reverse surface 12B of the first substrate 12 which is a soft substrate, and the rigid members 24 are disposed along a direction of a thickness of the first substrate 14, and are provided at positions corresponding to at least parts 14A of the first conductors 14.Type: GrantFiled: February 3, 2006Date of Patent: July 5, 2011Assignee: Panasonic CorporationInventors: Hidetsugu Mukae, Hiroyuki Suzuki
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Patent number: 7975079Abstract: A method and apparatus are provided for an embedded wireless interface that is embedded in, for example, one of an input and output controller device for controlling input and output communications with off-board devices, within a memory controller device and a processor motherboard. The embedded wireless interface may be utilized as a wireless test access point to provide signal stimulations for test purposes or to monitor communications over a specified wired communication link.Type: GrantFiled: June 15, 2005Date of Patent: July 5, 2011Assignee: Broadcom CorporationInventors: James D. Bennett, Jeyhan Karaoguz
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Publication number: 20110157858Abstract: Provided is a System-In-Package (SIP) having embedded circuit boards in which boards are electrically connected and a plurality of chips are embedded in a board in a stacked manner. The SIP includes a first board on a surface of which a first circuit is formed, a second board which is provided on a top surface of the first board in a stacked manner and includes a plurality of chips embedded therein in a stacked manner, and a third board which is provided on a top surface of the second board in a stacked manner and on a surface of which a second circuit is formed.Type: ApplicationFiled: December 21, 2010Publication date: June 30, 2011Applicant: Samsung Electronics Co., Ltd.Inventors: Ji-Hyun Jung, Byung-Jik Kim, Shi-Yun Cho, Ho-Seong Seo, Kyung-Wan Park, Yeun-Ho Choi, Yu-Su Kim, Seok-Myong Kang
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Publication number: 20110157857Abstract: A circuit board laminated module includes: a first circuit board having a multi-layer structure in which ground layers are provided in a plurality of layers; a second circuit board mounted on the first circuit board; and a semiconductor chip mounted on the second circuit board, wherein in the first circuit board, a noise guiding through via which guides an electromagnetic noise generated in the semiconductor chip to a lower layer side is provided on a side different from a circuit portion or a circuit element desired to be protected against influence of the electromagnetic noise in a surrounding direction of an occurrence place of the electromagnetic noise.Type: ApplicationFiled: December 16, 2010Publication date: June 30, 2011Applicant: Sony CorporationInventors: Katsuji Matsumoto, Shusaku Yanagawa, Shuichi Oka, Shinji Rokuhara
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Publication number: 20110149543Abstract: A printed wiring board connection assembly includes a first printed wiring board and a plurality of connecting pieces having a first connecting pattern made of an electrically conductive material formed on first and second opposing surfaces. A second printed wiring board has a plurality of connecting holes shaped to receive respective connecting pieces and having second connecting patterns arranged to correspond with the first connecting patterns of the respective connecting pieces. Each of the connecting pieces has one or more through-holes extending between the opposing surfaces of the respective connecting pieces and positioned such that upon receiving of the connecting pieces by the respective connecting holes a portion of at least one through-hole is exposed proximate the first surface of the second printed wiring board and a portion of at least one through-hole is exposed proximate the second surface of the second printed wiring board.Type: ApplicationFiled: December 17, 2010Publication date: June 23, 2011Inventors: Takeshi Kamoi, Junichi Hasegawa, Jun Kumagai, Kenji Sato
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Publication number: 20110134621Abstract: Disclosed herein is an electro-optical device including: an electro-optical panel including a first terminal portion having a first terminal and a second terminal and a second terminal portion having a third terminal and a fourth terminal, the first and the fourth terminal being electrically connected through a first connection wiring, the second and the third terminal being electrically connected through a second connection wiring; a first circuit substrate having a first external terminal connected to the first terminal and a second external terminal connected to the second terminal through a first connection terminal portion respectively; and a second circuit substrate having a third external terminal connected to the third terminal and a fourth external terminal connected to the fourth terminal through a second connection terminal portion respectively.Type: ApplicationFiled: December 1, 2010Publication date: June 9, 2011Applicant: SEIKO EPSON CORPORATIONInventor: Munehide Saimen
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Patent number: 7957153Abstract: Electrical components, such as packaged integrated circuit devices that are mountable on a substrate surface, are provided with at least one exposed electrical contact on a side surface of the component that will be substantially perpendicular to the substrate surface when the component is mounted. Two such components can be mounted side-by-side on the substrate surface with the above-mentioned contacts close to one another between the above-mentioned side surfaces. An electrical connection between the contacts can be made (or perfected) by depositing an electrically conductive connector material in contact with both of the contacts between the above-mentioned side surfaces.Type: GrantFiled: January 3, 2008Date of Patent: June 7, 2011Assignee: Apple Inc.Inventors: Michael Rosenblatt, Amir Salehi
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Patent number: 7952204Abstract: An exemplary semiconductor die package is disclosed having one or more semiconductor dice disposed on a first substrate, one or more packaged electrical components disposed on a second substrate that is electrical coupled to the first substrate, and an electrically insulating material disposed over portions of the substrates. The first substrate may hold power-handling devices and may be specially constructed to dissipation heat and to facilitate fast and inexpensive manufacturing. The second substrate may hold packaged components of control circuitry for the power-handling devices, and may be specially constructed to enable fast and inexpensive wiring design and fast and inexpensive component assembly. The first substrate may be used with different designs of the second substrate.Type: GrantFiled: April 14, 2008Date of Patent: May 31, 2011Assignee: Fairchild Semiconductor CorporationInventors: Yumin Liu, Hua Yang, Yong Liu, Tiburcio A. Maldo
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Patent number: 7944709Abstract: The micro-sensor includes a first circuit substrate and a second circuit substrate. One surface of the first circuit substrate has an image sensing device electrically connected to main printed wires formed by a first wire group and a second wire group. On the other surface of the first circuit substrate has a main connector electrically connected to the second wire group. A plurality of first signal transmission lines connected to the first wire group. The second circuit substrate has a sub-connector that is electrically connected to sub printed wires having an equivalent number as and corresponding to the second wire group. The other end of the sub printed wires is electrically connected to a plurality of second signal transmission lines. Through connecting the connectors respectively disposed in different circuit boards to overcome the difficulty in the manufacturing process of concentrating all devices on a single circuit board.Type: GrantFiled: April 4, 2008Date of Patent: May 17, 2011Assignee: Altek CorporationInventors: Parn-Far Chen, Hsiu-Wu Tung, Chao-Yu Chou
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Patent number: 7944710Abstract: The disclosure involves the efficient termination of a winding PCB of a planar inductive component to a main PCB, using relatively little space and providing a low-resistance connection. The disclosed methods are especially suitable for planar structures where several winding PCBs, and/or winding PCBs and a main PCB, are all enclosed by the magnetic path components. The methods allow for a winding PCB to simply rest on the main PCB, or other winding PCBs, without any clearance. The disclosure employs mating sets of conductive annular rings with an optional interlocking terminal pin that allows two PCBs to be fixedly coupled together, while preserving a minimum distance between the solder-mask layers of the two PCBs in order to prevent the formation of unwanted electrical connections between the two PCBs. Solder is used to ensure effective coupling in each assembly of mating annular rings and optional terminal pin.Type: GrantFiled: October 6, 2008Date of Patent: May 17, 2011Assignee: Battery-Biz Inc.Inventors: Victor Marten, Aakar Patel, Mark Vanstone
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Publication number: 20110110065Abstract: Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by opening switches on the first die, converting the TSVs previously connected through the open switches into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by opening switches on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.Type: ApplicationFiled: November 12, 2009Publication date: May 12, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jimmy G. Foster, SR., Kyu-Hyoun Kim
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Publication number: 20110110064Abstract: Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by blowing fuses on the first die, converting the TSVs previously connected through the blown fuses into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by blowing fuses on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.Type: ApplicationFiled: November 12, 2009Publication date: May 12, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jimmy G. Foster, SR., Kyu-Hyoun Kim
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Publication number: 20110110066Abstract: A high adhesive strength and good conduction reliability can be realized when anisotropic connection is performed under compression conditions of a compression temperature of 130° C. and a compression time of 3 seconds using an anisotropic conductive film which uses a polymerizable acrylic compound capable of being cured at a comparatively lower temperature and in a comparatively shorter time than a thermosetting epoxy resin along with a film-forming resin. Consequently, an anisotropic conductive film has a structure in which an insulating adhesive layer and an anisotropic conductive adhesive layer are laminated. The insulating adhesive layer and the anisotropic conductive adhesive layer each contain a polymerizable acrylic compound, a film-forming resin, and a polymerization initiator. The polymerization initiator contains two kinds of organic peroxide having different one minute half-life temperatures.Type: ApplicationFiled: April 9, 2009Publication date: May 12, 2011Applicant: SONY CHEMICAL & INFORMATION DEVICE CORPORATIONInventors: Yasunobu Yamada, Yasushi Akutsu, Kouichi Miyauchi
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Patent number: 7936565Abstract: According to one embodiment, an electronic apparatus includes a housing, a circuit board accommodated in the hosing and including a first surface and a second surface located on an opposite side to the first surface, a flexible printed wiring board having an elasticity, electrically connected to the circuit board and provided from the first surface of the circuit board over to the second surface, and a pressing portion formed from a part of the flexible printed wiring board as it is bent, and pressing the flexible printed wiring board towards the first surface as it is brought into contact with the inner surface of the housing, which opposes the first surface of the circuit board.Type: GrantFiled: November 9, 2009Date of Patent: May 3, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Kiyomi Muro, Sadahiro Tamai
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Patent number: 7936570Abstract: The present invention provides a liquid crystal display device which can establish the reliable connection between a printed circuit board and a semiconductor device in spite of the simple constitution thereof. The liquid crystal display device includes a liquid crystal display panel, a printed circuit board arranged close to the liquid crystal display panel, and a semiconductor device arranged between the liquid crystal display panel and the printed circuit board in a striding manner. The semiconductor device includes a flexible printed circuit board and a semiconductor chip. The flexible printed circuit board includes a plurality of first terminals connected to the printed circuit board and a plurality of second terminals connected to a liquid-crystal-display-panel side.Type: GrantFiled: March 12, 2008Date of Patent: May 3, 2011Assignees: Hitachi Displays, Ltd., IPS Alpha Technology, Ltd.Inventors: Yuuichi Takenaka, Hiromitsu Sato, Takanori Sato, Kazumi Akiba, Yoshihiro Kazuma
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Patent number: 7935899Abstract: Provided is a circuit device in which an electronic circuit to be incorporated therein operates stably. A hybrid integrated circuit device includes multiple circuit boards which are disposed on approximately the same plane. An electronic circuit including a conductive pattern and a circuit element is formed on each top surface of the circuit boards. Furthermore, these circuit boards are integrally supported by a sealing resin. Moreover, a lead connected to the electronic circuit formed on the surface of the circuit board is led out from the sealing resin to the outside.Type: GrantFiled: August 30, 2006Date of Patent: May 3, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Sadamichi Takukusaki, Noriaki Sakamoto
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Patent number: 7929313Abstract: In a method of manufacturing a multilayer printed circuit board, a first insulating resin base material is formed. A resin surface of a second insulating resin base material formed by attaching copper foil on a surface of a resin-insulating layer is unified with the first insulating resin base material. A conductor circuit is formed on the second insulating resin base material and a via hole electrically connecting to the conductor circuit. A concave portion is formed from a resin-insulating layer surface in a conductor circuit non-formation area of the first insulating resin base material. A semiconductor element is housed within the concave portion and adhered with an adhesive. A resin-insulating layer is formed by coating the semiconductor element and a via hole.Type: GrantFiled: November 3, 2009Date of Patent: April 19, 2011Assignee: Ibiden Co., Ltd.Inventors: Sotaro Ito, Michimasa Takahashi, Yukinobu Mikado
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Patent number: 7929317Abstract: A mounting apparatus for fixing an expansion card to a circuit board, includes a mounting member fixed on the circuit board, and a locking member. The mounting member includes a pivot portion and a mounting portion formed on two ends thereof respectively. A hook extends from the pivot portion. The locking member includes a connecting portion and a latch portion formed on two ends thereof respectively. A notch is defined in the connecting portion. The locking member is pivotably connected to the mounting member via the connecting portion of the locking member connecting to the pivot portion of the mounting member. The latch portion is capable of being inserted in the mounting portion to fix the expansion card to the supporter. The hook is capable of engaging in the notch to confine the locking member relative to the mounting member.Type: GrantFiled: October 25, 2007Date of Patent: April 19, 2011Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventors: Cheng-Lung Cheng, Jun-Xiong Zhang, Jia-Qi Fu
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Publication number: 20110085313Abstract: A system, method, and motherboard assembly are described for interconnecting and distributing signals and power between co-planar boards that function as a single motherboard. The motherboard assembly includes a multilayered first printed circuit board having opposed parallel first and second surfaces, each having at least one land grid array (LGA) disposed thereon. The assembly further includes at least one wiring layer (Y) designed to only electrically interconnect components on or within the first PCB, and at least one wiring layer (X) designed to only electrically connect the components on the first PCB to a multilayered second PCB. The multilayered second PCB has opposed parallel first and second surfaces, the first surface having at least one LGA disposed thereon.Type: ApplicationFiled: October 14, 2009Publication date: April 14, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John L. Colbert, Arvind K. Sinha, Roger D. Weekly
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Publication number: 20110085314Abstract: An electrical circuit system includes at least one first circuit device and at least one second circuit device, the two circuit devices being electrically connected to one another by interconnecting at least one transfer device. The transfer device is electrically connected to the first circuit device by conductive adhesive bonds, and the transfer device is electrically connected to the second circuit device by conductive adhesive bonds and/or solder joints. Furthermore, a method for producing a corresponding electrical circuit system.Type: ApplicationFiled: July 10, 2008Publication date: April 14, 2011Inventor: Michael Franz
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Patent number: 7924575Abstract: A cable connects a circuit board mounted with an electronic circuit to a BT module that controls wireless communications compliant with Bluetooth (Registered Trademark). The cable is a connection cable that elastically deforms and applies pushing force in a direction to make the BT module leave away from the circuit board. A second holding piece, which is cantilever-shaped, moves to a releasing position at which holding the BT module is released by elastic deformation as well as moves to a supporting position at which the second holding piece presses the BT module by release of elastic deformation.Type: GrantFiled: October 27, 2009Date of Patent: April 12, 2011Assignee: Fujitsu LimitedInventor: Takeshi Murakami
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Publication number: 20110080717Abstract: An interconnect board for interconnecting and arranged between a first circuit board and a second circuit board, the interconnect board includes a conductive plate including a connection terminal to be electrically connected to a power supply terminal or a ground terminal of each of the first circuit board and the second circuit board, an insulating member wrapping the conductive plate except for the connection terminal, and a conductive member penetrating the insulating member to electrically connect a signal terminal of the first circuit board to a signal terminal of the second circuit board.Type: ApplicationFiled: September 22, 2010Publication date: April 7, 2011Applicant: FUJITSU LIMITEDInventors: Masateru KOIDE, Daisuke Mizutani
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Publication number: 20110080718Abstract: An interconnect board for interconnecting and arranged between a first circuit board and a second circuit board, the interconnect board includes a first conductive plate including a first connection terminal, a first insulating member wrapping the first conductive plate except for the first connection terminal, a second conductive plate including a second connection terminal, a second insulating member wrapping the second conductive plate except for the second connection terminal, an insulating substrate arranged between the first insulating member and the second insulating member, and a conductive member penetrating the first insulating member, the second insulating member and the insulating substrate.Type: ApplicationFiled: September 22, 2010Publication date: April 7, 2011Applicant: FUJITSU LIMITEDInventor: Masateru KOIDE
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Publication number: 20110080719Abstract: A circuit board interconnection system is disclosed according to the embodiments of the present invention. The system includes a first circuit board, a second circuit board, a third circuit board, a first connector and a second connector. The first connector and the second connector are mounted at two sides of the first circuit board respectively so that the second circuit board mounted on the first connector is perpendicular to the third circuit board on the second connector. The first connector and the second connector mounted respectively at two sides of the first circuit board are coupled to each other via an impedance controlled mechanism on the first circuit board. Another circuit board interconnection system, a circuit board, a connector assembly and a method for manufacturing a circuit board are disclosed according to the present invention.Type: ApplicationFiled: December 10, 2010Publication date: April 7, 2011Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventor: Gongxian JIA
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Patent number: 7920389Abstract: An RF blind-mate connection device disclosed herein includes a duplexer, a power amplification circuit board, a transceiver, an RF signal connector, and a power connector. The duplexer and the transceiver are located at one end of the RF blind-mate connection device, and the transceiver is fixed on the duplexer; the power amplification circuit board is located at the other end of the RF blind-mate connection device, and the location of the power amplification circuit board corresponds to that of the duplexer; the RF signal connector is fixed on the duplexer and the power amplification circuit board; the power connector is fixed on the transceiver and the power amplification circuit board; and the RF signal connector and the power connector transmit both the power signal and the RF signal in a blind-mate way. A board hardware device is disclosed herein to transmit RF signals and power signals inside the RF module through the connector.Type: GrantFiled: December 3, 2009Date of Patent: April 5, 2011Assignee: Huawei Technologies Co., Ltd.Inventors: Chenggang Tang, Hao Li, Haitao Li, Xiaohui Shen
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Publication number: 20110075391Abstract: According to one embodiment, an electronic apparatus has a circuit module. The circuit module includes a first circuit board having a first side end face on which a first circuit pattern is formed, a second circuit board having a second side end face on which a second circuit pattern is formed, and a flexible wiring board which is in contact with the first side end face and the second side end face to electrically connect the first circuit pattern and the second circuit pattern.Type: ApplicationFiled: May 24, 2010Publication date: March 31, 2011Inventor: Kazuyoshi Sasaki
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Assemblies and Methods for Directly Connecting Integrated Circuits to Electrically Conductive Sheets
Publication number: 20110075392Abstract: An integrated circuit assembly includes a first electrically conductive sheet, a second electrically conductive sheet electrically isolated from the first electrically conductive sheet, a non-conductive material disposed between the first and second electrically conductive sheets, an electrical trace disposed on the non-conductive material and electrically isolated from the first and second electrically conductive sheets, and an integrated circuit having at least one lead directly connected to the first electrically conductive sheet, at least one lead directly connected to the second electrically conductive sheet, and at least one lead electrically connected to the electrical trace. Other integrated circuit assemblies and method for making integrated circuit assemblies are also disclosed.Type: ApplicationFiled: September 29, 2009Publication date: March 31, 2011Applicant: Astec International LimitedInventors: Daryl Weispfennig, Bradley Schumacher, Kwong Kei Chin