Abstract: A method and device for protecting an electric system against overvoltage occurrences, the electric system being adapted to be subjected to voltages. The device includes a plurality of surge arresters and a detector configured to detect overvoltage occurrences in the electric system. The surge arresters are connected in series, the plurality of surge arresters including a first surge arrester which is connectable to ground and a second surge arrester which is connectable to the electric system which is to be protected. The device includes a switch connected in parallel with at least one surge arrester of the plurality of surge arresters, and the switch is adapted to be open when no overvoltage occurrence is detected and adapted to close upon overvoltage occurrence detection and short-circuit the surge arrester with which it is connected in parallel. An electric system includes at least one such device.

Abstract: A two terminal transmit receive device passes small analog signals with a constant low resistance value to the input of a low noise, low voltage receiver amplifier and can protect the input against the high voltage transmit signals in ultrasound applications without the aid of any power supplies. The device uses depletion-mode transistors that are normally on to pass small analog signal and a voltage detection circuit that quickly turns off the depletion-mode transistors when the presence of high voltage is detected.

Abstract: A vehicle on-board electric power system is disclosed including at least one field-effect-controlled power transistor which applies a vehicle on-board electric power system supply voltage VBB to a load when actuated by a logic circuit. The power transistor has a drain-source breakdown voltage VDS with a positive temperature coefficient TKDS and is provided with a clamping means for protecting against overvoltages VO occurring in the vehicle on-board electric power system. The clamping means has a clamping voltage VCLAMP with a positive temperature coefficient TKCLAMP?TKDS, the clamping voltage VCLAMP being lower than or equal to an anticipated maximum overvoltage VOmax in the vehicle on-board electric power system.

Abstract: An ESD protection circuit is described that protects the output transistors of a target circuit, usually an integrated circuit, that has an output enable, OE, or similar control input. An OE signal turns off the output transistors allowing the target circuit output, or outputs, to electrically float. Such a condition is commonly called a three state condition. The inventive protection circuit is not connected to the output directly, it senses an ESD voltage spike at the +Vdd contact to the circuit and produces a timed signal. The timed signal is converted to logic levels and gated with the OE signal (that the system previously provided to the OE control input). The output of gate forms a new OE control input signal that forces the target circuit into its three state condition during the period of the timed signal.

Abstract: A regulating system includes an input port having a first input terminal and a second input terminal, an output port having a first output terminal and a second output terminal, a regulating circuit, an over-current protection circuit, and an overvoltage protection circuit. The overvoltage protection circuit includes a regulating diode, a first bipolar transistor and a second bipolar transistor. The first output terminal is connected to the base of the first bipolar transistor via the regulating diode and grounded via first bipolar transistor. A base of the second bipolar transistor connects to the collector of the first bipolar transistor. The second output terminal is grounded via the second transistor. When an output voltage of the first output terminal increases over a predetermined voltage, an electrical connection between the second output terminal and ground is cut off to stop providing output voltage from the output port.

Abstract: A semiconductor device has: a power supply line; a ground line; a signal line for transmitting a signal; a signal pad connected to the signal line; a protection element connected between the signal line and the ground line; and a trigger circuit configured to supply a trigger current to the protection element. The trigger circuit has: a PMOS transistor whose gate and backgate are connected to the power supply line and whose source is connected to the protection element; and an amplifier circuit part configured to amplify a first current flowing through the PMOS transistor to generate a second current. The trigger current includes the second current.

Abstract: A method of externally charging a powertrain includes monitoring a voltage level of a first battery, determining when the monitored voltage level is below a first voltage threshold, and when the monitored voltage level is below the first voltage threshold, charging the first battery by supplying power from an external power source and increasing voltage of the power supplied by the external power source within the powertrain.

Abstract: A method for providing an analog or digital circuit that senses both low and high input voltage and operates to disconnect both line and neutral electrical power connections to a protected device when abnormally low or high voltages are received from a single- or multi-phase power source, and reconnects the protected device when input power has stabilized. The sensing circuit and power supply is functional with voltages up to at least 240 Vac. The nominal 120 Vac circuit is designed to withstand a 6 kilovolt surge without damage. The method does not disconnect the ground line during an out-of-tolerance voltage condition.

Abstract: A transient voltage compensation system is provided. The transient voltage compensation system includes a processor and a first voltage regulator coupled to the processor, wherein the first voltage regulator is to deliver a load current to the processor at an output voltage. The transient voltage compensation system also includes a second voltage regulator coupled to the first voltage regulator, wherein the second voltage regulator is to regulate the output voltage in response to transient loads of the processor.

Abstract: The present disclosure generally pertains to surge protection systems that protect outside plant equipment from high-energy surges. In one exemplary embodiment, a protection system is used for protecting Ethernet equipment that is coupled to an outside Ethernet cable. The protection system provides protection and remains capable of coupling signal energy between an Ethernet cable and Ethernet equipment without significantly degrading Ethernet performance. However, the protection system, while allowing the desirable Ethernet signals to pass between the cable and the equipment, prevents the electrical voltages and currents of high-energy surges, such as surges from lightning or AC power faults, from damaging the Ethernet equipment.

Abstract: An electrostatic discharge (ESD) clamp circuit is provided. The ESD clamp circuit includes a first resistor, a second resistor, a first transistor, a second transistor, and a third transistor. A clamp device of the ESD clamp circuit is implemented by the third transistor. A parasitic capacitor of the third transistor forms a detection scheme along with the second resistor to detect the ESD. The first resistor, the second resistor, the first transistor, and the second transistor form a feedback scheme to control the third transistor for discharging the ESD current.

Abstract: A method and integrated circuit renders a shunt structure non-conductive during a power up event or noise event for and in addition, during an electrostatic discharge event, keeps the shunt structure conductive for a period of time to discharge electrostatic energy through the shunt structure. In one example, a shunt structure, such as a transistor, is interposed between a power node and a ground node. Circuitry is operative during a power up event or noise event, to render the shunt structure non-conductive for a period of time during the power up event or during the noise event (when power is applied). Second circuit is operative, during an electrostatic discharge event, to keep the shunt structure conductive for a period of time to discharge electrostatic energy through the shunt structure. In one example, a plurality of resistor/capacitors (RC) circuits are utilized wherein the RC circuits have different time constants.

Abstract: A surge protector includes a first surge suppression assembly comprising a first conductive layer comprising an arm, an extension distal to the arm and having toothed edges, and a substantially C-shaped member projecting out of the extension and having toothed edges, and a substantially circular member with toothed edges formed at an open end of the extension; a second conductive layer comprising an arm including a terminal, an extension being distal the arm, a first substantially C-shaped member having toothed edges, and a second substantially C-shaped member at an open end of the extension wherein the first substantially C-shaped member, the substantially C-shaped member, the second substantially C-shaped member, and the substantially circular member are arranged concentrically; and an overvoltage protection assembly interconnecting the arm and the terminal. The overvoltage protection assembly is electrically connected to the first surge suppression assembly.

Abstract: A supply voltage monitor includes a switch circuit that enables coupling of an AC power supply to a load. A control circuit switches the switch circuit from a non-conductive state to a conductive state when a supply voltage signal is between a first over-voltage threshold and a first under-voltage threshold. The control circuit records an over-voltage event and maintains the switch circuit in the conductive state when the supply voltage signal exceeds a second, higher over-voltage threshold. The control circuit switches the switch circuit to a non-conductive state when the supply voltage signal exceeds a third, highest over-voltage threshold. The control circuit records an under-voltage event and maintains the switch circuit in the conductive state when the supply voltage signal falls below a second, lower under-voltage threshold. The control circuit switches the switch circuit to the non-conductive state when the supply voltage signal falls below a third, lowest under-voltage threshold.

Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One apparatus includes a voltage regulator. The voltage regulator includes regulator circuitry for generating a regulated voltage from a first power supply and a second power supply, and voltage spike protection circuitry for voltage-spike-protecting the regulator circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit. One method includes a method of generating a regulated voltage. The method includes regulator circuitry generating a regulated voltage from an input voltage, and voltage-spike-protecting the regulator circuitry with voltage spike protection circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit.

Abstract: An input-output interface circuit of the present invention includes an input-output terminal, an input buffer, a first MOS transistor of a first conductivity type formed in a floating well region, an output buffer for outputting a signal externally through the input-output terminal, an electrostatic protection circuit, and a floating well potential adjusting circuit, wherein the electrostatic protection circuit has a first resistance, and a diode connected between another end of the first resistance and a high level power supply potential, and the floating well potential adjusting circuit has a second resistance having one end connected to the input-output terminal, and a second MOS transistor of the first conductivity type having one end connected to another end of the second resistance, another end connected to the floating well region, and a gate connected to the high level power supply potential.

Abstract: One embodiment of the present invention relates to a method and apparatus to perform a low power activation of a system by measuring the slope of a digital signal corresponding to a motion sensor measurement value. In one embodiment, a low power activation circuit is coupled to magnetic motion sensor configured to output a magnetic signal proportional to a measured magnetic field. The low power activation circuit may comprise a digital tracking circuit configured to provide a digital signal that tracks the magnetic field and a difference detector configured to detect a difference between a current digital signal and a prior digital signal stored in a digital storage means. If the detected difference is larger than a digital reference level, an activation signal is output to awaken a system from a sleep mode.

Abstract: A portable electronic device includes an audio file playing unit and a surge protector device connected to the audio file playing unit. The surge protector device includes a protector module connected to an audio file playing unit and a processor module connected to the protector module and the audio file playing unit. The processor module detects electric surges in the audio file playing unit and controls the protector module to filter the detected electric surges when the audio file playing unit plays audio files.

Abstract: A system for protecting metal oxide semiconductor field effect transistor (MOSFET) output drivers within an integrated circuit (IC) from an electrostatic discharge (ESD) includes a first MOSFET output driver and a second MOSFET output driver positioned within a common IC diffusion material. The system includes a contact ring coupled to the common IC diffusion material and arranged along an outer edge of a perimeter surrounding the MOSFET output drivers. A centroid of each MOSFET output driver is common with a centroid of the perimeter surrounding both MOSFET output drivers. Each MOSFET output driver has a value of substrate resistance (Rsub) that initiates bipolar snapback in the MOSFET output driver at which an ESD event occurs. The value of Rsub depends upon a composite distance from the centroid of each MOSFET output driver to the contact ring.

Abstract: A surge protection circuit acquires a surge signal from a left channel (LC) signal line and a right channel (RC) signal line. After the surge signal being transmitted on the LC signal line and the RC signal line is removed, an audio signal outputted from a signal input device is transmitted to an audio output device via the LC signal line and the RC signal line.

Abstract: A system for protecting a power consuming circuit, the system comprising two terminals for receiving power and two terminals for providing received power. Between one of the receiving terminals and a providing terminal, a transistor is provided which is controlled by a Zener diode and to break the connection between one of the receiving terminals and a providing terminal, if a voltage over the providing terminals or the receiving terminals exceeds the breakdown voltage of the Zener diode.

Abstract: Embodiments of an output driver comprising a switching module configured to multiplex a protection transistor between a protection mode and a current mirror mode are disclosed herein. The output driver may operate at high speed with voltages above a maximum threshold voltage specification for the output driver. Additional variants and embodiments may also be disclosed and claimed.

Abstract: An overload protection device includes a power detection unit, a processing unit, a breaker unit and a warning unit. According to the power value detected by the power detection unit, the processing unit determines whether to drive the breaker unit and determines the warning level of the warning unit. Accordingly, the overload protection device can provide overload protection and achieve warning effect.

Abstract: Transient overvoltage suppression circuit prevents voltage surges from damaging an attached load. The suppression circuit includes a transistor connected in series with a low-side or return line of the load. A control circuit monitors the voltage on the input line (i.e., high-side) and in response to a detected voltage transient turns the transistor OFF to isolate the load from the transient voltage.

Abstract: A method to clamp an open circuit voltage in a photovoltaic module is proposed. The method include coupling a load resistor across an inverter module, initiating the inverter module and loading the inverter module via the load resistor, and coupling the loaded inverter module to the photovoltaic module. The method further include dissipating power via the load resistor to clamp the open circuit voltage of the photovoltaic module, synchronizing an output voltage of the inverter module with a voltage of a grid and then coupling the inverter module to the grid and de-coupling the load resistor across the inverter module.

Abstract: A semiconductor integrated circuit includes: an output pad from which an output signal is outputted; an output signal line connected with the output pad; a first pad configured to function as a ground terminal or a power supply terminal; a first wiring connected with the first pad; an output driver connected with the output pad and configured to generate the output signal; an ESD protection device connected with the output signal line and having a function to discharge surge applied to the output pad; and a first trigger MOS transistor used as a trigger device. The output driver includes: a first protection target device connected between the output signal line and the first interconnection; and a first resistance element connected between the first protection target device and the first interconnection.

Abstract: An integrated circuit includes an input/output pad for signal exchange with an external circuit, an electrostatic discharge (ESD) protection unit coupled to the input/output pad and configured to form an ESD path between a first voltage line and a second voltage line, a first drive transistor coupled between the first voltage line and the input/output pad, a first driving control unit coupled to a gate of the first drive transistor and configured to control the first drive transistor, a first dummy drive transistor coupled between the first voltage line and the input/output pad, and a first auxiliary driving control unit configured to supply the first voltage to a gate of the first dummy drive transistor in a normal operation mode, and float the gate of the first dummy drive transistor in a non-operation mode in which no power is supplied.

Abstract: The objective of the present invention is to provide a power converter capable of not only boosting the voltage but also shutting-off the flowing current, by switching only the switch element. The power converter 1, comprises a first input-output portion 3, a second input-output portion 5, a first capacitor C1, a second capacitor C2 electrically connected with the first capacitor C1 in serial, a first current control block B1, a second current control block B2, a third current control block B3, a fourth current control block B4, and a switching controller 7 operable to switch certain current control blocks, wherein the current flowing direction is opposite to each other between a first current control element B1a (B2a, B3a, B4a) and a second current control element B1b (B2b, B3b, B4b) which compose the current control block B1 (B2, B3, B4).

Abstract: An inverter driver controls an inverter that supplies driving voltages to a plurality of discharge lamps. The inverter driver senses the abnormal operation of the plurality of discharge lamps based on a plurality of first feedback voltages corresponding to the plurality of driving voltages supplied to the discharge lamps and a plurality of second feedback voltages corresponding to the current flowing through the plurality of discharge lamps. The inverter driver is formed in a single integrated circuit.

Abstract: A load driving device according to an aspect of the present invention may includes an output transistor and a load connected in series between first and second power supply lines, a protection transistor connected between a gate of the output transistor and the second power supply line, the protection transistor turning on the output transistor when a polarity of a power supply connected between the first and second power supply lines is reversed, and a resistor arranged on a line, which supplies a voltage to a back gate of the protection transistor.

Abstract: A filter device reduces reflections on power lines from the motor drive to AC motors by providing a differential mode choke in series with a common mode choke both shunted by resistances tailored to the characteristic impedance of the power cable for differential mode and common mode reflections respectively. By treating both common mode based and differential mode based reflections, superior transient control and motor drive performance may be obtained.

Abstract: A method for protecting an electronic switch incorporated in an automotive vehicle in order to control the power supply of an electric load, the method including implementing a protection strategy, based on the use of a table of overload intensity values IS, intended to make it possible to detect and count the overshoots of the overload values IS, and to interrupt the operation of the electronic switch beyond a given number of overloads undergone. A table of overload intensities IS is established giving, for values of the power supply voltage that are greater than a predetermined voltage value VNbat, values IS=IT+?Ic, with ?Ic being identical for all the values, and for values of the power supply voltage that are less than or equal to VNbat, a constant value IS such that IS=IT(VNbat)+?Ic.

Abstract: An ESD clamp circuit applied to a power amplifier is provided. The ESD clamp circuit includes a first line, a second line, a first circuit, a second circuit, an ESD detecting unit, a buffer unit, and an ESD clamp unit. The first line is coupled to the output terminal of the power amplifier. The first circuit is coupled to the first line. The second circuit is coupled to the first circuit. The ESD detecting unit is coupled to the first circuit and the second line. The buffer unit is coupled to the second circuit, the second line and the ESD detecting unit. The ESD clamp unit is coupled to the buffer unit, the first line and the second line. Therefore, at normal operation mode, the problem of signal loss caused by the leakage current of ESD clamp circuit can be avoided.

Abstract: An integrated circuit, design structures and methods of forming the integrated circuit which includes a signal pad ESD coupled to an I/O signal pad and a power supply ESD coupled to a source VDD. The signal pad ESD and the power supply ESD are integrated in a single ESD structure.

Abstract: Integrated circuit (20) comprising several different voltage rails (V5 to V1) and an on-chip ESD protection circuit. The ESD protection circuit comprises at least one group (21, 22, 23) of ESD clamp devices (C1-C4). The ESD clamp devices (C1-C4) are arranged in a ladder-configuration. This ladder-configuration is characterized in that there is one of the ESD clamp devices interposed between each of the power rails (V5 to V1) and the respective power rail having a next lower voltage. Due to this arrangement an ESD current path is defined between each one of the power rails and the power rail having the next lower voltage. The ESD clamp devices (C1-C4) are off under normal power operation of the integrated circuit (20).

Abstract: Apparatus, systems, and methods are disclosed that operate to boost an electrical potential of a control terminal of a transistor from a signal on an input terminal of the transistor to render a channel in the transistor more conductive. Additional apparatus, systems, and methods are disclosed.

Abstract: An input terminal is externally input with an input voltage. An output transistor of N-channel MOSFET is arranged between the input terminal and an output terminal. A charge pump circuit steps up the input voltage. An error amplifier receives a voltage stepped up by the charge pump circuit as a power supply, and outputs an error voltage of a feedback voltage corresponding to an output voltage of the output terminal and a predetermined reference voltage to a gate of the output transistor. A controller compares the input voltage with a predetermined threshold voltage, and forcibly turns OFF the output transistor when the input voltage is higher than the threshold voltage.

Abstract: The present disclosure relates to an integrated circuit and a package on which such integrated circuit is placed, the latter having a power output stage, at least one first pad, one second pad and one drive circuit for driving said power output stage, wherein the integrated circuit is characterized in that it has at least one additional third pad, other than said at least one first and said at least one second pads, said drive circuit being electrically coupled between said at least one third pad and said power output stage.

Abstract: A latch-control protection circuit applied in a power converter is provided. The protection circuit has a comparing circuit unit and a logic gate. The comparing circuit unit is utilized to selectively output a default signal or a comparing signal according to a state signal from the logic gate, wherein the default signal is utilized for latching the state signal and the comparing signal is corresponded to the power condition of the power converter. The logic gate generates the state signal according to the output signal of the comparing circuit unit and a system judging signal. The output signal may be the default signal or the comparing signal. The system judging signal indicates the condition of the power converter.

Abstract: A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component includes one or more transient voltage suppression structures. In an embodiment, the semiconductor component may include an over-voltage detection circuit, an over-current detection circuit, an over-temperature detection circuit, an ESD protection circuit, or combinations of these circuits.

Abstract: In an electric supply device of the present invention, since a semiconductor element T1 is interrupted before a drain voltage V1 of the semiconductor element T1 is lower than an in-phase input minimum voltage, a load circuit can be assuredly protected. Further, assuming that a first decided voltage is L-V1 and a second decided voltage V3, when the voltage V1 becomes “V1<L-V1”, a retry operation is carried out. When the number of times of “V1<L-V1” reaches N1 times, or when the number of times of “L-V1<V1<V3” reaches N2 times, an interrupted state of the semiconductor element T1 is held to protect the load circuit. Further, when the voltage V1 suddenly drops due to an imperfect contact of a connector 11, a minimum value of the voltage V1 is not a stable value and the interrupted state of the semiconductor T1 is not held.

Abstract: An apparatus and method is disclosed for providing an electrostatic discharge protection circuit for compound semiconductor devices and circuits. The electrostatic discharge protection circuit comprises a first terminal and a second terminal. The electrostatic discharge protection circuit further comprises a transistor shunt element that is operably coupled between the first terminal and the second terminal; the transistor shunt element is capable of providing a bi-directional discharge path between the first terminal and the second terminal. The electrostatic discharge protection circuit further comprises a shut-off element that is operably coupled with the second terminal; the shut-off element is capable of keeping the transistor shunt element turned-off.

Abstract: A device may include a metal-oxide varistor (MOV), wherein the MOV increases in temperature as a voltage applied across the MOV exceeds a rated voltage. The device may include a first conductor contacting the MOV and a second conductor contacting the MOV. The second conductor may be configured to disconnect from the MOV when the MOV reaches a threshold temperature. The device may include an enclosure to surround the MOV, the first conductor, and the second conductor, wherein the enclosure includes a non-conductive fluid to suppress arcing.

Abstract: The present invention pertains to a closed loop over-voltage protection for audio/video connection interfaces of devices especially of mobile devices.

Abstract: An over-voltage protection circuit for use in low power integrated circuits is provided. The over-voltage protection circuit distributes certain connection and conditioning circuitry to a component network external to the integrated circuit. As a result, the integrated circuit need not be created with specialized high voltage components, significantly reducing its cost and complexity, and allowing it to be used in a wider range of end-user applications.

Abstract: A semiconductor integrated circuit includes a first and second power supply domain circuits having a first and second power supply terminals, respectively. An internal signal propagation line propagates a signal from a circuit of the first power supply domain circuit to that of the second power supply domain circuit. A voltage detector detects a surge voltage input to the first and second power supply terminals and outputs, from a control signal node, a control signal which is determined in accordance with a capacitive coupling by a first capacitor between the first power supply terminal and the control signal node, a second capacitor between the second power supply terminal and the control signal node, and a load capacitance at an output side of the control signal node. A voltage limiting circuit limits a voltage of a signal on the internal signal propagation line in accordance with the control signal.

Abstract: The invention relates to a high-frequency integrated circuit requiring ESD protection for a circuit node. One or more metallic layer is deposited within the integrated circuit and patterned to form a transmission line. The metallic layers are generally already present in the integrated circuit for signal routing. The transmission line is coupled between the circuit node and a terminal of an ESD protection device, with a transmission line return conductor coupled to a high-frequency ground. The transmission line is formed with an electrical length that transforms the impedance of the ESD protection device substantially into an open circuit at the circuit node at an operational frequency of the integrated circuit. The other terminal of the ESD protection device is coupled to the high-frequency ground.

Abstract: This invention discloses a charging/discharging protective circuit for a secondary battery pack, having an over-charging/discharging voltage comparator, a reference voltage source and a battery status decision circuit. There is also a sampling circuit having a sequential pulse generator for generating pulses for selecting one of the batteries in the battery pack for testing purposes. The pulse generator provides M-channel gating pulses to the selection circuit of the battery under test and provides sampling pulses to the over-charging/discharging voltage comparators. The reference voltage source has a regulated output circuit. This invention uses time division inspection methods to provide a cost-effective solution for inspecting batteries in a battery pack.

Abstract: Methods and apparatus to clamp overvoltages for inductive power transfer systems are described herein. An example overvoltage protection circuit is described, including a first terminal configured to receive an alternating current signal for conversion to a second signal, a capacitor, a first switch configured to selectively electrically couple the capacitor to the first terminal based on an overvoltage detection signal to reduce an overvoltage on the second signal, and an overvoltage detector. The example overvoltage detector is configured to determine a signal level of the second signal and, in response to determining that the signal level of the second signal is greater than a threshold, to output the overvoltage detection signal to cause the switch to electrically couple the capacitor between the first terminal and a second terminal.

Abstract: A battery charging system is disclosed. The battery charging system includes a battery cell, a voltage measurement circuit and an overvoltage protection circuit. The voltage measurement circuit measures a cell voltage of the battery cell. The overvoltage protection circuit is configured to stop charging the battery cell when a reading voltage measured by the voltage measurement circuit reaches an overvoltage setting value. The battery charging system also includes a battery charger for charging the battery cell, and a control unit for supplying a control voltage to the battery charger to perform feedback control of an output voltage of the battery charger. The battery charger includes a voltage feedback input for receiving a feedback voltage and a setting value input for receiving a setting voltage. The control voltage is generated based on the reading voltage and the setting voltage.