Overvoltage Patents (Class 361/91.1)
  • Publication number: 20130021702
    Abstract: Control circuitry handles inrush current, and may provide under voltage and/or over voltage monitoring and handling, as well as remote enable handling. The circuitry may advantageously employ a sense capacitor in parallel with an input capacitor (e.g., bulk input filter capacitor), and a current mirror to produce a signal proportional to input current. A clamp circuit may control a series pass device to regulate current in response to the proportional signal, or to interrupt current flow in response to an under voltage or over voltage condition or receipt of a signal indicative of a disable state. An enable signal may be summed into a comparator that handles under voltage condition determination.
    Type: Application
    Filed: July 18, 2011
    Publication date: January 24, 2013
    Inventors: Barry F. Waltman, Rodney Alan Hughes, Reid Adriance, Bertrand Nkei, Jay Allen Kuehny
  • Patent number: 8358490
    Abstract: A transistor with an electrical overstress (EOS) protection may include an active region, a plurality of impurity regions and a conduction pattern. The active region may be formed in a substrate. The impurity regions may be formed in the active region and arranged at a predetermined or given distance with respect to each other. The conduction pattern may be arranged between each of the impurity regions in a meandering shape, and the conduction pattern may include a center portion connected to a ground terminal. Therefore, a transistor with EOS protection, a clamp device, and an ESD protection circuit including the same may increase an on-time of a clamp device and may sufficiently discharge a charge due to the EOS by including a conduction pattern configured with gates that are connected with respect to each other in a meandering shape.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: January 22, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Hee Jeon, Kyoung-Sik Im, Hyun-Jun Choi, Han-Gu Kim
  • Patent number: 8358492
    Abstract: The present disclosure generally pertains to surge protection systems that protect outside plant equipment from high-energy surges. In one exemplary embodiment, a protection system is used for protecting Ethernet equipment that is coupled to an outside Ethernet cable. The protection system provides protection and remains capable of coupling signal energy between an Ethernet cable and Ethernet equipment without significantly degrading Ethernet performance. However, the protection system, while allowing the desirable Ethernet signals to pass between the cable and the equipment, prevents the electrical voltages and currents of high-energy surges, such as surges from lightning or AC power faults, from damaging the Ethernet equipment.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: January 22, 2013
    Assignee: ADTRAN, Inc.
    Inventors: James B. Wiese, Daniel M. Joffe
  • Publication number: 20130016448
    Abstract: A power converter includes a transient voltage protection circuit connected between an input of the power converter and a power stage of the power converter. The transient voltage protection circuit provides a low resistance connection from the input of the power converter to the power stage of the power converter when the input voltage is less than a predetermined threshold, but blocks the input voltage from the power stage when the input voltage is equal to or greater than the predetermined threshold voltage. The power converter may be a boost power converter used in a vehicle to provide power from a main power bus of the vehicle to a subsystem of the vehicle such as an anti-lock brake system.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 17, 2013
    Inventors: Mark Steven George, Charles Lawrence Bernards
  • Publication number: 20130010395
    Abstract: An overvoltage protection device for protecting electrical low-voltage installations, having a lower device part and at least one upper device part, wherein the lower device part has input and output terminals for the electrical conductors to be connected and contact elements connected to the input and output terminals. The upper device part has at least one overvoltage protection element. An intermediate device part is additionally provided which can be fitted onto the lower device part and onto which the upper device part can be fitted. The intermediate device part has mating contact elements corresponding to the contact elements of the lower device part and also has contact elements connected to the mating contact elements. The intermediate part has at least one longitudinal element connected between two mating contact elements, and the upper device part has mating contact elements corresponding to the contact elements of the intermediate device part.
    Type: Application
    Filed: March 24, 2011
    Publication date: January 10, 2013
    Applicant: PHOENIX CONTACT GMBH & CO. KG
    Inventors: Christian Birkholz, Steffen Pfoertner, Friedrich-Eckhard Brand
  • Patent number: 8351173
    Abstract: A power supply circuit includes an energy-consuming component including an input terminal, an input over-voltage protection circuit connected to the input terminal, and a feed back circuit. The feedback circuit is connected to the input over-voltage protection circuit and the input terminal of the energy-consuming component. The feedback circuit monitors the voltage on the input terminal, compares the voltage on the input terminal with a reference voltage, and turns off the input over-voltage protection circuit to cut off voltage provided to the input terminal of the energy-consuming component when the voltage on the input terminal is larger than the reference voltage.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: January 8, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chia-Ming Yeh
  • Patent number: 8351172
    Abstract: A power supply control apparatus includes an output transistor coupled between a first power supply line and an output terminal, the output terminal being configured to be coupled with a load, a discharge transistor coupled between a gate of the output transistor and the output terminal, and rendered conductive when the output transistor is brought into a non-conduction state, a negative voltage control unit coupled between the first power supply line and the gate of the output transistor, and bringing the output transistor into a conduction state when the counter electromotive voltage applied to the output terminal from the load exceeds a predetermined value, a diode having a cathode coupled with the first power supply line, and an anode, a third resistor provided between the anode of the diode and a second power supply line, and a compensation transistor coupled between the second power supply line and the output terminal.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: January 8, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Akihiro Nakahara
  • Patent number: 8350841
    Abstract: An ESD protection circuit comprises three transistors and two voltage dividers. The two source/drain terminals of a first transistor are electrically coupled to a first power line and a second power line respectively. The two source/drain terminals of a second transistor are electrically coupled to the first power line and a gate terminal of the first transistor respectively. The two source/drain terminals of a third transistor are electrically coupled to the gate terminal of the first transistor and the second power line respectively. A first voltage divider supplies a first voltage to a gate terminal of the second transistor according to a potential difference between the first power line and the second power line. A second voltage divider supplies a second voltage to a gate terminal of the third transistor according to the potential difference between the first power line and the second power line.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: January 8, 2013
    Assignee: Au Optronics Corp.
    Inventors: Chia-Sheng Li, Yung-Chih Chen, Chih-Lung Lin
  • Publication number: 20120327544
    Abstract: An overvoltage protection circuit includes a connection jack, a path connection module, a voltage response module, and a control module. The connection jack is connected to a power supply. The path connection module is connected between the connection jack and a load. The voltage response module is to output a first signal in response to an overvoltage, and output a second signal in response to a constant voltage. The control module is to output a corresponding potential according to the first signal to turn off the path connection module, and output a corresponding potential according to the second signal to turn on the path connection module. When the path connection module is turned off, the connection between the connection jack and the load is disabled, when the path connection module is turned on, the connection between the connection jack and the load is enabled.
    Type: Application
    Filed: July 27, 2011
    Publication date: December 27, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: XIAO-ZHAN PENG, XUE-BING DENG, XIN-PING LI
  • Publication number: 20120320482
    Abstract: A semiconductor integrated circuit that is efficiently reduced in a noise level is offered. P-channel type MOS transistors M1 and M2 serving as differential input transistors have a thin gate oxide film in order to reduce the noise level. A protection circuit to protect the P-channel type MOS transistors M1 and M2 from overvoltage is formed including P-channel type MOS transistors M3 and M4. The P-channel type MOS transistor M3 is a first protection transistor to protect the P-channel type MOS transistor M1 from overvoltage, and is connected to a drain of the P-channel type MOS transistor M1. The P-channel type MOS transistor M4 is a second protection transistor to protect the P-channel type MOS transistor M2 from overvoltage, and is connected to a drain of the P-channel type MOS transistor M2.
    Type: Application
    Filed: June 13, 2012
    Publication date: December 20, 2012
    Applicant: Semiconductor Components Industries, LLC
    Inventors: Akinobu ONISHI, Yasuhiro Hinokuma, Kazuyuki Kobayashi, Kengo Murase
  • Patent number: 8335065
    Abstract: A method for protecting against over voltage in a power supply comprises monitoring current amplitude and direction on an output connection of a power source that combines power from a plurality of power sources, and determining occurrence of a fault condition of the monitored power source based on the current amplitude and direction. In a fault condition of the monitored power source, operation of the monitored power source subject to the fault condition is terminated while continuing operation of the plurality of power sources exclusive of the monitored power source.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: December 18, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Robert B. Smith
  • Patent number: 8331068
    Abstract: An embodiment is a semiconductor device comprising a receiver circuit comprising fin field effect transistors (FinFETs), a transceiver circuit comprising FinFETs, and a transmit bus electrically coupling the receiver circuit and the transceiver circuit, wherein the receiver circuit and the transceiver circuit each further comprises an electrostatic discharge protection circuit comprising planar transistors electrically coupled to the transmit bus. Other embodiments may further comprise a power clamp electrically coupling a first power bus and a first ground bus, a power clamp electrically coupling a second power bus and a second ground bus, or at least two diodes electrically cross-coupling the first ground bus and the second ground bus. Also, the planar transistors of the transceiver circuit and the receiver circuit may each comprise a planar PMOS transistor and a planar NMOS transistor.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: December 11, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jam-Wem Lee, Andy Lo
  • Patent number: 8324691
    Abstract: An inverter for driving a motor includes a plurality of power semiconductor devices. The plurality of power semiconductor devices include a resistance electrically connected between a collector and an emitter of an IGBT element. Each of the power semiconductor devices forms any one of a U-phase arm, a V-phase arm and a W-phase arm of the inverter. As a result, a discharge resistance is built in the inverter, and therefore, it is not required to prepare the discharge resistance separately. Thus, the number of components required for a motor drive apparatus can be decreased and the number of operation steps can be reduced.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: December 4, 2012
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Satoshi Hirose, Daigo Kikuta
  • Patent number: 8324843
    Abstract: The invention relates to a circuit arrangement for the selective operation of at least two electric machines (1, 2) that are each supplied via a plurality of phase lines, comprising:—one voltage protection module (5) for limiting an intermediate circuit voltage,—one switch arrangement (4) for selecting one of the electric machines by switching the phase lines;—first choke inductivities (8) in each of the plurality of phase lines between the circuit arrangement (4) and the voltage protection module (5), wherein one second choke inductivity (9?) each may be switched parallel to one or more first choke inductivities (8) as a function of the selected electric machine (1, 2), can be switched.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: December 4, 2012
    Assignee: Siemens Aktiengesellschaft
    Inventor: Hans Seidner
  • Patent number: 8320091
    Abstract: Apparatus and methods for electronic circuit protection are disclosed. In one embodiment, an actively-controlled protection circuit includes a detector, a timer, a current source and a latch. The detector is configured to generate a detection signal when the detector determines that a transient signal satisfies a first signaling condition. The timer is configured to receive the detection signal, and to generate a current control signal. The current control signal is provided to a current source, which produces a trigger current at least partly in response to the control signal. The trigger current is provided to a node of the latch, thereby enhancing the conductivity modulation of the latch and selectively controlling the activation voltage of the latch.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: November 27, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Javier A. Salcedo, Colin McHugh
  • Patent number: 8320094
    Abstract: A surge protection module comprises a base, a plurality of first pins extending from the base to connect electrically to an upstream circuit, a plurality of second pins extending from the base to connect electrically to a downstream circuit, a fuse device acting between each first pin and a respective one of the second pins, at least one analog arrestor upstream of the fuse devices that is electrically connected across the first pins and in electrical connection to a ground terminal extending from the base, and a low capacitance solid state arrestor arrangement electrically connected to each second pin downstream of the fuse devices and to the ground terminal.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: November 27, 2012
    Assignee: Circa Enterprises, Inc.
    Inventors: Sonila Hebibasi, Garner Meszaros
  • Patent number: 8320092
    Abstract: A protection circuit 10 provided with a current regulating section 14 with a first end connected to a power source line VDD and a second end connected to an input terminal 116A of an inverter 116. The current regulating section 14 applies a voltage of less than a threshold value voltage to the input terminal 116A when a surge current having predetermined frequency characteristics flows from the first end in a particular flow path, by generating induced electromotive force so as to generate a magnetic field to cancel out the magnetic field occurring due to the surge current, thereby impeding flow of the surge current. The current regulating section 14 applies a voltage of the threshold value voltage or greater to the input terminal 116A when a driving current not having the frequency characteristics flows in from the first end.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: November 27, 2012
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Chikashi Fuchigami
  • Patent number: 8319286
    Abstract: A system and method for electrostatic discharge protection. The system includes a first transistor including a first drain, a second transistor including a second drain, and a resistor including a first terminal and a second terminal. The first terminal is coupled to the first drain and the second drain. Additionally, the system includes a third transistor coupled to the second terminal and a protected system. The third transistor includes a first gate, a first dielectric layer located between the first gate and a first substrate, a first source, and a third drain. The protected system includes a fourth transistor, and the fourth transistor includes a second gate, a second dielectric layer located between the second gate and a second substrate, a second source, and a fourth drain.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Ting Chieh Su, Min Chie Jeng, Chin Chang Liao, Jun Cheng Huang
  • Publication number: 20120293009
    Abstract: An apparatus and method of protecting a power receiver of a wireless power transmission system are provided. A wireless power receiver includes a rectifier comprising an input and an output, and configured to receive a signal through the input, to rectify the signal to produce a rectified signal, and to output the rectified signal through the output, and a capacitor connected to the output of the rectifier and to ground. The wireless power receiver further includes a direct current-to-direct current (DC/DC) converter connected to the output of the rectifier and to a load, and configured to convert the rectified signal to a power, and to provide the power to the load, and a device configured to create a short circuit to protect the rectifier and/or the capacitor when a voltage greater than a threshold voltage is applied to the input of the rectifier and/or the output of the rectifier.
    Type: Application
    Filed: May 17, 2012
    Publication date: November 22, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong Zo Kim, Sang Wook Kwon, Ki Young Kim, Nam Yun Kim, Yun Kwon Park, Eun Seok Park, Young Ho Ryu, Chang Wook Yoon, Jin Sung Choi, Young Tack Hong
  • Publication number: 20120293901
    Abstract: A protection circuit includes a coding chip, a digital-to-analog converter (DAC), and a control circuit. The coding chip receives parallel voltage identification definition (PVID) signals or serial voltage identification definition (SVID) signals from a central processing unit (CPU), and converts the PVID signals or the SVID signals to voltage identification definition (VID) signals. The DAC receives the VID signals from the coding chip, and converts the VID signals to an analog voltage. The control circuit receives the analog voltage from the DAC and a voltage received by the CPU, and compares the analog voltage from the DAC with the voltage received by the CPU. When the voltage received by the CPU is greater than the analog voltage from the DAC, the control circuit disconnects the CPU from a first power supply.
    Type: Application
    Filed: August 5, 2011
    Publication date: November 22, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: YONG-JUN SONG, XING-LONG TENG, YONG-ZHAO HUANG
  • Patent number: 8315021
    Abstract: A motor detecting and protecting apparatus electrically connected with a motor. The motor detecting and protecting apparatus includes a detecting unit, an error determining unit, a controlling unit and a driving unit. The detecting unit detects a state of the motor and outputs at least one first detecting signal and at least one second detecting signal to the error determining unit. The error determining unit has a first predetermined value, wherein the error determining unit outputs a warning signal to the controlling unit while a variation value between the first detecting signal and the second detecting signal exceeds the first predetermined value. And the controlling unit will control the motor to stop operating by the driving unit in accordance with the warning signal. And a motor detecting and protecting method is also disclosed.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: November 20, 2012
    Assignee: Delta Electronics, Inc.
    Inventors: Chia-Pin Wei, Po-Tsun Kuo
  • Patent number: 8310798
    Abstract: An electrically noisy D.C. power source having high slew rate A.C. transient voltage, is cut off from a capacitive load by a switchable, constant slew rate voltage source, upon the detection of an A.C. transient voltage having a slew rate that would otherwise cause a current overload through the capacitive load or the voltage source, or the D.C. power source.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: November 13, 2012
    Assignee: Continental Automotove Systems, Inc.
    Inventor: Jason Grover
  • Patent number: 8310090
    Abstract: A differential-current switch includes a first unit arranged in an electric power supply network for detecting a differential current and outputting an analog differential current signal, an analog-to-digital converter receiving the outputted analog differential current signal and converting the outputted analog differential current signal to a digital differential current signal, a first digital signal processing unit receiving the digital differential current signal, a second unit for disconnecting circuit breaker contacts in the electric power supply network, and first means connected upstream of the analog-to-digital converter for adjusting the analog differential current signal. Adjustment of the analog differential current signal provides favorable resolution of a differential current signal over a wide dynamic range.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: November 13, 2012
    Assignee: Moeller Gebäudeautomation GmbH
    Inventors: Georg Ritzinger, Rainer Meisel
  • Patent number: 8310796
    Abstract: A switching circuit for use in a power converter is provided. The switching circuit includes an insulated gate bipolar transistor (IGBT) including a gate terminal, a collector terminal, and an emitter terminal, a gate drive circuit electrically coupled to the gate terminal and configured to switch the IGBT on and off, and, a temperature drift resistant clamp circuit electrically coupled between the gate terminal and the collector terminal of the IGBT, the temperature drift resistant clamp circuit configured to maintain a voltage at the collector terminal below a threshold voltage and facilitate reducing the effects of temperature on operation of the switching circuit.
    Type: Grant
    Filed: July 13, 2011
    Date of Patent: November 13, 2012
    Assignee: General Electric Company
    Inventor: Robert Gregory Wagoner
  • Publication number: 20120281326
    Abstract: This document discusses, among other things, systems and methods for detecting a charging current from a startup circuit to a controller without power loss from a voltage divider, and for providing information representative of the charging current to the controller.
    Type: Application
    Filed: May 6, 2011
    Publication date: November 8, 2012
    Inventor: Bc. Jan Grulich
  • Patent number: 8305723
    Abstract: A motor drive ground fault detection device operates by computing the total RMS voltage of all the phases, and comparing the total RMS voltage to a threshold to determine if a ground fault has occurred.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: November 6, 2012
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Sastry V. Vedula, James J. Wrobel, Neal D. Clements
  • Patent number: 8305724
    Abstract: An electric connection box 10 comprises an FET 32 for connection with a power supply B, a substrate side conduction path 18 connected with the FET 32 and connecting the FET 32 with a load L, a diode element D connected with the substrate side conduction path 18 electrically and to transfer heat and having a PN junction, and a CPU 19 for judging whether the voltage drop value between the input/output terminals 25 and 26 of the diode element D is larger than a threshold or not and delivering an off-command signal to the FET 32 if a judgment is made that the voltage drop value is smaller than the threshold.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: November 6, 2012
    Assignees: Autonetworks Technologies, Ltd, Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Yutaka Higuchi, Mitsuaki Kohsaka, Seiji Takahashi
  • Patent number: 8305720
    Abstract: A latch-control protection circuit applied in a power converter is provided. The protection circuit has a comparing circuit unit and a logic gate. The comparing circuit unit is utilized to selectively output a default signal or a comparing signal according to a state signal from the logic gate, wherein the default signal is utilized for latching the state signal and the comparing signal is corresponded to the power condition of the power converter. The logic gate generates the state signal according to the output signal of the comparing circuit unit and a system judging signal. The output signal may be the default signal or the comparing signal. The system judging signal indicates the condition of the power converter.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: November 6, 2012
    Assignee: Analog Vision Technology Inc.
    Inventor: Ming Chiang Ting
  • Publication number: 20120275077
    Abstract: Systems and methods are disclosed for securing a programmable integrated circuit device against an over-voltage attack. Generally, programmable devices, such as FPGAs, contain volatile memory registers that may store sensitive information. To prevent tampering and/or reverse engineering of such a programmable device, an over-voltage detection circuit may be employed to disable the device and/or erase the sensitive information stored on the device when an over-voltage attack is suspected. In particular, once the over-voltage detection circuit detects that the voltage applied to the programmable device exceeds a trigger voltage, it may cause logic circuitry to erase the sensitive information stored on the device. Desirably, the over-voltage detection circuit includes components arranged in such a way as to render current consumption negligible when the voltage applied to the programmable device, e.g., by a battery, remains below the trigger voltage.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 1, 2012
    Applicant: ALTERA CORPORATION
    Inventors: Bruce B. Pedersen, Dirk A. Reese
  • Patent number: 8300373
    Abstract: A transient blocking unit (TBU) is an arrangement of two or more transistors connected to each other in series such that they automatically switch off when a TBU current passing through these transistors exceeds a predetermined threshold. Voltage turnoff capability is provided for a TBU by adding a voltage comparison circuit to the TBU. The voltage comparison circuit provides gate voltages to one or more of the TBU transistors that tend to turn off the TBU transistors, if the voltage at the TBU output (i.e., the protected device output voltage) falls outside a predetermined range. The voltage provided by the voltage comparison circuit adds constructively to the gate voltages provided by normal TBU operation. Accordingly, TBU switch off can be driven by an over-current condition (TBU current out of range) and/or by an over-voltage condition (TBU output voltage out of range).
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: October 30, 2012
    Assignee: Bourns, Inc.
    Inventor: Andrew J. Morrish
  • Patent number: 8289669
    Abstract: A semiconductor device includes an output transistor which controls a power supply to a load according to a control voltage applied to a gate thereof, a voltage control circuit coupled between the gate and a drain of the output transistor, the voltage control circuit having a conduction state controlled according to a potential difference between a source and the drain of the output transistor, and a voltage control detection circuit which outputs a voltage control detection signal on a basis of the conduction state of the voltage control circuit.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: October 16, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Akihiro Nakahara
  • Patent number: 8289183
    Abstract: A system and method for monitoring performance of one or more solar panels in a photovoltaic array. The system and method includes a number of sensors are configured to measure an output of individual solar panels. A telemetry gateway collects data from the sensors and transmits the collected data to a monitoring system. The monitoring system includes an event signature recognizer; a trend analyzer; and a symmetry analyzer. The monitoring system detects events, trends and solar panel array asymmetry. Additionally, the monitoring system displays realtime graphs, proposed corrective actions, and alerts via a user interface.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: October 16, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Andrew Foss
  • Patent number: 8284531
    Abstract: A voltage protection arrangement for an electronic device, in particular for a control system in automation engineering has a great functionality, and also a greater range of applications, due to the fact that the arrangement has a switching-off unit and a voltage detection unit connected to the output of the switching-off unit, the switching-off unit having a voltage comparator and a normally electrically closed switch connected to the output of the voltage comparator, arranged between the input and the output of the switching-off unit, wherein the voltage detection unit has a voltage comparator and a switch output connected to the output of the voltage comparator for signaling an impermissible voltage, and wherein, in the event of an impermissible voltage occurring at the input of the switching-off unit, the electrical switch is opened and, in the event of a subsequent permissible voltage occurring, the switch is closed again.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: October 9, 2012
    Assignee: Phoenix Contact GmbH & Co. KG
    Inventor: Heinz-Carsten Landwehr
  • Patent number: 8284565
    Abstract: An electronic apparatus is provided that can include a circuit board; a switch attached to the circuit board; an electronic part mounted on the circuit board; a wiring pattern extending between the switch and the electronic part; and a protrusion protruding from a surface of the wiring pattern. The protrusion may be disposed adjacent to the switch on the circuit board and overlapping the wiring pattern.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: October 9, 2012
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Akihiro Shibasaki, Katsumi Inukai, Tasuku Sugimoto
  • Patent number: 8283698
    Abstract: An electrostatic discharge (ESD) protection circuit for protecting an integrated circuit (IC) having a first voltage potential, a first power supply potential and a second power supply potential. The ESD circuit includes a first NPN bipolar transistor having a first N-doped junction, a second N-doped junction and a third P-doped base junction. The first N-doped junction is coupled to the first voltage potential and the second N-doped junction is coupled to the first power supply potential. The ESD circuit also includes a first PNP bipolar transistor having a first P-doped junction, a second P-doped junction and a third N-doped base junction. The first P-doped junction is coupled to the first voltage potential and the second P-doped junction is coupled to the second power supply potential. The third P-doped base junction of the first NPN bipolar transistor is coupled to the third N-doped base junction of the first PNP bipolar transistor.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: October 9, 2012
    Assignee: Sofics BVBA
    Inventors: Bart Sorgeloos, Benjamin Van Camp
  • Patent number: 8284529
    Abstract: The present invention relates to a reclosing control system and method using a superconducting fault current limiter. The reclosing control system includes a superconducting fault current limiting device in which two circuits, each having a switch and a superconducting fault current limiter connected in series with each other, are connected in parallel with each other. A recloser is disposed between the superconducting fault current limiting device and a distribution line and is configured to control reclosing. The distribution line is connected to the recloser and is configured to transfer power to a load.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: October 9, 2012
    Assignee: Sungkyunkwan University Foundation for Corporation
    Inventors: Chul Hwan Kim, Sang Bong Rhee, Hun Chul Seo, Yun Tae Ko
  • Patent number: 8284532
    Abstract: An over-voltage protection system is connected between a power supply and two working circuits of an electronic device, and includes a first over-voltage protection circuit, a second over-voltage protection circuit, and a voltage load circuit. The over-voltage protection system detects voltage of the power supply, isolates the power supply from a first working circuit when the power supply exceeds a first predetermined voltage value, and isolates the power supply from a second working circuit when the voltage of the power supply exceeds a second predetermined voltage value and is lower than the first predetermined voltage value. The voltage load circuit bears partial voltage of the power supply to provide necessary power to the second working circuit when the voltage of the power supply exceeds a second predetermined voltage value and is lower than the first predetermined voltage value.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: October 9, 2012
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Lei Yu, Ping-Hua Xu
  • Publication number: 20120250205
    Abstract: A surge protective device is disclosed that may include a comparator to determine when a line voltage of a line is above a threshold. The device may include a switch to couple a clamping device to the line voltage when the comparator determines the line voltage is above a threshold, wherein the clamping device shunts current from the line. The switch may include a silicon-controlled rectifier (SCR) or a thyristor and the clamping device may include a selenium surge suppression device.
    Type: Application
    Filed: February 22, 2012
    Publication date: October 4, 2012
    Applicant: THOMAS & BETTS INTERNATIONAL, INC.
    Inventors: Hans-Erik Pfitzer, Martin William Guy
  • Patent number: 8279570
    Abstract: An electrostatic discharge (ESD) circuit, adaptive to a radio frequency (RF) device, which includes a RF circuit coupled between a VDD power rail and a VSS power rail and having a RF I/O pad, includes an ESD clamp circuit coupled between a VDD power rail node and the VSS power rail node and a LC-tank structure coupled between the VDD power rail node and the VSS power rail node and to the RF I/O pad. The LC-tank structure includes a first ESD block between the VDD power rail node and the RF I/O pad, and a second ESD block between the VSS power rail node and the RF I/O pad. At least one of the first and second ESD blocks includes a pair of diodes coupled in parallel with each other and an inductor coupled in series with one of the pair of diodes.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: October 2, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yu Lin, Li-Wei Chu, Ming-Dou Ker, Ming Hsien Tsai, Tse-Hua Lu, Ping-Fang Hung
  • Patent number: 8279568
    Abstract: This application discusses, among other things, switch circuit apparatus having power down protection and not requiring power up sequencing. An apparatus embodiment can include a first supply node coupled to a first input of a level shifting circuit via a protection circuit, a second supply node coupled to a second input of the level shifting circuit via a single pull-up transistor, and a switch including a control input, a first node, and a second node controllably isolated from the first node, wherein the control input is coupled to the level shifting circuit. The first and second inputs of the level shifting circuit can be coupled via a rectifier, and the protection circuit can be configured to power the first and second supply nodes to controllably isolate the first and second nodes from each other when a voltage of one of the first or second nodes exceeds a threshold.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: October 2, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Julie Lynn Stultz, Nickole Gagne, Steven Macaluso
  • Publication number: 20120243136
    Abstract: A surge protection arrangement for protecting against an overvoltage condition in an electrical circuit having a power source and an electrical load includes a reactive component (such as a capacitor or an inductor) and a switching circuit connected to the reactive component. The switching circuit causes surge energy to flow to the reactive component in response to an overvoltage condition in the electrical circuit so that the surge energy is stored in the reactive component.
    Type: Application
    Filed: March 23, 2011
    Publication date: September 27, 2012
    Applicant: SATCON TECHNOLOGY CORPORATION
    Inventors: Joseph Mossoba, Leo Francis Casey, Milan Ilac, Stephen Nichols
  • Publication number: 20120236456
    Abstract: The present invention provides a transistor circuit with protecting function. The transistor circuit includes a transistor, a voltage detecting unit, a current detecting unit, a temperature detecting unit, and a protecting unit. The voltage detecting unit detects a voltage drop of the transistor and generates an over-voltage protection signal. The current detecting signal detects a current flowing through the transistor and generates an over-current protection signal. The temperature detecting unit detects a temperature of the transistor circuit and generates an over-temperature protection signal. The protecting unit is coupled to the control terminal to control a state of the transistor according to the over-voltage protection signal, the over-current protection signal, and the over-temperature protection signal to reduce the voltage difference between the control terminal and the second terminal, such that the voltage drop of the transistor is decreased or decreased to zero.
    Type: Application
    Filed: January 13, 2012
    Publication date: September 20, 2012
    Inventor: Chung-Che YU
  • Patent number: 8270133
    Abstract: A power supply control apparatus includes: an output transistor coupled between a first power supply line and an output terminal, the output terminal being configured to be coupled with a load; a protection transistor coupled between a gate of the output transistor and a second power supply line; a negative voltage control unit coupled between the first power supply line and the gate of the output transistor; a compensation transistor bringing the second power supply line and the output terminal into a conduction state when a counter electromotive voltage from the load is applied to the output terminal; and a back gate control circuit that controls the second power supply line and a back gate of each of the compensation transistor and the protection transistor to be brought into a conduction state in a standby state when the polarity of the power supply is normal.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: September 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Akihiro Nakahara
  • Patent number: 8270134
    Abstract: An electrical circuit comprising a power supply, a load, a first pair of parallel positive cables between the power supply and the load, a first pair of parallel negative cables between the load and the power supply, and incendive arc prevention means, in which the incendive arc prevention means comprises monitoring means adapted to monitor the first pair of positive cables and the first pair of negative cables, and to detect if the current and/or voltage in one of the first pair of positive cables deviates from the other, and if the current and/or voltage in one of the first pair of negative cables deviates from the other, and in which the incendive arc prevention means comprises a control means adapted to fully or partially isolate the power supply from the first pair of positive cables and the first pair of negative cables if the monitoring means detects that the current and/or voltage of one of the first pair of positive cables has deviated from the other, or if the current and/or voltage of one of the fi
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: September 18, 2012
    Assignee: Pepperl & Fuchs (DE)
    Inventors: Gunther Rogoll, Renato Kitchener
  • Patent number: 8270129
    Abstract: The present invention relates to a device arranged for converting an AC input voltage to a DC output voltage, comprising a bridgeless boost converter; and a surge protection system. The surge protection system comprises a first protection diode (Dprot1), where the anode is connected to a first AC input terminal and the cathode is connected to a positive boost output terminal (Obp); a second protection diode (Dprot2), where the anode is connected to a negative boost output terminal (Obn) and the cathode is connected to the first AC input terminal; a third protection diode (Dprot3), where the anode is connected to a second AC input terminal and the cathode is connected to the positive boost output terminal (Obp); and a fourth protection diode (Dprot4), where the anode is connected to the negative boost output terminal (Obn) and the cathode is connected to the second AC input terminal.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: September 18, 2012
    Assignee: Elktek Valere AS
    Inventors: Knut-Ivar Gjerde, Erik Myhre, Roberto Rojas, Jan Tore Brastad
  • Patent number: 8270131
    Abstract: An electrostatic discharge (ESD) protection element is described, the ESD protection element including a collector area, a first barrier area, a semiconductor area, a second barrier area and an emitter area. The collector area has a first conductivity type. The first barrier area borders on the collector area and has a second conductivity type. The semiconductor area borders on the first barrier area and is an intrinsic semiconductor area, or has the first or second conductivity type and a dopant concentration which is lower than a dopant concentration of the first barrier area. The second barrier area borders on the semiconductor area and has the second conductivity type and a higher dopant concentration than the semiconductor area. The emitter area borders on the second barrier area and has the first conductivity type.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: September 18, 2012
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Klein, Hans Taddiken, Winfried Bakalski
  • Publication number: 20120229946
    Abstract: According to one embodiment, there is provided a protection relay. The protection relay includes an input circuit that detects a state of an external device according to whether or not an external input voltage is larger than a preset threshold voltage. The input circuit includes switching unit that is made conductive by a divided voltage obtained by voltage-dividing resistors that divide the external input voltage when the external input voltage is higher than or equal to the threshold voltage, and a photocoupler that is operated by a constant current of a constant current output circuit supplying a constant current and outputs an operation signal to the operation unit when the switching unit is made conductive.
    Type: Application
    Filed: May 21, 2012
    Publication date: September 13, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroyuki SHIRAKAWA, Yusuke Yanagihashi, Hiroyuki Maehara, Toshio Tanaka, Noriyoshi Suga, Itsuo Shuto
  • Patent number: 8264806
    Abstract: An electronic device is provided that includes a protection circuit for a light-emitting device. The protection circuit comprises a first node adapted to be coupled to an anode of the light-emitting device and a second node adapted to be coupled to a cathode of the light-emitting device. A voltage detection stage is coupled between the first and second nodes. The voltage detection stage is adapted to detect an overvoltage condition between the first and second nodes. Furthermore, the protection circuit comprises a thyristor coupled with its anode to the first node, its cathode to the second node to the voltage detection stage. When the overvoltage condition is detected in normal operation the thyristor is controlled to open so that the current can flow through the thyristor.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: September 11, 2012
    Assignee: Texas Instruments Deutschland GmbH
    Inventor: Dirk Gehrke
  • Publication number: 20120224290
    Abstract: An overvoltage protection device made by: employing a machining technique to make a through hole through opposing top and bottom walls of a substrate, and then filling an overvoltage protection material in the through hole of the substrate, and then curing the overvoltage protection material, and then coating a flat electrode on each of the top and bottom walls of the substrate over and in connection with top and bottom sides of the overvoltage protection material.
    Type: Application
    Filed: March 3, 2011
    Publication date: September 6, 2012
    Inventors: Jing-Rong TANG, Wen-Hsin Lin, Szu-Lung Sun
  • Patent number: 8259422
    Abstract: By using switching power supplies a, b, and n, which have detection function of over-current, over-voltage and low voltage, in the case where a short-circuit occurred in a load which is connected to output of a switching power supply, and in the case where a MOSFET of the switching power supply is in a short-circuit state and broken, a main power is forced to be off, and a failure log of the switching power supply is stored in a non-volatile memory unit EEPROM; and also in the case where the main power was turned off and on, even if an abnormal log of the switching power supply logged in the non-volatile memory unit, reclosing of the main power is suppressed and which of the switching power supply occurred failure is notified to the outside.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: September 4, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Michinori Naito, Naoyuki Todoroki, Kenta Ota, Junya Ide, Yusuke Morita