Particular Current Control Structure Patents (Class 372/46.01)
  • Patent number: 10938180
    Abstract: An optoelectronic component includes a layer structure including an active zone that generates electromagnetic radiation, wherein the active zone is arranged in a plane, the layer structure includes a top side and four side faces, the first and third side faces are arranged opposite one another, the second and fourth side faces are arranged opposite one another, a strip-type ridge structure is arranged on the top side of the layer structure, the ridge structure extends between the first side face and the third side face, the first side face constitutes an emission face for electromagnetic radiation, a first recess is introduced into the top side of the layer structure laterally alongside the ridge structure, a second recess is introduced into the first recess, and the second recess extends as far as the second side face.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: March 2, 2021
    Assignee: OSRAM OLED GmbH
    Inventors: Sven Gerhard, Alfred Lell, Clemens Vierheilig, Andreas Löffler
  • Patent number: 10938179
    Abstract: Provided are an addressable laser array device and an electronic apparatus including the addressable laser array device. The addressable laser array device includes a plurality of VCSELs, each including a distributed Bragg reflector (DBR), a nanostructure reflector including a plurality of nanostructures having a sub-wavelength dimension, and a gain layer disposed between the DBR and the nanostructure reflector; a plurality of first wiring patterns extending in a first direction and being electrically connected to the plurality of VCSELs, respectively; and a plurality of second wiring patterns extending in a second direction intersecting the first direction and being electrically connected to the plurality of VCSELs, respectively, wherein the plurality of VCSELs are disposed at intersections of the plurality of first wiring patterns and the plurality of second wiring patterns, and the addressable VCSEL array device is configured to selectively drive at least some of the plurality of VCSELs.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: March 2, 2021
    Assignees: SAMSUNG ELECTRONICS CO., LTD., UNIVERSITY OF MASSACHUSETTS
    Inventors: Byunghoon Na, Mahdad Mansouree, Seunghoon Han, Amir Arbabi
  • Patent number: 10916917
    Abstract: A method of manufacturing a surface emitting laser includes: forming a mesa by performing etching on a lower reflector layer, an active layer, and an upper reflector layer; forming a current narrowing layer by oxidizing a part of the upper reflector layer; exposing a substrate by performing etching on the lower reflector layer, the active layer, and the upper reflector layer, using a chlorine-containing gas; cleaning the substrate; performing heat treatment on the substrate; forming an insulating film covering a surface of the substrate; forming an electrode on the lower reflector layer and the upper reflector layer; and performing heat treatment on the substrate, wherein a temperature in the first heat treatment is lower than a temperature in the forming the current narrowing layer.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: February 9, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Yukihiro Tsuji
  • Patent number: 10903624
    Abstract: A semiconductor laser element includes a first nitride semiconductor layer of a first conductivity-type; a second nitride semiconductor layer of a second conductivity-type; and an active region disposed between the first nitride semiconductor layer and the second nitride semiconductor layer. The active region includes a first barrier layer, an intermediate layer, a well layer and a second barrier layer. A lattice constant of the intermediate layer is greater than a lattice constant of each of the first barrier layer and the second barrier layer, and smaller than a lattice constant of the well layer. A thickness of the intermediate layer is greater than a thickness of the well layer. The well layer and the second barrier layer are in contact with each other, or a distance between the well layer and the second barrier layer is smaller than a distance between the first barrier layer and the well layer.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: January 26, 2021
    Assignee: NICHIA CORPORATION
    Inventor: Yoji Nagao
  • Patent number: 10896969
    Abstract: A manufacturing method of an HEMT includes: forming a heterostructure; forming a first gate layer of intrinsic semiconductor material on the heterostructure; forming a second gate layer, containing dopant impurities of a P type, on the first gate layer; removing first portions of the second gate layer so that second portions, not removed, of the second gate layer form a doped gate region; and carrying out a thermal annealing of the doped gate region so as to cause a diffusion of said dopant impurities of the P type in the first gate layer and in the heterostructure, with a concentration, in the heterostructure, that decreases as the lateral distance from the doped gate region increases.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: January 19, 2021
    Assignee: STMICROELECTRONICS S.r.l.
    Inventor: Ferdinando Iucolano
  • Patent number: 10892597
    Abstract: A nitride semiconductor laser includes: a first nitride semiconductor layer; a light-emitting layer formed on the first nitride semiconductor layer and including a nitride semiconductor; a second nitride semiconductor layer formed on the light-emitting layer and having a ridge portion; an electrode component formed on the second nitride semiconductor layer, and which is wider than the ridge portion; and a dielectric layer formed on side surfaces of the ridge portion and including SiO2. A space is present between the electrode component and the dielectric layer, and the electrode component is prevented from being in contact with the dielectric layer by the space, and is in contact with the upper surface of the ridge portion.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: January 12, 2021
    Assignee: PANASONIC CORPORATION
    Inventors: Hiroyuki Hagino, Osamu Imafuji, Shinichiro Nozaki
  • Patent number: 10847950
    Abstract: A vertical cavity surface emitting laser includes: a supporting base; and a post including an upper distributed Bragg reflecting region, an active layer, and a lower distributed Bragg reflecting region. The upper distributed Bragg reflecting region, the active layer, and the lower distributed Bragg reflecting region are arranged on the supporting base. The lower distributed Bragg reflecting region includes first semiconductor layers and second semiconductor layers alternately with each of the first semiconductor layers having a refractive index lower than that of each of the second semiconductor layers. The upper distributed Bragg reflecting region includes first layers and second layers alternately with each of the first layers having a group III-V compound semiconductor portion and a group III oxide portion. The group III-V compound semiconductor portion contains aluminum as a group III constituent element, and the group III oxide portion surrounds the group III-V compound semiconductor portion.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: November 24, 2020
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Yutaka Onishi
  • Patent number: 10843381
    Abstract: An LED wafer processing method includes a dividing step of rotatably mounting a first cutting blade having a first width in a first cutting unit, holding an LED wafer on a holding table, and then relatively moving the first cutting unit and the holding table to cut the wafer along each division line formed on the wafer, thereby forming a full-cut groove along each division line to thereby divide the wafer into individual chips. The method further includes rotatably mounting a second cutting blade having a second width larger than the first width in a second cutting unit after performing the dividing step, and then relatively moving the second cutting unit and the holding table to thereby polish the opposed side surfaces of the full-cut groove formed along each division line, whereby a polished groove larger in width than the full-cut groove is formed along each full-cut groove.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: November 24, 2020
    Assignee: DISCO CORPORATION
    Inventor: Makiko Ohmae
  • Patent number: 10840419
    Abstract: The present application discloses a nitride semiconductor light-emitting device and a manufacture method thereof. The nitride semiconductor light-emitting device includes an epitaxial structure, wherein the epitaxial structure has a first face and a second face opposite to the first face, the first face is a (0001) nitrogen face and located at the n type side of the epitaxial structure, the second face is located at the p type side of the epitaxial structure, the n type side of the epitaxial structure is electrically contacted with an n type electrode, the p type side is electrically contacted with a p type electrode, and a ridge waveguide structure is formed on the first face.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: November 17, 2020
    Assignee: Suzhou Institute of Nano-Tech and Nano-Bionics (Sinano), Chinese Academy of Sciences
    Inventors: Qian Sun, Meixin Feng, Yu Zhou, Hongwei Gao, Hui Yang
  • Patent number: 10833476
    Abstract: A surface-mountable semiconductor laser and an arrangement with such a semiconductor laser are disclosed. In one embodiment, the semiconductor laser is includes a semiconductor layer sequence having at least one generation region between a p-side and an n-side, at least two contact surfaces for external electrical contacting of the p-side and the n-side, wherein the contact surfaces are located on the same side of the semiconductor layer sequence in a common plane so that the semiconductor laser are contactable without bonding wires, at least one of a plurality of conductor rails extending from a side with the contact surfaces across the semiconductor layer sequence and a plurality of through-connections running at least through the generation region, wherein the generation region is configured to be pulse operated with time-wise current densities of at least 30 A/mm2.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: November 10, 2020
    Assignee: OSRAM OLED GMBH
    Inventors: Martin Müller, Hubert Halbritter
  • Patent number: 10825734
    Abstract: A method and stacked semiconductor device having a top surface, a bottom surface, and at least one side surface that connects the top surface with the bottom surface. The bottom surface is formed of a substrate layer or a rear side contact layer arranged below the substrate layer. On the substrate layer, a first semiconductor layer of a first conductivity type is arranged and on the first semiconductor layer at least one second semiconductor layer of a second conductivity type is arranged. The first and second semiconductor layers are formed of a III-V material or consist of a III-V material. The first and second conductivity types are different. The top surface is at least partially formed by a passivation layer. Along the side surface, an amorphized and/or insulating region extending to a depth is formed, and the depth is perpendicular or substantially perpendicular to the layer stack.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: November 3, 2020
    Assignee: 3-5 Power Electronics GmbH
    Inventor: Volker Dudek
  • Patent number: 10811843
    Abstract: The disclosure relates to a semiconductor laser includes a semiconductor layer sequence with an-n-type n-region, a p-type p-region and an active zone lying between the two for the purpose of generating laser radiation. A p-contact layer that is permeable to the laser radiation and consists of a transparent conductive oxide is located directly on the p-region for the purpose of current input. An electrically-conductive metallic p-contact structure is applied directly to the p-contact layer. The p-contact layer is one part of a cover layer, and therefore the laser radiation penetrates as intended into the p-contact layer during operation of the semiconductor laser. Two facets of the semiconductor layer sequence form resonator end surfaces for the laser radiation.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: October 20, 2020
    Assignee: OSRAM OLED GMBH
    Inventors: Sven Gerhard, Alfred Lell, Clemens Vierheilig, Andreas Loeffler, Christoph Eichler
  • Patent number: 10784649
    Abstract: A semiconductor laser (2) includes an n-type semiconductor substrate (1), a stack of an n-type cladding layer (4), an active layer (5), and a p-type cladding layer (6) successively stacked on the n-type semiconductor substrate (1). An optical waveguide (3) includes a non-impurity-doped core layer (9) provided on a light output side of the semiconductor laser (2) on the n-type semiconductor substrate (1) and having a larger forbidden band width than the active layer (5), and a cladding layer (10) provided on the core layer (9) and having a lower carrier concentration than the p-type cladding layer (6). The semiconductor laser (2) includes a carrier injection region (X1), and a non-carrier-injection region (X2) provided between the carrier injection region (X1) and the optical waveguide (3).
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: September 22, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Go Sakaino, Naoki Nakamura, Yuichiro Okunuki
  • Patent number: 10770864
    Abstract: A surface emitting laser includes a conductive substrate, a metal bonding layer, a laser structure layer, an epitaxial semiconductor reflection layer, and an electrode layer. The laser structure layer has an epitaxial current-blocking layer having a current opening. Currents are transmitting through the current opening. The epitaxial current-blocking layer is grown by a semiconductor epitaxy process to confine the range of the currents to form electric fields.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: September 8, 2020
    Assignee: TREND LIGHTING CORP.
    Inventors: Jonathan Wang, Pei-Chin Hsieh, Pei-Jih Wang, Shih-Chieh Cheng
  • Patent number: 10714901
    Abstract: In an embodiment a laser include a semiconductor layer sequence having an active zone for generating radiation and an electrical contact web arranged on a top side of the semiconductor layer sequence, wherein the contact web is located on the top side only in an electrical contact region or is in electrical contact with the top side only in the contact region so that the active zone is supplied with current only in places during operation, wherein the contact web comprises a plurality of metal layers at least partially stacked one above the other, wherein at least one of the metal layers comprises a structuring so that the at least one metal layer only partially covers the contact region and has at least one opening or interruption, and wherein the structuring reduces stresses of the semiconductor layer sequence on account of different thermal expansion coefficients of the metal layers.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: July 14, 2020
    Assignee: OSRAM OLED GMBH
    Inventors: Bernhard Stojetz, Georg Brüderl
  • Patent number: 10693277
    Abstract: A non-planarized VCSEL can include: a blocking region over or under an active region, the blocking region having a first thickness; one or more conductive channel cores in the blocking region, the one or more conductive channel cores having a second thickness that is larger than the first thickness, wherein the blocking region is defined by having an implant and the one or more conductive channel cores are devoid of the implant, wherein the blocking region is lateral the one or more conductive channel cores, the blocking region and one or more conductive channel cores being an isolation region; and a non-planarized semiconductor region of one or more non-planarized semiconductor layers over the isolation region. The VCSEL can include a planarized bottom mirror region below the active region and a non-planarized top mirror region above the isolation region, or a non-planarized bottom mirror region below the active region.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: June 23, 2020
    Assignee: II-VI Delaware Inc.
    Inventors: Luke A. Graham, Sonia Quadery, Deepa Gazula, Haiquan Yang
  • Patent number: 10673207
    Abstract: The invention relates to, inter alia, a light-emitting semiconductor component comprising the following: —a first mirror (102, 202, 302, 402, 502), —a first conductive layer (103, 203, 303, 403, 503), —a light-emitting layer sequence (104, 204, 304, 404, 504) on a first conductive layer face facing away from the first mirror, and—a second conductive layer (105, 205, 305, 405, 505) on a light-emitting layer sequence face facing away from the first conductive layer, wherein—the first mirror, the first conductive layer, the light-emitting layer sequence, and the second conductive layer are based on a III-nitride compound semiconductor material, —the first mirror is electrically conductive, and—the first mirror is a periodic sequence of homoepitaxial materials with varying refractive indices.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: June 2, 2020
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Armin Dadgar, André Strittmatter, Christoph Berger
  • Patent number: 10658816
    Abstract: The invention relates to a distributed feedback laser diode (10) comprising a waveguide with a gain medium assisted by a network formed by a distribution of elements (22) including a sub-set comprising localised resonators (24) distributed along the axis of the waveguide, characterised in that the frequency characteristic of the feedback induced on the wave of the guide by the spatial distribution of said elements differs by less than 50% of the resonance frequency of said localised resonators.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: May 19, 2020
    Assignees: UNIVERSITE PARIS SUD, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Anatole Lupu, Natalia Dubrovina, Abderrahim Ramdane, Henri Benisty
  • Patent number: 10658531
    Abstract: A photodiode fabricated using spalling techniques, and method for making the same. The photodiode including a substrate, an optical device semiconductor material layer disposed over the substrate, a p-type contact disposed over the optical device semiconductor material layer, an n-type contact disposed over the substrate, and an adhesion layer for rear illumination adhered to the bottom of the substrate. Both the substrate and the optical device semiconductor material layer comprise at least one of GaN, AlGaN or AlN.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: May 19, 2020
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, James R. Kozloski, Devendra K. Sadana
  • Patent number: 10636724
    Abstract: A mount structure having a joining capable of withstanding development of cracks generated by thermal stress due to repeated temperature changes in a mount structure having the joining of a large area is formed by joining a ceramic substrate electrode of a ceramic substrate and a metal substrate electrode of a metal substrate by a laminate, in which the laminate is formed by stacking a first interface layer, a first solder joining portion, a second interface layer, a first buffer material electrode, a buffer material, a second buffer material electrode, a third interface layer, a second solder joining portion and a fourth interface layer in this order from the ceramic substrate electrode toward the metal substrate electrode, a thickness of the laminate is 30 ?m or more and 100 ?m or less, a difference between a thickness of the first solder joining portion and a thickness of the second solder joining portion is within 25%, and differences in elastic moduli and in linear expansion coefficients between the firs
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: April 28, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTTD.
    Inventors: Kiyohiro Hine, Akio Furusawa, Hidetoshi Kitaura, Kazuki Sakai
  • Patent number: 10627055
    Abstract: A method and device for emitting electromagnetic radiation at high power using a gallium containing substrates such as GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, is provided.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: April 21, 2020
    Assignee: Soraa Laser Diode, Inc.
    Inventor: Eric Goutain
  • Patent number: 10630057
    Abstract: In an embodiment a laser include a semiconductor layer sequence having an active zone for generating radiation and an electrical contact web arranged on a top side of the semiconductor layer sequence, wherein the contact web is located on the top side only in an electrical contact region or is in electrical contact with the top side only in the contact region so that the active zone is supplied with current only in places during operation, wherein the contact web comprises a plurality of metal layers at least partially stacked one above the other, wherein at least one of the metal layers comprises a structuring so that the at least one metal layer only partially covers the contact region and has at least one opening or interruption, and wherein the structuring reduces stresses of the semiconductor layer sequence on account of different thermal expansion coefficients of the metal layers.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: April 21, 2020
    Assignee: OSRAM OLED GMBH
    Inventors: Bernhard Stojetz, Georg Brüderl
  • Patent number: 10593838
    Abstract: The embodiment discloses a semiconductor device which includes: a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer; a first electrode electrically connected to the first conductive semiconductor layer; a second electrode electrically connected to the second conductive semiconductor layer; a first cover electrode disposed on the first electrode; and an insulation layer disposed between the first electrode and the second electrode, wherein the insulation layer comprises a first insulation portion disposed between the first conductive semiconductor layer and the first cover electrode, and a second insulation portion disposed on the first cover electrode, wherein the first cover electrode comprises a first protrusion portion disposed between an upper surface of the first insulation portion and a lower surface of the second insulation portion.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: March 17, 2020
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Youn Joon Sung, Jin Soo Park, Rak Jun Choi
  • Patent number: 10516251
    Abstract: An oxide-confined vertical cavity surface emitting laser including a distributed Bragg reflector (DBR) wherein the layers of the (DBR) includes a multi-section layer consisting of a first section having a moderately high aluminum composition, an second section which is an insertion having a low aluminum composition, and a third section which is an oxide-confined aperture formed by partial oxidation of a layer having a high aluminum composition (95% and above). A difference in aluminum composition between a high value in the aperture layer and a moderately high value in the first section prevents non-desirable oxidation of the first section from the mesa side while the aperture layer is being oxidized. A low aluminum composition in the second section prevents non-desirable oxidation in the vertical direction of the layer adjacent to the targeted aperture layer.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: December 24, 2019
    Assignee: VI Systems GmbH
    Inventors: Nikolay Ledentsov, Vitaly Shchukin
  • Patent number: 10505344
    Abstract: A system and method for providing laser diodes with broad spectrum is described. GaN-based laser diodes with broad or multi-peaked spectral output operating are obtained in various configurations by having a single laser diode device generating multiple-peak spectral outputs, operate in superluminescence mode, or by use of an RF source and/or a feedback signal. In some other embodiments, multi-peak outputs are achieved by having multiple laser devices output different lasers at different wavelengths.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: December 10, 2019
    Assignee: Soraa Laser Diode, Inc.
    Inventors: James W. Raring, Mathew C. Schmidt, Yu-Chia Chang
  • Patent number: 10505346
    Abstract: A semiconductor laser device of an edge emission type, where a waveguide mode is multi-mode, is provided. The semiconductor laser device includes a first facet of the waveguide on an emission direction front side, the first facet having a first width in a horizontal direction perpendicular to a longitudinal direction of the waveguide; and a second facet of the waveguide on an emission direction rear side, the second facet having the first width, wherein a width of the waveguide, in the horizontal direction, is at least partially narrower than the first width, between the first facet and the second facet.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: December 10, 2019
    Assignee: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Eisaku Kaji, Yutaka Ohki
  • Patent number: 10429718
    Abstract: A photon source to deliver single photons includes a storage ring resonator to receive pump photons and generate a signal photon and an idler photon. An idler resonator is coupled to the storage resonator to couple the idler photon out of the storage resonator and into a detector. Detection of the idler photon stops the pump photons from entering the storage resonator. A signal resonator is coupled to the storage resonator to couple out the signal photon remaining in the storage resonator and delivers the signal photon to applications. The photon source can be fabricated into a photonic integrated circuit to achieve high compactness, reliability, and controllability.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: October 1, 2019
    Assignee: Massachusetts Institute of Technology
    Inventors: Mihir Pant, Dirk Robert Englund, Mikkel Heuck
  • Patent number: 10411437
    Abstract: An optoelectronic device includes a semiconductor substrate and an array of optoelectronic cells, formed on the semiconductor substrate. The cells include first epitaxial layers defining a lower distributed Bragg-reflector (DBR) stack; second epitaxial layers formed over the lower DBR stack, defining a quantum well structure; third epitaxial layers, formed over the quantum well structure, defining an upper DBR stack; and electrodes formed over the upper DBR stack, which are configurable to inject an excitation current into the quantum well structure of each optoelectronic cell. A first set of the optoelectronic cells are configured to emit laser radiation in response to the excitation current. In a second set of the optoelectronic cells, interleaved with the first set, at least one element of the optoelectronic cells, selected from among the epitaxial layers and the electrodes, is configured so that the optoelectronic cells in the second set do not emit the laser radiation.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: September 10, 2019
    Assignee: APPLE INC.
    Inventors: Chin Han Lin, Weiping Li, Xiaofeng Fan
  • Patent number: 10404034
    Abstract: A broad area quantum cascade laser subject to having high order transverse optical modes during operation includes a laser cavity at least partially enclosed by walls, and a perturbation in the laser cavity extending from one or more of the walls. The perturbation may have a shape and a size sufficient to suppress high order transverse optical modes during operation of the broad area quantum cascade laser, where a fundamental transverse optical mode is selected over the high order transverse optical modes. As a result, the fundamental transverse mode operation in broad-area quantum cascade lasers may be regained, when it could not otherwise be without such a perturbation.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: September 3, 2019
    Assignee: THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE
    Inventors: Ron Kaspi, Chi Yang
  • Patent number: 10404036
    Abstract: A two-dimensional photonic crystal laser with transparent conductive cladding layer is provided. The two-dimensional photonic crystal region through the etching process is composed by multiple periodic air-holes with proper duty cycle. Then, the transparent conductive oxide layer is directly deposited on the top of the entire two-dimensional photonic crystal structure to cover the entire two-dimensional photonic crystal structure in order to form a current spreading layer. The configuration and the process condition of transparent conductive oxide layer are optimized to provide uniform current spreading path and the transparency. In addition to simplifying the whole fabrication process, the optical confinement is improved and the maximum gain to optical feedback is obtained. Overall, low threshold, small divergence angle and high quality laser output is achieved to satisfy the requirements for next-generation light sources.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: September 3, 2019
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Tien-Chang Lu, Kuo-Bin Hong, Shen-Che Huang
  • Patent number: 10381804
    Abstract: A vertical-cavity light-emitting element includes: a first reflector; a semiconductor structure layer including a first semiconductor layer, an active layer, a second semiconductor layer, and a third semiconductor layer that are sequentially provided on the first reflector; a transparent electrode on the third semiconductor layer; and a second reflector on the transparent electrode and interposes the structure layer with the first reflector. The third semiconductor layer has a mesa structure to protrude on the second semiconductor layer and be covered by the transparent electrode. The light emitting element further includes a current confining layer including: an insulating film provided in the second semiconductor layer to surround the mesa structure and be in contact with the transparent electrode, the insulating film being an oxide of the second semiconductor layer; and an insulating layer on the insulating film to surround the mesa structure and define a through opening.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: August 13, 2019
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Komei Tazawa, Ji-Hao Liang, Seiichiro Kobayashi
  • Patent number: 10359871
    Abstract: Provided is a display panel including a loop-shaped conductive path which is manufactured by performing a conductive ink jetting process and a high-degree vacuum removal process to effectively vaporizing a solvent in a conductive ink line at lower temperature than the boiling point at atmospheric pressure of the solvent. The conductive path manufactured as such does not allow a stain or a trace, such as a pull-back region, to be left around the conductive path. Thus, it is possible to obtain the loop-shaped conductive path having an initially intended design without being damaged during a process.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: July 23, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Sunbae Kong, JeongKweon Park, Chan Park, KyengBaek Ryu, Heungju Jo
  • Patent number: 10224943
    Abstract: An atomic oscillator includes a gas cell housing alkali metal atoms, a light source providing light to the gas cell, and a light detector that detects an amount of light transmitted through the gas cell. The light source includes a substrate, a first mirror layer on an upper portion of the substrate, an active layer on an upper portion of the first mirror layer, a second mirror layer on an upper portion of the active layer, a first contact layer on an upper portion of the second mirror layer, a light absorption layer on an upper portion of the first contact layer, and a second contact layer on an upper portion of the light absorption layer. As such, an output wavelength and the light output of the light source can be independently adjusted.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: March 5, 2019
    Assignee: Seiko Epson Corporation
    Inventor: Yasutaka Imai
  • Patent number: 10186640
    Abstract: Provided in one embodiment is a light emitting diode comprising: a light emitting structure including a first conductive semiconductor layer, an active layer on top of the first conductive semiconductor layer, and a second conductive semiconductor layer on top of the active layer; a first electrode arranged on a portion of the first conductive semiconductor layer; an insulating layer, which is arranged on a portion of the first electrode, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer, and which has a DBR structure; and a second electrode arranged on the second conductive semiconductor layer, wherein the first electrode comes into contact with the insulating layer via a first surface and is exposed to the insulating layer via a second surface opposite the first surface.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: January 22, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Keon Hwa Lee, Byeong Kyun Choi
  • Patent number: 10181547
    Abstract: An optoelectronic semiconductor chip (1) is provided which has a semiconductor body comprising a semiconductor layer sequence (2) with an active region (20) provided for generating and/or receiving radiation, a first semiconductor region (21) of a first conduction type, a second semiconductor region (22) of a second conduction type and a cover layer (25). The active region (20) is arranged between the first semiconductor region (21) and the second semiconductor region (22) and comprises a contact layer (210) on the side remote from the active region. The cover layer (25) is arranged on the side of the first semiconductor region (21) remote from the active region (20) and comprises at least one cut-out (27), in which the contact layer (210) adjoins the first connection layer (3). The cover layer is of the second conduction type. Furthermore, a method is provided for producing optoelectronic semiconductor chips.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: January 15, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Petrus Sundgren, Markus Broell
  • Patent number: 10164143
    Abstract: An optoelectronic semiconductor chip has a semiconductor body and a substrate on which the semiconductor body is disposed. The semiconductor body has an active region disposed between a first semiconductor layer of a first conductor type and a second semiconductor layer of a second conductor type. The first semiconductor layer is disposed on the side of the active region facing the substrate. The first semiconductor layer is electrically conductively connected to a first termination layer that is disposed between the substrate and the semiconductor body. An encapsulation layer is disposed between the first termination layer and the substrate and, in plan view of the semiconductor chip, projects at least in some regions over a side face which delimits the semiconductor body.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: December 25, 2018
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Karl Engl, Markus Maute, Stefanie Rammelsberger, Anna Kasprzak-Zablocka
  • Patent number: 10128636
    Abstract: The invention relates to a Vertical Cavity Surface Emitting Laser (100) comprising a first electrical contact (105), a substrate (110), a first Distributed Bragg Reflector (115), an active layer (120), a second Distributed Bragg Reflector (130) and a second electrical contact (135). The Vertical Cavity Surface Emitting Laser comprises at least one AlyGa(1-y)As-layer with 0.95?y?1 with a thickness of at least 40 nm, wherein the AlyGa(1-y )As-layer is separated by means of at least one oxidation control layer (119, 125b). The invention further relates to a laser device (300) comprising such a VCSEL (100) preferably an array of such a VCSELs (100) which are driven by an electrical driving circuit (310). The invention also relates to a method of manufacturing such a VCSEL (100).
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: November 13, 2018
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Philipp Henning Gerlach, Roger King
  • Patent number: 10128633
    Abstract: A surface emitting semiconductor laser includes a post disposed on a substrate, the post including an active layer and a distributed Bragg reflector; a first insulating layer disposed on side and top surfaces of the post and on the substrate, the first insulating layer having an opening on the top surface of the post; an electrode disposed in the opening of the first insulating layer; an electric conductor including a pad electrode on the first insulating layer, the electric conductor extending on the first insulating layer to the electrode; and a second insulating layer disposed on the first insulating layer, the electrode, and the electric conductor so as to cover the electrode in the opening of the first insulating layer, the second insulating layer having an opening on the pad electrode, the opening of the second insulating layer having an edge on a top surface of the pad electrode.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: November 13, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yuji Koyama, Masaki Yanagisawa, Yukihiro Tsuji, Hirohiko Kobayashi, Hiroyuki Yoshinaga
  • Patent number: 10122148
    Abstract: A system and method for providing laser diodes with broad spectrum is described. GaN-based laser diodes with broad or multi-peaked spectral output operating are obtained in various configurations by having a single laser diode device generating multiple-peak spectral outputs, operate in superluminescene mode, or by use of an RF source and/or a feedback signal. In some other embodiments, multi-peak outputs are achieved by having multiple laser devices output different lasers at different wavelengths.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: November 6, 2018
    Assignee: Soraa Laser Diodide, Inc.
    Inventors: James W. Raring, Mathew C. Schmidt, Yu-Chia Chang
  • Patent number: 10116121
    Abstract: A method of manufacturing a semiconductor device, includes a step of forming, on a semiconductor substrate, a mesa stripe including an active layer, and a semiconductor layer covering the mesa stripe, a masking step of forming, on the semiconductor layer, a mask pattern through which the semiconductor layer is exposed on opposite sides of the mesa stripe, an isotropic etching step of performing isotropic etching on the semiconductor layer exposed through the mask pattern so that concaves having a circular-arc sectional shape are formed in the semiconductor layer, and an anisotropic etching step of performing anisotropic etching on the semiconductor layer through the mask pattern after the isotropic etching step so that etching progresses to the semiconductor substrate.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: October 30, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hitoshi Sakuma
  • Patent number: 10103514
    Abstract: A semiconductor light-emitting device according to one embodiment includes a substrate, a first light reflection structure provided in contact with the substrate, a buried layer surrounding the first light reflection structure, an optical semiconductor structure including an active layer, provided above the first light reflection structure, a second light reflection structure provided above the optical semiconductor structure, and a pair of electrodes which supply current to the optical semiconductor structure. The surface of the first light reflection structure and the surface of the buried layer are included in the same plane.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: October 16, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya Ohira, Mizunori Ezaki, Hirotaka Uemura, Haruhiko Yoshida, Norio Ilzuka, Hideto Furuyama
  • Patent number: 10020634
    Abstract: A Schottky diode is monolithically integrated into the core of an infrared semiconductor laser (e.g., a quantum cascade laser) to create a heterodyned infrared transceiver. The internal mode field of the infrared semiconductor laser couples to an embedded Schottky diode and can mix the infrared fields to generate a response at the difference frequency.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: July 10, 2018
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Michael Wanke, Christopher Nordquist, Mark Lee
  • Patent number: 10014661
    Abstract: VCSELs and methods having improved characteristics. In some embodiments, these include a semiconductor substrate; a vertical-cavity surface-emitting laser (VCSEL) on the substrate; a first electrical contact formed on the VCSEL; a second electrical contact formed on the substrate, wherein the VCSEL includes: a first resonating cavity having first and second mirrors, at least one of which partially transmits light incident on that mirror, wherein the first second mirrors are electrically conductive. A first layer is between the first mirror and the second mirror and has a first aperture that restricts the path of current flow. A second layer is between the first layer and the second mirror and also restricts the electrical current path. A multiple-quantum-well (MQW) structure is between the first mirror and the second mirror, wherein the first and second apertures act together to define a path geometry of the current through the MQW structure.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: July 3, 2018
    Assignee: Vixar, LLC
    Inventors: Mary K. Brenner, Klein L. Johnson, Matthew M. Dummer
  • Patent number: 9979156
    Abstract: A semiconductor laser device that enables flip-chip assembly by having an embedding section around a mesa section, and that has an improved emission lifetime, as well as a photoelectric converter and an optical information processing unit each having such a semiconductor laser device. The semiconductor laser device includes: a mesa section including an active layer, and having a first electrode on a top surface; an embedding section covering the mesa section, and having a first connection aperture that reaches the first electrode; and a first wiring provided on the embedding section overlaying the first connection aperture, the first wiring being electrically connected to the first electrode through the first connection aperture.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: May 22, 2018
    Assignee: SONY CORPORATION
    Inventor: Hiizu Ootorii
  • Patent number: 9972960
    Abstract: An active optical planar waveguide apparatus includes a planar core layer comprising an active laser ion; one or more cladding layers in optical contact with at least one surface of the planar core layer; a metallic binder layer chemically bonded to an outermost cladding layer of the one or more cladding layers; a metallic adhesion layers disposed on the metallic binder layer; a heatsink for dissipating heat from the planar waveguide; and a metallic thermal interface material (TIM) layer providing a metallurgical bond between the metallic adhesion layer and the heatsink.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: May 15, 2018
    Assignee: RAYTHEON COMPANY
    Inventors: Christopher R. Koontz, David M. Filgas, Kurt S. Ketola, Carl W. Townsend
  • Patent number: 9971225
    Abstract: A spot size converter includes: a first semiconductor waveguide structure having a first width enabling single mode propagation; a second semiconductor waveguide structure having a second width greater than the first width, a second semiconductor waveguide structure including an end face for optically coupling with an external waveguide; a third semiconductor waveguide structure having a third width greater than the first and second widths, the third semiconductor waveguide structure being optically coupled to the second semiconductor waveguide structure; and a single tapered waveguide having a first end portion connected to the third semiconductor waveguide structure, and a second end portion connected to the first semiconductor waveguide structure, the single tapered waveguide having a width gradually changing in a direction from the first end portion to the second end portion.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: May 15, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoya Kono
  • Patent number: 9947349
    Abstract: An apparatus includes a waveguide extending along a light-propagation direction between a light source and a media-facing surface. An assistant layer is configured to receive light from a light source, the assistant layer has a terminating end with a first taper that narrows toward the media-facing surface. A core layer has a coupling end configured to receive light from the assistant layer, the coupling end having a second taper that widens toward the media-facing surface. A middle cladding layer is disposed between the core layer and the assistant layer. A near field transducer is disposed proximate the media-facing surface and configured to receive the light from the core layer.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: April 17, 2018
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventor: Chubing Peng
  • Patent number: 9948064
    Abstract: A method of manufacturing a semiconductor device includes a step of forming a mesa portion including an active layer above a substrate, and an n-type layer above the active layer, a step of forming a current confinement portion on left and right of the mesa portion, the current confinement portion including a p-type current blocking layer, an n-type current blocking layer above the p-type current blocking layer, and an i-type or p-type current blocking layer above the n-type current blocking layer, and a p-type doping step of diffusing p-type impurities into the i-type or p-type current blocking layer, an upper portion of the n-type current blocking layer, and left and right portions of the n-type layer to change the upper portion of the n-type current blocking layer and the left and right portions of the n-type layer to p-type semiconductors.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: April 17, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroaki Tsuchiya, Harunaka Yamaguchi, Eiji Nakai
  • Patent number: 9935418
    Abstract: An active optical planar waveguide apparatus includes a planar core layer comprising an active laser ion; one or more cladding layers in optical contact with at least one surface of the planar core layer; a metallic binder layer chemically bonded to an outermost cladding layer of the one or more cladding layers; a metallic adhesion layers disposed on the metallic binder layer; a heatsink for dissipating heat from the planar waveguide; and a metallic thermal interface material (TIM) layer providing a metallurgical bond between the metallic adhesion layer and the heatsink.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: April 3, 2018
    Assignee: RAYTHEON COMPANY
    Inventors: Christopher R. Koontz, David M. Filgas, Kurt S. Ketola, Carl W. Townsend
  • Patent number: 9935427
    Abstract: A vertical cavity light-emitting element includes: a first-conductivity-type semiconductor layer; an active layer; a second-conductivity-type semiconductor layer that are formed in this order on a first reflector; an insulating current confinement layer formed on the second-conductivity-type semiconductor layer; a through opening formed in the current confinement layer; a transparent electrode covering the through opening and the current confinement layer and being in contact with the second-conductivity-type semiconductor layer via the through opening; and a second reflector formed on the transparent electrode.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: April 3, 2018
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Komei Tazawa, Ji-Hao Liang, Seiichiro Kobayashi