Particular Current Control Structure Patents (Class 372/46.01)
  • Patent number: 10516251
    Abstract: An oxide-confined vertical cavity surface emitting laser including a distributed Bragg reflector (DBR) wherein the layers of the (DBR) includes a multi-section layer consisting of a first section having a moderately high aluminum composition, an second section which is an insertion having a low aluminum composition, and a third section which is an oxide-confined aperture formed by partial oxidation of a layer having a high aluminum composition (95% and above). A difference in aluminum composition between a high value in the aperture layer and a moderately high value in the first section prevents non-desirable oxidation of the first section from the mesa side while the aperture layer is being oxidized. A low aluminum composition in the second section prevents non-desirable oxidation in the vertical direction of the layer adjacent to the targeted aperture layer.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: December 24, 2019
    Assignee: VI Systems GmbH
    Inventors: Nikolay Ledentsov, Vitaly Shchukin
  • Patent number: 10505344
    Abstract: A system and method for providing laser diodes with broad spectrum is described. GaN-based laser diodes with broad or multi-peaked spectral output operating are obtained in various configurations by having a single laser diode device generating multiple-peak spectral outputs, operate in superluminescence mode, or by use of an RF source and/or a feedback signal. In some other embodiments, multi-peak outputs are achieved by having multiple laser devices output different lasers at different wavelengths.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: December 10, 2019
    Assignee: Soraa Laser Diode, Inc.
    Inventors: James W. Raring, Mathew C. Schmidt, Yu-Chia Chang
  • Patent number: 10505346
    Abstract: A semiconductor laser device of an edge emission type, where a waveguide mode is multi-mode, is provided. The semiconductor laser device includes a first facet of the waveguide on an emission direction front side, the first facet having a first width in a horizontal direction perpendicular to a longitudinal direction of the waveguide; and a second facet of the waveguide on an emission direction rear side, the second facet having the first width, wherein a width of the waveguide, in the horizontal direction, is at least partially narrower than the first width, between the first facet and the second facet.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: December 10, 2019
    Assignee: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Eisaku Kaji, Yutaka Ohki
  • Patent number: 10429718
    Abstract: A photon source to deliver single photons includes a storage ring resonator to receive pump photons and generate a signal photon and an idler photon. An idler resonator is coupled to the storage resonator to couple the idler photon out of the storage resonator and into a detector. Detection of the idler photon stops the pump photons from entering the storage resonator. A signal resonator is coupled to the storage resonator to couple out the signal photon remaining in the storage resonator and delivers the signal photon to applications. The photon source can be fabricated into a photonic integrated circuit to achieve high compactness, reliability, and controllability.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: October 1, 2019
    Assignee: Massachusetts Institute of Technology
    Inventors: Mihir Pant, Dirk Robert Englund, Mikkel Heuck
  • Patent number: 10411437
    Abstract: An optoelectronic device includes a semiconductor substrate and an array of optoelectronic cells, formed on the semiconductor substrate. The cells include first epitaxial layers defining a lower distributed Bragg-reflector (DBR) stack; second epitaxial layers formed over the lower DBR stack, defining a quantum well structure; third epitaxial layers, formed over the quantum well structure, defining an upper DBR stack; and electrodes formed over the upper DBR stack, which are configurable to inject an excitation current into the quantum well structure of each optoelectronic cell. A first set of the optoelectronic cells are configured to emit laser radiation in response to the excitation current. In a second set of the optoelectronic cells, interleaved with the first set, at least one element of the optoelectronic cells, selected from among the epitaxial layers and the electrodes, is configured so that the optoelectronic cells in the second set do not emit the laser radiation.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: September 10, 2019
    Assignee: APPLE INC.
    Inventors: Chin Han Lin, Weiping Li, Xiaofeng Fan
  • Patent number: 10404036
    Abstract: A two-dimensional photonic crystal laser with transparent conductive cladding layer is provided. The two-dimensional photonic crystal region through the etching process is composed by multiple periodic air-holes with proper duty cycle. Then, the transparent conductive oxide layer is directly deposited on the top of the entire two-dimensional photonic crystal structure to cover the entire two-dimensional photonic crystal structure in order to form a current spreading layer. The configuration and the process condition of transparent conductive oxide layer are optimized to provide uniform current spreading path and the transparency. In addition to simplifying the whole fabrication process, the optical confinement is improved and the maximum gain to optical feedback is obtained. Overall, low threshold, small divergence angle and high quality laser output is achieved to satisfy the requirements for next-generation light sources.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: September 3, 2019
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Tien-Chang Lu, Kuo-Bin Hong, Shen-Che Huang
  • Patent number: 10404034
    Abstract: A broad area quantum cascade laser subject to having high order transverse optical modes during operation includes a laser cavity at least partially enclosed by walls, and a perturbation in the laser cavity extending from one or more of the walls. The perturbation may have a shape and a size sufficient to suppress high order transverse optical modes during operation of the broad area quantum cascade laser, where a fundamental transverse optical mode is selected over the high order transverse optical modes. As a result, the fundamental transverse mode operation in broad-area quantum cascade lasers may be regained, when it could not otherwise be without such a perturbation.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: September 3, 2019
    Assignee: THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE
    Inventors: Ron Kaspi, Chi Yang
  • Patent number: 10381804
    Abstract: A vertical-cavity light-emitting element includes: a first reflector; a semiconductor structure layer including a first semiconductor layer, an active layer, a second semiconductor layer, and a third semiconductor layer that are sequentially provided on the first reflector; a transparent electrode on the third semiconductor layer; and a second reflector on the transparent electrode and interposes the structure layer with the first reflector. The third semiconductor layer has a mesa structure to protrude on the second semiconductor layer and be covered by the transparent electrode. The light emitting element further includes a current confining layer including: an insulating film provided in the second semiconductor layer to surround the mesa structure and be in contact with the transparent electrode, the insulating film being an oxide of the second semiconductor layer; and an insulating layer on the insulating film to surround the mesa structure and define a through opening.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: August 13, 2019
    Assignee: STANLEY ELECTRIC CO., LTD.
    Inventors: Komei Tazawa, Ji-Hao Liang, Seiichiro Kobayashi
  • Patent number: 10359871
    Abstract: Provided is a display panel including a loop-shaped conductive path which is manufactured by performing a conductive ink jetting process and a high-degree vacuum removal process to effectively vaporizing a solvent in a conductive ink line at lower temperature than the boiling point at atmospheric pressure of the solvent. The conductive path manufactured as such does not allow a stain or a trace, such as a pull-back region, to be left around the conductive path. Thus, it is possible to obtain the loop-shaped conductive path having an initially intended design without being damaged during a process.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: July 23, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Sunbae Kong, JeongKweon Park, Chan Park, KyengBaek Ryu, Heungju Jo
  • Patent number: 10224943
    Abstract: An atomic oscillator includes a gas cell housing alkali metal atoms, a light source providing light to the gas cell, and a light detector that detects an amount of light transmitted through the gas cell. The light source includes a substrate, a first mirror layer on an upper portion of the substrate, an active layer on an upper portion of the first mirror layer, a second mirror layer on an upper portion of the active layer, a first contact layer on an upper portion of the second mirror layer, a light absorption layer on an upper portion of the first contact layer, and a second contact layer on an upper portion of the light absorption layer. As such, an output wavelength and the light output of the light source can be independently adjusted.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: March 5, 2019
    Assignee: Seiko Epson Corporation
    Inventor: Yasutaka Imai
  • Patent number: 10186640
    Abstract: Provided in one embodiment is a light emitting diode comprising: a light emitting structure including a first conductive semiconductor layer, an active layer on top of the first conductive semiconductor layer, and a second conductive semiconductor layer on top of the active layer; a first electrode arranged on a portion of the first conductive semiconductor layer; an insulating layer, which is arranged on a portion of the first electrode, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer, and which has a DBR structure; and a second electrode arranged on the second conductive semiconductor layer, wherein the first electrode comes into contact with the insulating layer via a first surface and is exposed to the insulating layer via a second surface opposite the first surface.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: January 22, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Keon Hwa Lee, Byeong Kyun Choi
  • Patent number: 10181547
    Abstract: An optoelectronic semiconductor chip (1) is provided which has a semiconductor body comprising a semiconductor layer sequence (2) with an active region (20) provided for generating and/or receiving radiation, a first semiconductor region (21) of a first conduction type, a second semiconductor region (22) of a second conduction type and a cover layer (25). The active region (20) is arranged between the first semiconductor region (21) and the second semiconductor region (22) and comprises a contact layer (210) on the side remote from the active region. The cover layer (25) is arranged on the side of the first semiconductor region (21) remote from the active region (20) and comprises at least one cut-out (27), in which the contact layer (210) adjoins the first connection layer (3). The cover layer is of the second conduction type. Furthermore, a method is provided for producing optoelectronic semiconductor chips.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: January 15, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Petrus Sundgren, Markus Broell
  • Patent number: 10164143
    Abstract: An optoelectronic semiconductor chip has a semiconductor body and a substrate on which the semiconductor body is disposed. The semiconductor body has an active region disposed between a first semiconductor layer of a first conductor type and a second semiconductor layer of a second conductor type. The first semiconductor layer is disposed on the side of the active region facing the substrate. The first semiconductor layer is electrically conductively connected to a first termination layer that is disposed between the substrate and the semiconductor body. An encapsulation layer is disposed between the first termination layer and the substrate and, in plan view of the semiconductor chip, projects at least in some regions over a side face which delimits the semiconductor body.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: December 25, 2018
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Karl Engl, Markus Maute, Stefanie Rammelsberger, Anna Kasprzak-Zablocka
  • Patent number: 10128636
    Abstract: The invention relates to a Vertical Cavity Surface Emitting Laser (100) comprising a first electrical contact (105), a substrate (110), a first Distributed Bragg Reflector (115), an active layer (120), a second Distributed Bragg Reflector (130) and a second electrical contact (135). The Vertical Cavity Surface Emitting Laser comprises at least one AlyGa(1-y)As-layer with 0.95?y?1 with a thickness of at least 40 nm, wherein the AlyGa(1-y )As-layer is separated by means of at least one oxidation control layer (119, 125b). The invention further relates to a laser device (300) comprising such a VCSEL (100) preferably an array of such a VCSELs (100) which are driven by an electrical driving circuit (310). The invention also relates to a method of manufacturing such a VCSEL (100).
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: November 13, 2018
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Philipp Henning Gerlach, Roger King
  • Patent number: 10128633
    Abstract: A surface emitting semiconductor laser includes a post disposed on a substrate, the post including an active layer and a distributed Bragg reflector; a first insulating layer disposed on side and top surfaces of the post and on the substrate, the first insulating layer having an opening on the top surface of the post; an electrode disposed in the opening of the first insulating layer; an electric conductor including a pad electrode on the first insulating layer, the electric conductor extending on the first insulating layer to the electrode; and a second insulating layer disposed on the first insulating layer, the electrode, and the electric conductor so as to cover the electrode in the opening of the first insulating layer, the second insulating layer having an opening on the pad electrode, the opening of the second insulating layer having an edge on a top surface of the pad electrode.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: November 13, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yuji Koyama, Masaki Yanagisawa, Yukihiro Tsuji, Hirohiko Kobayashi, Hiroyuki Yoshinaga
  • Patent number: 10122148
    Abstract: A system and method for providing laser diodes with broad spectrum is described. GaN-based laser diodes with broad or multi-peaked spectral output operating are obtained in various configurations by having a single laser diode device generating multiple-peak spectral outputs, operate in superluminescene mode, or by use of an RF source and/or a feedback signal. In some other embodiments, multi-peak outputs are achieved by having multiple laser devices output different lasers at different wavelengths.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: November 6, 2018
    Assignee: Soraa Laser Diodide, Inc.
    Inventors: James W. Raring, Mathew C. Schmidt, Yu-Chia Chang
  • Patent number: 10116121
    Abstract: A method of manufacturing a semiconductor device, includes a step of forming, on a semiconductor substrate, a mesa stripe including an active layer, and a semiconductor layer covering the mesa stripe, a masking step of forming, on the semiconductor layer, a mask pattern through which the semiconductor layer is exposed on opposite sides of the mesa stripe, an isotropic etching step of performing isotropic etching on the semiconductor layer exposed through the mask pattern so that concaves having a circular-arc sectional shape are formed in the semiconductor layer, and an anisotropic etching step of performing anisotropic etching on the semiconductor layer through the mask pattern after the isotropic etching step so that etching progresses to the semiconductor substrate.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: October 30, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hitoshi Sakuma
  • Patent number: 10103514
    Abstract: A semiconductor light-emitting device according to one embodiment includes a substrate, a first light reflection structure provided in contact with the substrate, a buried layer surrounding the first light reflection structure, an optical semiconductor structure including an active layer, provided above the first light reflection structure, a second light reflection structure provided above the optical semiconductor structure, and a pair of electrodes which supply current to the optical semiconductor structure. The surface of the first light reflection structure and the surface of the buried layer are included in the same plane.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: October 16, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuya Ohira, Mizunori Ezaki, Hirotaka Uemura, Haruhiko Yoshida, Norio Ilzuka, Hideto Furuyama
  • Patent number: 10020634
    Abstract: A Schottky diode is monolithically integrated into the core of an infrared semiconductor laser (e.g., a quantum cascade laser) to create a heterodyned infrared transceiver. The internal mode field of the infrared semiconductor laser couples to an embedded Schottky diode and can mix the infrared fields to generate a response at the difference frequency.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: July 10, 2018
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Michael Wanke, Christopher Nordquist, Mark Lee
  • Patent number: 10014661
    Abstract: VCSELs and methods having improved characteristics. In some embodiments, these include a semiconductor substrate; a vertical-cavity surface-emitting laser (VCSEL) on the substrate; a first electrical contact formed on the VCSEL; a second electrical contact formed on the substrate, wherein the VCSEL includes: a first resonating cavity having first and second mirrors, at least one of which partially transmits light incident on that mirror, wherein the first second mirrors are electrically conductive. A first layer is between the first mirror and the second mirror and has a first aperture that restricts the path of current flow. A second layer is between the first layer and the second mirror and also restricts the electrical current path. A multiple-quantum-well (MQW) structure is between the first mirror and the second mirror, wherein the first and second apertures act together to define a path geometry of the current through the MQW structure.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: July 3, 2018
    Assignee: Vixar, LLC
    Inventors: Mary K. Brenner, Klein L. Johnson, Matthew M. Dummer
  • Patent number: 9979156
    Abstract: A semiconductor laser device that enables flip-chip assembly by having an embedding section around a mesa section, and that has an improved emission lifetime, as well as a photoelectric converter and an optical information processing unit each having such a semiconductor laser device. The semiconductor laser device includes: a mesa section including an active layer, and having a first electrode on a top surface; an embedding section covering the mesa section, and having a first connection aperture that reaches the first electrode; and a first wiring provided on the embedding section overlaying the first connection aperture, the first wiring being electrically connected to the first electrode through the first connection aperture.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: May 22, 2018
    Assignee: SONY CORPORATION
    Inventor: Hiizu Ootorii
  • Patent number: 9971225
    Abstract: A spot size converter includes: a first semiconductor waveguide structure having a first width enabling single mode propagation; a second semiconductor waveguide structure having a second width greater than the first width, a second semiconductor waveguide structure including an end face for optically coupling with an external waveguide; a third semiconductor waveguide structure having a third width greater than the first and second widths, the third semiconductor waveguide structure being optically coupled to the second semiconductor waveguide structure; and a single tapered waveguide having a first end portion connected to the third semiconductor waveguide structure, and a second end portion connected to the first semiconductor waveguide structure, the single tapered waveguide having a width gradually changing in a direction from the first end portion to the second end portion.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: May 15, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoya Kono
  • Patent number: 9972960
    Abstract: An active optical planar waveguide apparatus includes a planar core layer comprising an active laser ion; one or more cladding layers in optical contact with at least one surface of the planar core layer; a metallic binder layer chemically bonded to an outermost cladding layer of the one or more cladding layers; a metallic adhesion layers disposed on the metallic binder layer; a heatsink for dissipating heat from the planar waveguide; and a metallic thermal interface material (TIM) layer providing a metallurgical bond between the metallic adhesion layer and the heatsink.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: May 15, 2018
    Assignee: RAYTHEON COMPANY
    Inventors: Christopher R. Koontz, David M. Filgas, Kurt S. Ketola, Carl W. Townsend
  • Patent number: 9948064
    Abstract: A method of manufacturing a semiconductor device includes a step of forming a mesa portion including an active layer above a substrate, and an n-type layer above the active layer, a step of forming a current confinement portion on left and right of the mesa portion, the current confinement portion including a p-type current blocking layer, an n-type current blocking layer above the p-type current blocking layer, and an i-type or p-type current blocking layer above the n-type current blocking layer, and a p-type doping step of diffusing p-type impurities into the i-type or p-type current blocking layer, an upper portion of the n-type current blocking layer, and left and right portions of the n-type layer to change the upper portion of the n-type current blocking layer and the left and right portions of the n-type layer to p-type semiconductors.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: April 17, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroaki Tsuchiya, Harunaka Yamaguchi, Eiji Nakai
  • Patent number: 9947349
    Abstract: An apparatus includes a waveguide extending along a light-propagation direction between a light source and a media-facing surface. An assistant layer is configured to receive light from a light source, the assistant layer has a terminating end with a first taper that narrows toward the media-facing surface. A core layer has a coupling end configured to receive light from the assistant layer, the coupling end having a second taper that widens toward the media-facing surface. A middle cladding layer is disposed between the core layer and the assistant layer. A near field transducer is disposed proximate the media-facing surface and configured to receive the light from the core layer.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: April 17, 2018
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventor: Chubing Peng
  • Patent number: 9935418
    Abstract: An active optical planar waveguide apparatus includes a planar core layer comprising an active laser ion; one or more cladding layers in optical contact with at least one surface of the planar core layer; a metallic binder layer chemically bonded to an outermost cladding layer of the one or more cladding layers; a metallic adhesion layers disposed on the metallic binder layer; a heatsink for dissipating heat from the planar waveguide; and a metallic thermal interface material (TIM) layer providing a metallurgical bond between the metallic adhesion layer and the heatsink.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: April 3, 2018
    Assignee: RAYTHEON COMPANY
    Inventors: Christopher R. Koontz, David M. Filgas, Kurt S. Ketola, Carl W. Townsend
  • Patent number: 9935427
    Abstract: A vertical cavity light-emitting element includes: a first-conductivity-type semiconductor layer; an active layer; a second-conductivity-type semiconductor layer that are formed in this order on a first reflector; an insulating current confinement layer formed on the second-conductivity-type semiconductor layer; a through opening formed in the current confinement layer; a transparent electrode covering the through opening and the current confinement layer and being in contact with the second-conductivity-type semiconductor layer via the through opening; and a second reflector formed on the transparent electrode.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: April 3, 2018
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Komei Tazawa, Ji-Hao Liang, Seiichiro Kobayashi
  • Patent number: 9917419
    Abstract: An optoelectronic semiconductor device is disclosed wherein the device is a vertical-cavity surface-emitting laser or a photodiode containing a section, the top part of which is electrically isolated from the rest of the device. The electric isolation can be realized by etching a set of holes and selective oxidation of AlGaAs layer or layers such that the oxide forms a continuous layer or layers everywhere beneath the top surface of this section. Alternatively, a device can be grown epitaxially on a semi-insulating substrate, and a round trench around a section of the device can be etched down to the semi-insulating substrate thus isolating this section electrically from the rest of the device. Then if top contact pads are deposited on top of the electrically isolated section, the pads have a low capacitance, and a pad capacitance below two hundred femto-Farads, and the total capacitance of the device below three hundred femto-Farads can be reached.
    Type: Grant
    Filed: June 26, 2016
    Date of Patent: March 13, 2018
    Assignee: VI Systems GmbH
    Inventors: Joerg-Reinhardt Kropp, Nikolay Ledentsov, Vitaly Shchukin
  • Patent number: 9857639
    Abstract: A method for manufacturing a liquid crystal lens includes: patterning an insulating layer into a plurality of insulating regions spaced apart from each other on a substrate using a first photo mask; depositing a conductive layer on the insulating layer; applying a first, negative photoresist onto the conductive layer; exposing the first photoresist using a second photo mask in which first regions of the first photoresist corresponding to portions between adjacent insulating regions are opened; exposing the first photoresist using a third photo mask in which second regions corresponding to tops of the plurality of insulating regions are opened; and etching the conductive layer using the first photoresist.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: January 2, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jung Hwan Yi, Jin Oh Song, Chun Ki Choi
  • Patent number: 9853188
    Abstract: A light-emitting diode chip includes a semiconductor layer sequence having a phosphide compound semiconductor material. The semiconductor layer sequence contains a p-type semiconductor region, an n-type semiconductor region, and an active layer arranged between the p-type semiconductor region and the n-type semiconductor region. The active region serves to emit electromagnetic radiation. The n-type semiconductor region faces a radiation exit area of the light-emitting diode chip, and the p-type semiconductor region faces a carrier of the light-emitting diode chip. A current spreading layer having a thickness of less than 500 nm is arranged between the carrier and the p-type semiconductor region. The current spreading layer has one or a plurality of p-doped AlxGa1-xAs layers with 0.5<x?1.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: December 26, 2017
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Petrus Sundgren, Elmar Baur, Martin Hohenadler, Clemens Hofmann
  • Patent number: 9843778
    Abstract: Provided is an image display device including: a light source part (200) for emitting coherent light; and a plurality of phase shift elements (301) arranged in two-dimensional directions, the device further including a phase shift part (300) for scanning the wavefront of the coherent light from the light source part (200) in two-dimensional directions, in which light is scanned in the two-dimensional directions by a phased array to thereby allow an observer to observe an image.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: December 12, 2017
    Assignee: OLYMPUS CORPORATION
    Inventors: Yoshiaki Horikawa, Eiji Yamamoto, Kanto Miyazaki
  • Patent number: 9837790
    Abstract: A system and method for providing laser diodes with broad spectrum is described. GaN-based laser diodes with broad or multi-peaked spectral output operating are obtained in various configurations by having a single laser diode device generating multiple-peak spectral outputs, operate in superluminescene mode, or by use of an RF source and/or a feedback signal. In some other embodiments, multi-peak outputs are achieved by having multiple laser devices output different lasers at different wavelengths.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: December 5, 2017
    Assignee: Soraa Laser Diode, Inc.
    Inventors: James W. Raring, Mathew C. Schmidt, Yu-Chia Chang
  • Patent number: 9837785
    Abstract: Systems and apparatuses for a polarization laser sensor are disclosed. The polarization laser sensor can include a pump source, a common section, a reference section and a detection section. The common section is provided with a gain medium, and the detection section is provided with a sensing element configured to cause an optical path difference. The reference section and the detection section are connected to the common section though a first polarization splitting unit and a second polarization splitting unit. The common section is provided with an output unit or each of the reference section and the detection is provided with the output unit, the output unit is connected to a photoelectric detector through a light uniting unit, and a polarization rotation unit is disposed between the light uniting unit and the output unit.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: December 5, 2017
    Assignee: SHENZHEN UNIVERSITY
    Inventors: Qiao Wen, Guowen Liang, Ji Li, Hanben Niu
  • Patent number: 9787053
    Abstract: A laser diode chip includes a removable substrate, a first semiconductor layer disposed on the removable substrate, an emitting layer disposed on one part of the first semiconductor layer, a second semiconductor layer disposed on the emitting layer and forming a ridge mesa, a current conducting layer disposed on another part of the first semiconductor layer, a patterned insulating layer covering the second semiconductor layer and the current conducting layer and including a first zone and a second zone which respectively expose a part of the current conducting layer and a part of the second semiconductor layer, a first electrode and a second electrode respectively disposed on the first zone and the second zone. A projection of the ridge mesa projected to the removable substrate covers a part of projections of the first electrode and the second electrode projected to the removable substrate.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: October 10, 2017
    Assignee: PlayNitride Inc.
    Inventors: Chih-Ling Wu, Yu-Yun Lo
  • Patent number: 9760618
    Abstract: Methods, systems, and computer program products for distributed iceberg cubing over ordered dimensions are provided herein. A method includes calculating, from input data derived from a search query, a set of multiple cube measures for one or more combinations of multiple non-ordered dimensions; pruning the set of multiple cube measures based on one or more iceberg conditions to generate a sub-set of the cube measures; and determining a range for a set of ordered dimensions over a distributed processing platform based on (i) the sub-set of the cube measures and (ii) the one or more iceberg conditions.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Prasad M. Deshpande, Rajeev Gupta, Ashu Gupta
  • Patent number: 9735120
    Abstract: In embodiments, a package assembly may include a die coupled with one or more conductive pads. A barrier layer may be directly coupled with and between the die and one or more of the conductive pads. The package assembly may further include a solder resist layer coupled with the die and the conductive pads, and one or more interconnects positioned at least partially within the solder resist layer and directly coupled with one or more of the conductive pads.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: August 15, 2017
    Assignee: INTEL CORPORATION
    Inventors: Qinglei Zhang, Sri Ranga Sai Boyapati
  • Patent number: 9722394
    Abstract: A semiconductor laser diode is provided. A semiconductor layer sequence has semiconductor layers applied vertically one above the other. An active layer includes an active region having a width of greater than or equal to 30 ?m emitting laser radiation during operation via a radiation coupling-out surface. The radiation coupling-out surface is formed by a lateral surface of the semiconductor layer sequence and forms, with an opposite rear surface, a resonator having lateral gain-guiding in a longitudinal direction. The semiconductor layer sequence is heated in a thermal region of influence by reason of the operation. A metallization layer is in direct contact with a top side of the semiconductor layer sequence.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: August 1, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Christian Lauer, Harald König, Uwe Strauβ, Alexander Bachmann
  • Patent number: 9722393
    Abstract: A flip chip type laser diode includes a first substrate, a first semiconductor layer disposed on the first substrate, an emitting layer disposed on one part of the first semiconductor layer, a second semiconductor layer disposed on the emitting layer and forming a ridge mesa, a current conducting layer disposed on another part of the first semiconductor layer, a patterned insulating layer covering the second semiconductor layer and the current conducting layer and including a first zone and a second zone which respectively expose a part of the current conducting layer and a part of the second semiconductor layer, a first electrode and a second electrode respectively disposed on the first zone and the second zone. A projection of the ridge mesa projected to the first substrate covers a part of projections of the first electrode and the second electrode projected to the first substrate.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: August 1, 2017
    Assignee: PlayNitride Inc.
    Inventors: Chih-Ling Wu, Yu-Yun Lo
  • Patent number: 9705286
    Abstract: With a method for manufacturing a semiconductor device, a semiconductor layer having a protrusion on a main face is formed. The protrusion includes an upper face and side faces. A conductive layer on a region that includes at least the upper face and the side faces of the protrusion is formed. A first mask that partially covers a surface of the conductive layer is formed. A part of the conductive layer is etched by using the first mask in a first etching process. A second mask that at least partially covers the surface of the conductive layer that has undergone the first etching process is formed. A part of the conductive layer is etched by using the second mask to expose a part of the semiconductor layer and to form the conductive layer into an electrode in a second etching process.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: July 11, 2017
    Assignee: NICHIA CORPORATION
    Inventor: Susumu Harada
  • Patent number: 9685764
    Abstract: A semiconductor optical element has a semiconductor substrate, a diffraction grating, a diffraction grating embedding layer, an active layer and a cladding layer. The diffraction grating includes a plurality of grating elements arranged on the semiconductor substrate along a direction (Z direction) in which laser light is emitted. Each grating element has a lower portion and an upper portion provided on the lower portion. The lower portions of the grating elements are connected to each other to form one layer in a lower section of the diffraction grating. The upper portion has a first refractive index and the lower portion has a second refractive index. A refractive index of the diffraction grating embedding layer is an intermediate value between the first and the second refractive index.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: June 20, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ayumi Fuchida, Naoki Nakamura
  • Patent number: 9634465
    Abstract: An optical device includes an active layer disposed over a semiconductor substrate, a diffraction grating disposed over the active layer, a clad layer partly disposed over the diffraction grating, at least one first burying material layer disposed beside side surfaces of end portions of the clad layer over the diffraction grating, and at least one second burying material layer disposed beside side surfaces of a center portion of the clad layer over the diffraction grating. A refractive index of the at least one first burying material layer is different from a refractive index of the at least are second burying material layer.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: April 25, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Manabu Matsuda
  • Patent number: 9618823
    Abstract: Disclosed herein is a photomixer and method of manufacturing the photomixer which can fundamentally solve the existing restrictive factors of a PCA and a photomixer which are core parts of a conventional broadband terahertz spectroscopy system. The presented photomixer includes an active layer formed on a top surface of a substrate, the active layer being formed on an area on which light is incident, and a thermal conductive layer formed on the top surface of the substrate, the thermal conductive layer being formed on an area other than the area on which light is incident. The active layer is formed to have a mesa cross section, and the thermal conductive layer is regrown on an area other than the area on which light is incident using an MOCVD method, and has a flattened surface.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: April 11, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kyung-Hyun Park, Nam-Je Kim, Hyun-Sung Ko, Dong-Hun Lee, Sang-Pil Han, Han-Cheol Ryu, Jeong-Woo Park, Ki-Won Moon, Dae-Yong Kim
  • Patent number: 9601557
    Abstract: A flexible display having an array of pixels or sub-pixels is provided. The display includes a flexible substrate and an array of thin film transistors (TFTs) corresponding to the array of pixels or sub-pixels on the substrate. The display also includes a first plurality of metal lines coupled to gate electrodes of the TFTs and a second plurality of metal lines coupled to source electrodes and drain electrodes of the TFTs. At least one of the first plurality of metal lines and the second plurality of metal lines comprises a non-stretchable portion in the TFT areas and a stretchable portion outside the TFT areas.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 21, 2017
    Assignee: Apple Inc.
    Inventors: Byung Duk Yang, John Z. Zhong, Shih Chang Chang, Vasudha Gupta, Young Bae Park
  • Patent number: 9590389
    Abstract: A semiconductor laser element includes: a semiconductor stack with a ridge, the semiconductor stack having an emission surface and a reflection surface; a first electrode layer extending in the lengthwise direction and disposed on the ridge in contact with the semiconductor stack; a current injection prevention layer covering at least a part of an upper surface from side surfaces of the first electrode layer, and being in contact with the first electrode layer at 18 to 80% of a contact surface area between the first electrode layer and the semiconductor stack; and a second electrode layer disposed on the current injection prevention layer, and being in contact with a part of the first electrode layer, edges of the second electrode layer being disposed closer to the emission surface and the reflection surface than edges of the first electrode layer, respectively.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: March 7, 2017
    Assignee: NICHIA CORPORATION
    Inventor: Tsuyoshi Hirao
  • Patent number: 9577404
    Abstract: A semiconductor laser device that enables flip-chip assembly by having an embedding section around a mesa section, and that has an improved emission lifetime, as well as a photoelectric converter and an optical information processing unit each having such a semiconductor laser device. The semiconductor laser device includes: a mesa section including an active layer, and having a first electrode on a top surface; an embedding section covering the mesa section, and having a first connection aperture that reaches the first electrode; and a first wiring provided on the embedding section overlaying the first connection aperture, the first wiring being electrically connected to the first electrode through the first connection aperture.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: February 21, 2017
    Assignee: SONY CORPORATION
    Inventor: Hiizu Ootorii
  • Patent number: 9496686
    Abstract: Disclosed is a surface-emitting laser element including a semiconductor substrate and plural surface-emitting lasers configured to emit light mutually different wavelengths, each surface-emitting laser including a lower Bragg reflector provided on the semiconductor substrate, a resonator provided on the lower Bragg reflector, an upper Bragg reflector provided on the resonator, and a wavelength adjustment layer provided in the upper Bragg reflector or lower Bragg reflector, the wavelength adjustment layers included in the surface-emitting lasers having mutually different thicknesses, at least one of the wavelength adjustment layers including adjustment layers made of two kinds of materials, and numbers of the adjustment layers included in the wavelength adjustment layers being mutually different.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: November 15, 2016
    Assignee: RICOH COMPANY, LTD.
    Inventors: Ryoichiro Suzuki, Shunichi Sato
  • Patent number: 9478944
    Abstract: A semiconductor laser element includes: a window region including a disordered portion formed by diffusion of a group-III vacancy, the diffusion promoted by providing on the window region a promoting film that absorbs a predetermined atom; a non-window region including an active layer of a quantum well structure; and a difference equal to or larger than 50 meV between an energy band gap in the window region and an energy band gap in the non-window region.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: October 25, 2016
    Assignee: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Hidehiro Taniguchi, Hirotatsu Ishii, Takeshi Namegaya
  • Patent number: 9461441
    Abstract: A photonic integrated circuit includes a first insulating region encapsulating at least one metallization level, a second insulating region at least partially encapsulating a gain medium of a laser source, and a stacked structure placed between the two insulating regions. The stacked structure includes a first polycrystalline or single-crystal silicon layer, a second polycrystalline or single-crystal silicon layer, an intermediate layer optically compatible with the wavelength of the laser source and selectively etchable relative to silicon and that separates the first layer from a first portion of the second layer, and the gain medium facing at least one portion of the first layer. The first layer, the intermediate layer, and the first portion of the second layer form an assembly containing a resonant cavity and a waveguide, which are optically coupled to the gain medium, and a second portion of the second layer containing at least one other photonic component.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: October 4, 2016
    Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2 ) SAS
    Inventors: Alain Chantre, Charles Baudot, Sébastien Cremer
  • Patent number: 9425362
    Abstract: A light-emitting device is disclosed, comprising a substrate; a light-emitting structure on the substrate comprising a first region and a second region; a barrier layer on the first region having a bottom surface and a sidewall, wherein an angle between the sidewall and the bottom surface is between 10°70°; and a transparent conductive layer formed on the light-emitting structure and the barrier layer; wherein a difference between a thickness of the transparent conductive layer at the sidewall on the barrier layer and a thickness of the transparent conductive layer on the second region of the light-emitting structure forms a ratio not larger than 10 %.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: August 23, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Jar-Yu Wu, Ching-Jang Su, Chun-Lung Tseng, Ching-Hsing Shen
  • Patent number: 9407068
    Abstract: A broadband, integrated quantum cascade laser is disclosed, comprising ridge waveguide quantum cascade lasers formed by applying standard semiconductor process techniques to a monolithic structure of alternating layers of claddings and active region layers. The resulting ridge waveguide quantum cascade lasers may be individually controlled by independent voltage potentials, resulting in control of the overall spectrum of the integrated quantum cascade laser source. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: August 2, 2016
    Assignee: California Institute of Technology
    Inventors: Kamjou Mansour, Alexander Soibel