Abstract: Photoresist mask width dimensions are measured by detecting a reflected light during etching or depositing material on the sidewalls of the photoresist mask in a plasma chamber having an etchant mixture. Embodiments include determining the time to stop the etching of the photoresist mask by detecting a corresponding change in the intensity of the reflected light.

Abstract: A method for fabricating a high temperature superconducting step-edge Josephson junction includes the steps of: (i) preparing a step-edge on an SrTiO3 (STO) substrate; (ii) depositing a YBa2Cu3O7−x (YBCO) thin film on the step-edge substrate obtained; and (iii) forming a micro-bridge pattern on the, deposited metal thin film by photolithography and ion milling and then performing a heat treatment. This makes it possible to fabricate a step edge having a linear portion inclined at a large angle with good reproducibility during the ion-milling step. Furthermore, the two-stepped process of post heat treatment is carried out after the metal electrode of the junction is formed so that the high temperature superconducting step-edge junction can have its own characteristics enhanced.

Abstract: A method of double-exposure photolithography of a semiconductor wafer in the manufacture of integrated circuits is disclosed. The two exposures of the same positive photoresist layer are carried out using a binary photomask (25) having chrome regions (22) that define non-critical dimension features (6c) and also serve as protection for phase shift exposure of critical dimension features (6g). The phase shift photomask (23) includes apertures 200, 20&pgr;, that expose the sides of the critical dimension feature (6g) with opposite phase light. The phase shift photomask (23) also includes an additional aperture (30) for double exposure of a region exposed by the binary photomask, for example as between a non-critical dimension feature (6c) and the end of a critical dimension feature (6g).

Abstract: A low dielectric constant nanotube, which can be used in the damascene process, and the fabrication method for a non-selective and a selective nanotube thin film layer are described. The non-selective deposition of the nanotube thin film layer includes forming a catalytic layer on the substrate followed by chemical vapor depositing a nanotube thin film layer on the catalytic layer. The selective deposition of the nanotube thin film layer includes forming a catalytic layer on the substrate followed by patterning the catalytic layer. A patterned photoresist layer can also form on the substrate, followed by forming multiple of catalytic layers on the photoresist layer and on the exposed substrate respectively. The photoresist layer and the overlying catalytic layer are removed. Thereafter, a nanotube layer is formed on the patterned catalytic layer by chemical vapor deposition.

Abstract: The invention is a process for building-up printed wiring boards using metal foil coated with toughened benzocyclobutene-based dielectric polymers. The invention is also a toughened dielectric polymer comprising benzocyclobutene-based monomers or oligomers, ethylenically unsaturated polymer additive, and, optionally, a photoactive compound.

Abstract: A method for patterning an aluminum-containing layer. A tungsten-containing layer is provided over an aluminum-containing layer. The tungsten-containing layer is patterned to form an opening therein, so that the opening exposes an underlying portion of the aluminum-containing layer. The patterned tungsten-containing layer is exposed to an etch having a substantially higher etch rate of the aluminum-containing layer than of the tungsten-containing layer to remove the exposed portion of the aluminum-containing layer.

Abstract: Compositions comprising a polymer having silicon, germanium and/or tin; and a protecting group grafted onto a polymeric backbone are useful as resists and are sensitive to imaging irradiation while exhibiting enhanced resistance to reactive ion etching.

Abstract: An interdigital electrode of a SAW device is protected by a protective layer during a photo-lithography etching process which is used to apply a bonding pad. As the bonding pad can be formed by the photo-lithography etching process, it is possible to obtain regularly shaped bonding pads without damaging the characteristics of the SAW device.

Abstract: In a method of etching a substrate (1) having a surface layer (3) of conductive material, a circuit pattern is transferred to the surface layer (3) in a central surface area portion (4) of the substrate (1) by electrochemical etching. To prevent excessive current densities from forming at the periphery of the central surface area portion (4) during the etching step, a frame (9) adapted to attract electrical field is provided adjacent to the central surface area portion (4). The frame (9) can be part of a separate frame element which is placed on the substrate (1) before the etching step, or be incorporated in a resist coating on the substrate (1). The frame (9) can be transferred to the resist coating by any suitable means, for example by photolithographic exposure through a mask with a suitable frame pattern. Alternatively, the frame (9) can be incorporated in a prefabricated substrate element, to which the circuit pattern is transferred in the etching step.

Abstract: Forming a protective layer such as chromium, chrome alloys, nickel or cobalt as a cap over an aluminum film protects an underlying ITO layer from corrosion during the fabrication of flat panel displays such as field emission devices and the like. The presence of the protective layer during fabrication processes such as photolithography prevents diffusion of solutions through the aluminum into the ITO. This protective layer is especially effective during the development and resist stripping stages of photolithography which use solutions or solvents that would otherwise cause reductive corrosion of ITO in contact with aluminum. The methods and apparatus described herein are particularly advantageous for the fabrication of flat panel displays such as field emission devices and other display devices, because ITO is often used in such devices in contact with aluminum while exposed to corrosion-inducing media.

Abstract: It is an object to provide a manufacturing process for a printed wiring board in which a copper foil and resin as a substrate material of a copper clad laminate are irradiated with carbon dioxide gas laser light to drill in both of them simultaneously. In forming a through hole or a hole such as IVH, BVH or the like in the copper clad laminate using carbon dioxide gas laser light, one of a nickel layer of 0.08 to 2 &mgr;m in thickness, a cobalt layer of 0.05 to 3 &mgr;m in thickness and a zinc layer of 0.03 to 2 &mgr;m in thickness is formed as an additional metal layer on a surface of the copper foil residing in an external layer of the copper clad laminate and thereafter, by performing laser drilling, the copper foil layer and the resin layer as a substrate material of the copper clad laminate are enabled to drill simultaneously.

Abstract: A method for manufacturing an LCD including at least two stacked thin layers in which the upper thin film smoothly and completely covers the lower thin film includes the steps of coating a photo-resist on a patterned layer, patterning the photo-resist by exposing and developing the photo-resist with a mask which has lines and spaces in which a distance between the lines is smaller than a resolution of an exposure system used and etching the metal layer using the patterned photo-resist as a mask. The resulting photo-resist pattern has a comb shape.

Abstract: A fabrication method for reducing the critical dimension of the conductive line and the space is described in which a conductive layer and a mask layer are sequentially formed on a substrate. A taper etching is conducted to form a plurality of first openings with the cross-sections of the openings being tapered off from top to bottom and exposing the surface of the conductive layer. A planarized sacrificial layer at a similar height as the mask layer is formed covering the exposed surface of the conductive layer. A second taper etching is further conducted on the exposed mask layer to form a plurality of second openings with the cross-sections of the openings being tapered off from top to bottom. The sacrificial layer is then removed. Thereafter, an anisotropic etching is conducted on the exposed conductive layer, using the mask layer as a hard mask, to form a plurality of conductive lines followed by a removal of the mask layer.

Abstract: A method for manufacturing a liquid crystal display, includes the steps of forming a first metal layer on a transparent substrate, forming a first photo-resist pattern on the first metal layer by using a first mask with a predetermined pattern, forming a gate electrode by etching the first metal layer using the first photo-resist pattern, forming a second metal layer over the gate electrode, forming a second photo-resist pattern on the second metal layer by using a second mask having a line-and-space pattern whose space width is smaller than a resolution of an-exposure system, forming source and drain electrodes by etching the second metal layer using the second photo-resist pattern, and forming a transparent conductive material layer for electrically connecting the drain electrode with a pixel electrode.

Abstract: In one embodiment, the present invention relates to a method of forming a circuit structure containing at least one sub-lithographic gate conductor involving the steps of providing a substrate comprising active regions and a preliminary gate conductor film over portions of the substrate and portions of the active regions; forming a sidewall template mask having at least one sidewall over a portion of the preliminary gate conductor film that is positioned over portions of the active regions; forming a sidewall film over the sidewall template mask, the sidewall film having a vertical portion adjacent the sidewall of the sidewall template mask and a horizontal portion in areas not adjacent the sidewall of the sidewall template mask; removing the horizontal portion of the sidewall film exposing a portion of the sidewall template mask and removing the sidewall template mask; providing a second mask over the portions of the preliminary gate conductor film that are not positioned over portions of the active regions;

Abstract: A method of producing a micro structure on a substrate which has a support portion and a plate-like portion supported thereby at a distance from the substrate, comprising the steps of forming a spacer layer consisting of an insulating material on a substrate having an electrically conductive layer formed on its surface, forming a latent image layer consisting of an electrically conductive material on the spacer layer at a site where the plate-like portion of an intended structure is to be formed, producing an aperture, where a part of the electrically conductive layer is exposed, on the spacer layer at a site where the supporting portion of an intended structure is to be formed, forming a structure layer consisting of plating film inside of the aperture and on the latent image layer by electroplating the electrically conductive layer as a cathode, and removing the spacer layer.

Abstract: The present invention discloses a polymeric circuit protection device and a method of making the same, wherein a highly conductive composite material and a conductive composite material of positive temperature coefficient thermal sensitive resistance are alternately stacked to form a plaque-shaped composite material, then two metal foils are laminated on top surface and bottom surface of the plaque-shaped composite material as electrodes to thereby form a sandwich-like laminated material. Moreover, a cross-linking process is made to cross-link the resin inside the composite material layer. Electrode trenches are etched, and an insulating layer is formed by using green paint in the electrode trenches to isolate different electrodes on the same surface of the device.

Abstract: Forming a protective layer such as chromium, chrome alloys, nickel or cobalt as a cap over an aluminum film protects an underlying ITO layer from corrosion during the fabrication of flat panel displays such as field emission devices and the like. The presence of the protective layer during fabrication processes such as photolithography prevents diffusion of solutions through the aluminum into the ITO. This protective layer is especially effective during the development and resist stripping stages of photolithography which use solutions or solvents that would otherwise cause reductive corrosion of ITO in contact with aluminum. The methods and apparatus described herein are particularly advantageous for the fabrication of flat panel displays such as field emission devices and other display devices, because ITO is often used in such devices in contact with aluminum while exposed to corrosion-inducing media.

Abstract: A method is provided to prevent the forming of a high de-focusing ledge or step on the back side of a substrate or a semiconductor wafer in order to improve the photolithographic process steps in semiconductor manufacturing. In semiconductor manufacturing, various processes are performed to form various dielectric and metal layers on the front side of wafers. However, some of these materials deposit on the back side of the wafer as well. These unwanted deposits result in contaminants that break off from the back side, causing reliability problems. Those that do stay on, on the other hand, cause irregular topology, thus affecting the focusing of stepper equipment during photolithographic processes. It is disclosed in the present invention a method of forming an oxide layer which prevents the forming of such de-focusing steps on the back side of a wafer.

Abstract: A method for manufacturing a circuit board having a conductive via comprises the steps of providing a substrate having a first surface and a first conductive layer on at least one region of the first surface, forming an insulating layer on the first conductive layer, forming an opening in the insulating layer, so that the opening extending to the first conductive layer, forming a second conductive layer inside the opening and at least on the insulating layer near the opening, applying a positive photoresist on the second conductive layer, exposing the positive photoresist, developing the exposed positive photoresist, and removing the positive photoresist on the second conductive layer, except a portion of the second conductive layer that is inside the opening, etching the second conductive layer, to expose a surface of the second conductive layer, removing the positive photoresist from inside the opening, and forming a third conductive layer inside the opening.

Abstract: A resist stripping composition contains 0.001 to 0.5% by weight of a fluorine compound, 50 to 99% by weight of an ether solvent and the balance being substantially water. With such a specific content range of the ether solvent, the resist stripping composition shows reduced corrosive properties when diluted with water in the rinsing step as well as shows complete removal of resist residues without causing corrosion of wiring materials and substrate materials.

Abstract: A bond pad structure that is equipped with a heat dissipating ring surrounding the pad and a method for forming the structure are disclosed. The bond pad structure includes a bond pad that is substantially surrounded and insulated by a layer of inter-metal-dielectric (IMD) material and is formed of two metal layers and a plurality of metal via plugs connected thereinbetween, and a heat dissipating ring surrounding and spaced-apart from the bond pad formed of an upper conductive ring and a lower conductive ring of substantially the same configuration connected thereinbetween by a plurality of dummy via plugs formed of a thermally conductive material. A method for forming the bond pad structure that is equipped with the heat dissipating ring is further disclosed in which three separate IMD layers are provided for forming photolithographically the bond pad structure and the heat dissipating ring simultaneously.

Abstract: A method of preparing an x-ray mask comprising providing a substrate, and applying sequentially to a surface of the substrate i) an etch stop layer resistant to etchant for an x-ray absorber, and ii) an x-ray absorber layer. The method then includes removing a portion of the substrate below the layers to create an active region of the substrate above the removed portion of the substrate and an inactive region over remaining portions of the substrate, applying a resist layer above the absorber layer, and exposing a portion of the resist layer using electron beam irradiation and developing the resist layer to form a latent mask image over the active region of the substrate.

Abstract: A method for fabricating a microelectronic layer. There is first provided a substrate. There is then formed over the substrate a target layer. There is then formed upon the target layer a patterned photoresist layer which defines a first aperture, where the first aperture has a first aperture width which exposes a first portion of the target layer. There is then reflowed thermally the patterned photoresist layer to form a reflowed patterned photoresist layer which defines a substantially straight sided second aperture. The second aperture has a second aperture width less than the first aperture width, and the second aperture thus exposes a second portion of the blanket target layer of areal dimension less than the first portion of the blanket target layer. Finally, there is then fabricated the target layer to form a fabricated target layer while employing the reflowed patterned photoresist layer as a mask layer.

Abstract: A method for forming an electrode. The method includes forming a conductive plug through a first dielectric layer. The plug extends from an upper surface of the first dielectric layer to a contact region in a semiconductor substrate. The electrode is formed photolithographically, misalignment of a mask registration in the photolithography resulting in exposing surface portions of the barrier contact. A second dielectric layer is deposited over the first dielectric layer, over side portions and top portions of the formed electrode, and over the exposed portions of barrier contact. A sacrificial material is provided on portions of the second dielectric layer disposed on lower sides of the, electrode, on portions of the second dielectric layer disposed on the first dielectric layer, and on said exposed portions of the barrier contact while exposing portions of the second dielectric layer on the top portions and upper side portions of the formed electrode.

Abstract: A method of photolithography. An anti-reflective coating is formed on the conductive layer. An nitrogen plasma treatment is performed. A photo-resist layer is formed and patterned on the anti-reflective coating. The conductive layer is defined. The photo-resist layer is removed. The anti-reflective layer is removed by using phosphoric acid.

Abstract: Electrodes in a plasma display panel are manufactured by (A) forming a pattern for electrodes on a substrate to be wider than a desired pattern, (B) coating photoresist on the electrode pattern, (C) disposing a photomask having the desired pattern on the photoresist and exposing the photoresist, and (D) forming electrodes having the desired pattern by developing and baking the exposed electrode pattern by using the photomask. Thus, the cost for a material for electrodes can be reduced, and short circuiting between the electrodes and the edge curl phenomenon can be prevented.

Abstract: A thin-film two-terminal element including first metal film functioning as a wiring layer and a first electrode, a first insulating film formed on the first electrode of the first metal film and having a non-linear resistance property, a second metal film formed on the first insulating film and functioning as a second electrode, and a third metal film formed in a wire layer portion of the first metal film and having a smaller stress and a smaller electrical resistance than the first metal film, and a thin-film two-terminal element including, on a resinous substrate as an insulative substrate, a first metal film functioning as a wiring layer and a first electrode, a first insulating film formed on the first electrode of the first metal film and having a non-linear resistance property, a second metal film formed on the first insulating film and functioning as a second electrode, and a second insulating film formed under the second metal film except on a portion thereof which electrically functions with the firs

Abstract: A flexible circuit board comprises a polyimide insulating layer 5 with land access holes 3 and a conductor circuit layer 4 provided thereon, and is produced by coating one surface of a conductor circuit metal foil 1 side with a polyimide precursor varnish, which is dried to give a polyimide precursor layer 2, where the polyimide precursor layer 2 is provided with land access holes 3 by a photolithography process; the conductor circuit metal foil 1 is patterned by the subtractive process to form conductor circuit layer 4; and the polyimide precursor layer 4 is then imidated to form polyimide insulating layer 5.

Abstract: Resist residues, which is formed in a process of forming Al interconnections, are removed through use of a single chemical. A chemical which contains an organic acid or a salt thereof and water and which has a pH below 8 is used as a treatment for removing resist or resist residues. The chemical may be used in a process in which Al, W, Ti, TiN, and SiO2 are exposed on the surface of a wafer after etching of an Al interconnection; in a process in which Al, W, Ti, TiN, and SiO2 are exposed on the surface of a wafer after etching a hole reaching an Al interconnection in an dielectric layer; in a process in which Cu is exposed on the surface of a semiconductor wafer after dry-etching of a Cu interconnection or etching of an interlayer dielectric film laid on a Cu interconnection; and in a process in which metal material such as W, WN, Ti, or TiN; poly-Si; SiN; and SiO2 are exposed on the surface of a wafer after etching of a metal gate.

Abstract: A method for fabricating ferroelectric memory cells includes forming a first interlayer insulating film having a first opening on an underlayer, and forming a preparatory first electrode layer over the entire surface thereof. The preparatory first electrode layer is partially removed in a CMP process and a first electrode is formed by the remaining portion. Next, a second interlayer insulating film having a second opening that exposes the first electrode is formed. Portions of a preparatory ferroelectric film on the exposed surface of the first electrode and the upper surface of the second interlayer insulating film are formed mutually stepped. The portion of the preparatory ferroelectric film on the second interlayer insulating film is removed by a CMP process and the portion on the exposed surface is left remaining to form a ferroelectric film. A second electrode is formed on the ferroelectric film by CMP processing or photolithography.

Abstract: A method for producing a pinhole-free dielectric film comprising applying a photopolymer to a first dielectric surface of a dielectric film having pinholes, exposing a second and opposing surface to an amount of radiation effective to polymerize the photopolymer exposed by the pinholes, and removing unpolymerized photopolymer.

Abstract: A method for protecting stepper alignment marks suitable for a substrate with an alignment mark on a scribe line and a metal layer that will be etched includes the following steps. First, a photoresist layer is formed over the metal layer. Next, a photo mask which has a predefined photo mask pattern for transfer to the metal layer is provided, and a pattern protecting the alignment marks is added to the photo mask pattern. Then, a photolithographic process is performed with the photo mask pattern on the photoresist layer to form the desired transferring photoresist mask to the metal layer and the protective photoresist mask for protecting the alignment marks.

Abstract: A method of producing a micro structure on a substrate which has a support portion and a plate-like portion supported thereby at a distance from the substrate, comprising the steps of forming a spacer layer consisting of an insulating material on a substrate having an electrically conductive layer formed on its surface, forming a latent image layer consisting of an electrically conductive material on the spacer layer at a site where the plate-like portion of an intended structure is to be formed, producing an aperture, where a part of the electrically conductive layer is exposed, on the spacer layer at a site where the supporting portion of an intended structure is to be formed, forming a structure layer consisting of plating film inside of the aperture and on the latent image layer by electroplating the electrically conductive layer as a cathode, and removing the spacer layer.

Abstract: A process for forming an inorganic material layer pattern on a substrate. The process includes the steps of transferring an inorganic powder dispersed paste layer supported on a support film to the surface of the substrate to form the inorganic powder dispersed paste layer on the substrate; forming a resist film on the inorganic powder dispersed paste layer transferred to the surface of the substrate; exposing the resist film to light through a mask to form a latent image of a resist pattern; developing the exposed resist film to form the resist pattern; etching exposed portions of the inorganic powder dispersed paste layer to form an inorganic powder dispersed paste layer pattern corresponding to the resist pattern; and baking the pattern to form an inorganic material layer pattern.

Abstract: Disclosed is a method for manufacturing a thin film transistor LCD device, in which a counter and a gate bus line are made in a single photolithography process, and a channel of a thin film transistor, a source electrode, a drain electrode, ohmic contacts for the source and drain electrodes are made in a single photolithography process.

Abstract: A first embodiment of the present invention pertains to a method of patterning a semiconductor device conductive feature while permitting easy removal of any residual masking layer which remains after completion of the etching process. A multi-layered masking structure is used which includes a layer of high-temperature organic-based masking material overlaid by either a patterned layer of inorganic masking material or by a layer of patterned high-temperature imageable organic masking material. The inorganic masking material is used to transfer a pattern to the high-temperature organic-based masking material and is then removed. The high-temperature organic-based masking material is used to transfer the pattern and then may be removed if desired. This method is also useful in the pattern etching of aluminum, even though aluminum can be etched at lower temperatures.

Abstract: A process for manufacturing an active element array substrate, such as for a display panel in a liquid crystal display device. The process comprises exposing photosensitive resin to an irradiation light from the rear face of the substrate and to another irradiation light applied from the front face of the substrate. The irradiation light from the front face of the substrate exposes a region encompassing substantially all of the pixel electrode extending from over a portion of the drain electrode to near the source and gate electrodes. This enables selective exposure of the photosensitive resin to the light from the front face even if scratches or dust exist on the rear face of the substrate during exposure to the light from the rear face, thus increasing the manufacturing yield of such active element array substrates.

Abstract: Multicurved copper films having fine-line elements suitable for radome applications can be improved by cutting the elements with reproducible precision to close tolerance (typically line widths of 3-10±0.25 mil) using an etchant comprising a concentrated saline solution of CuCl2.

Abstract: A method for manufacturing an LCD including at least two stacked thin layers in which the upper thin film smoothly and completely covers the lower thin film includes the steps of coating a photo-resist on a patterned layer, patterning the photo-resist by exposing and developing the photo-resist with a mask which has lines and spaces in which a distance between the lines is smaller than a resolution of an exposure system used and etching the metal layer using the patterned photo-resist as a mask.

Abstract: In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, an oxide layer over the metal layer, and a silicon oxynitride layer over the oxide layer; depositing an ultra-thin photoresist over the silicon oxynitride layer, the ultra-thin photoresist having a thickness less than about 2,000 Å; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the silicon oxynitride layer; etching the exposed portion of the silicon oxynitride layer exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.

Abstract: A method for forming contacts on an integrated circuit that are self-aligned with the wiring patterns of the integrated circuit. In the method a thicker lower layer of a first material and a thinner upper layer of a second material are formed on a substrate. The features of the metal wiring is patterned first on the upper layer. The wiring pattern trenches are etched through the thinner surface layer, and partially through the second, thicker layer. After the wiring pattern is etched, the contacts for the wiring layer are printed as line/space patterns which intersect the wiring pattern. The contact pattern is etched into the lower, thicker layer with an etch process that is selective to the upper thinner layer. The contact is only formed at the intersection point of the wiring image with the contact image, therefore the contact is self-aligned to the metal.

Abstract: A maskless exposure system for selectively exposing a photosensitive work surface, such as a photoresist layer, includes a semiconductor substrate having an elongated aperture. A series of shutters and associated guides are formed upon the substrate using conventional wafer processing methods. The shutters move between a first position covering the aperture and a second position exposing the aperture. A corresponding series of computer-controlled actuators, in the form of electromagnetic coils, cooperate with the shutters for selectively sliding each shutter between its first and second positions. A light beam is directed toward the aperture, and the shutters create a patterned light beam exiting the aperture. A computer-controlled stepper is synchronized with the shutter actuators and adjusts the relationship between the patterned light beam and the photosensitive work surface to direct the patterned light beam at different portions of the work material.

Abstract: A method for forming a metal wiring pattern of a semiconductor device. A metal film is first deposited on a semiconductor substrate, then a photoresist pattern is formed on the metal film. The metal film is etched using the photoresist pattern as a mask, then a portion of the photoresist pattern is removed through an under-ashing process. Thereby, the photoresist pattern does not harden and is readily removable. Next, polymer impurity layer formed during the etching act is removed through a chemical wet cleaning process.

Abstract: In one embodiment, the present invention relates to a method of forming a conductive structure having a width of about 100 nm or less, involving the steps of providing a substrate having a conductive film; patterning a sidewall template over a first portion of the conductive film wherein a second portion of the conductive film is exposed, the sidewall template having at least one sidewall over the conductive film; depositing a sidewall film over the conductive film and the sidewall template, the sidewall film having a vertical portion adjacent the sidewall of the sidewall template and a horizontal portion in areas not adjacent the sidewall of the sidewall template; removing the horizontal portion of the sidewall film exposing a third portion of the conductive film; removing the sidewall template exposing a fourth portion of the conductive film; and etching the third portion and the fourth portion of the conductive film thereby providing the conductive structure having a width of about 100 nm or less underlyin

Abstract: A method of forming an interconnection, including a spring contact element, by lithographic techniques. In one embodiment, the method includes applying a masking material over a first portion of a substrate, the masking material having an opening which will define a first portion of a spring structure, depositing a structure material (e.g., conductive material) in the opening, and overfilling the opening with the structure material, removing a portion of the structure material, and removing a first portion of the masking material. In this embodiment, at least a portion of the first portion of the spring structure is freed of masking material. In one aspect of the invention, the method includes planarizing the masking material layer and structure material to remove a portion of the structure material. In another aspect, the spring structure formed includes one of a post portion, a beam portion, and a tip structure portion.

Abstract: The present invention relates to a micro-injecting device and a method of manufacturing the same. According to the present invention, a liquid chamber barrier layer and a first organic film layer are formed of solution including a soft polyamide acid. The soft polyamide acid solution is dried and heat treated under an appropriate condition to harden. When the soft polyamide acid solution is further treated at 280 to 300° C. and pressure of 0.5 to 2 kg/Cm2, the soft polyamide acid solution acts as an adhesive. Accordingly, the liquid chamber barrier layer and the first organic film layer of the membrane which are based on and made of the soft polyamide acid solution, can be tightly combined with other construction without the combination progressive layer.

Abstract: Electroluminescent display screen having a transparent substrate (1), a surface (2) of which is provided with a first, transparent electrode layer (3) on which a metal top layer (12) is formed. The metal top layer is provided with a layer of insulating material (4). Windows (5) in accordance with a pattern (8, 9, 10) to be displayed are formed in the layer of insulating material as well as in the metal top layer. An organic electroluminescent layer (6) is deposited on said layer of insulating material and in said windows. This layer is provided with a second electrode layer (7). Said pattern (8, 9, 10) can be displayed without differences in brightness.

Abstract: A method of forming a pattern which comprises the steps of, forming an organosilicon film on a work film, the organosilicon film comprising an organosilicon compound having a silicon-silicon bond in a backbone chain thereof and a glass transition temperature of 0° C. or more, forming a resist pattern on the organosilicon film, and transcribing the resist pattern on the organosilicon film through an etching of the organosilicon film by making use of an etching gas containing at least one kind of atom selected from the group consisting of chlorine, bromine and iodine. The organosilicon pattern obtained by the etching is employed as a mask for patterning the work film.

Abstract: A method for forming solder balls that have larger spacings between them and electronic devices containing such solder balls are disclosed. In the method, an additional layer of a leachable metal such as gold or silver is used between an under bump metallurgy layer and a solder bump subsequently formed. This allows the formation of the under bump metallurgy layer prior to the deposition of the solder material into a window formed in a photoresist layer. The present invention allows the underfill of a solder window, instead of an overfill which is normally required in a conventional method.