Abstract: The present invention is directed to several inventive methods of monitoring anneal processes performed on implant regions, and a system for accomplishing same. In one aspect, the method comprises forming a first plurality of implant regions in a semiconducting substrate, performing at least one anneal process on implant regions, performing a scatterometric measurement of at least one of the implant regions after at least a portion of the anneal process is performed to determine a profile of the implant region and determining an effectiveness of the anneal process based upon the determined profile of the implant region. In other embodiments, one or more parameters of the anneal process may be varied on subsequently processed substrates based upon the determined efficiency of the anneal process.

Abstract: A trench gate type field effect transistor capable of effectively suppressing the short channel effect is formed with a shallow junction between a source and a drain, at low resistance, and through a simple process. In a method of manufacturing a trench gate type field effect transistor (100A), wherein an impurity introduced layer (13) which is to become a source or a drain is formed by introducing an impurity into a semiconductor substrate (1), a trench (15) is formed in the impurity introduced layer, a gate insulating film (5) is formed on a bottom face of the trench (15), and a gate (G) is formed so as to fill the trench (15), laser annealing for activating the impurity is performed after the impurity is introduced into the semiconductor substrate (1) and before the gate G is formed.

Abstract: To form a polycrystalline silicon film having a grain size of 1 ?m or greater by means of laser annealing. A beam emitted from a laser apparatus (101) is split in two by a half mirror. The split beams are processed into linear shapes by cylindrical lenses (102) to (105), and (207), then simultaneously irradiate an irradiation surface (209). If an amorphous silicon film formed on a glass substrate is disposed on the irradiation surface (209), an area will be irradiated by both a linear shape beam entering from a front surface and a linear shape beam that has transmitted through the glass surface. Both linear shape beams irradiate the same area to thereby crystallize the amorphous silicon film.

Abstract: A probe of a scanning probe microscope (SPM) having a field-effect transistor (FET) structure at the tip of the probe, and a method of fabricating the probe are provided. The SPM probe having a source, channel, and drain is formed by etching a single crystalline silicon substrate into a V-shaped groove and doping the etching sloping sides at one end of the V-shaped groove with impurities.

Abstract: Disclosed is a method of manufacturing the semiconductor devices. The method comprising the steps of forming a gate electrode on a semiconductor substrate, depositing an oxide film for a spacer on the gate electrode, implementing an anisotropic dry etch process for the oxide film for the spacer to form spacers at the sidewalls of the gate electrode, and implementing a rapid thermal annealing process for the spacers under an oxygen atmosphere in order to segregate hydrogen contained within the spacers toward the surface. Therefore, hydrogen contained within the spacer oxide film is not diffused into the tunnel oxide film and the film quality of the tunnel oxide film is thus improved. As a result, program or erase operation characteristics of the flash memory device and a retention characteristic of the flash memory device could be improved.

Abstract: For fabricating a field effect transistor on an active device area of a semiconductor substrate, a gate dielectric and a gate electrode are formed on the active device area of the semiconductor substrate. Antimony (Sb) dopant is implanted into exposed regions of the active device area of the semiconductor substrate to form at least one of drain and source extension junctions and/or drain and source contact junctions. A low temperature thermal anneal process at a temperature less than about 950° Celsius is performed for activating the antimony (Sb) dopant within the drain and source extension junctions and/or drain and source contact junctions. In one embodiment of the present invention, the drain and source contact junctions are formed and thermally annealed before the formation of the drain and source extension junctions in a disposable spacer process for further minimizing heating of the drain and source extension junctions.

Abstract: An improved dopant application system and method for the manufacture of microelectronic devices accurately places dopant on and within a dielectric or semiconductor surface. Diffusing and activating p-type and n-type dopants in dielectric or semiconductor substrates is achieved by means of electron beam irradiation.

Abstract: A process for making a polycrystalline silicon film includes forming, on a glass substrate, an amorphous silicon film having a first region and a second region that contacts the first region, forming a first polycrystalline portion by irradiating the first region of the amorphous silicon film with laser light having a wavelength not less than 390 nm and not more than 640 nm and forming a second polycrystalline portion that contacts the first polycrystalline portion by irradiating the second region and the portion of the region of the first polycrystalline portion that contacts the second region of the amorphous silicon film with the laser light.

Abstract: A semiconductor material and a method for forming the same, said semiconductor material having produced by a process comprising melting a noncrystal semiconductor film containing therein carbon, nitrogen, and oxygen each at a concentration of 5×1019 atoms·cm?3 or lower, preferably 1×1019 atoms·cm?3 or lower, by irradiating a laser beam or a high intensity light equivalent to a laser beam to said noncrystal semiconductor film, and then recrystallizing the thus molten amorphous silicon film. The present invention provides thin film semiconductors having high mobility at an excellent reproducibility, said semiconductor materials being useful for fabricating thin film semiconductor devices such as thin film transistors improved in device characteristics.

Abstract: A method and apparatus for fabrication of passivated microfluidic structures is disclosed. The method includes providing a substrate having a microfluidic structure formed therein. The microfluidic structure is embedded by an embedding layer. The method further includes passivating the embedded microfluidic structure by locally heating the microfluidic structure surface in a reactive atmosphere, wherein the passivated microfluidic structure is suitable for transporting a fluid.

Abstract: A method of performing irradiation of laser light is given as a method of crystallizing a semiconductor film. However, if laser light is irradiated to a semiconductor film, the semiconductor film is instantaneously melted and expands locally. The temperature gradient between a substrate and the semiconductor film is precipitous, distortions may develop in the semiconductor film. Thus, the film quality of the crystalline semiconductor film obtained will drop in some cases. With the present invention, distortions of the semiconductor film are reduced by heating the semiconductor film using a heat treatment process after performing crystallization of the semiconductor film using laser light. Compared to the localized heating due to the irradiation of laser light, the heat treatment process is performed over the entire substrate and semiconductor film. Therefore, it is possible to reduce distortions formed in the semiconductor film and to increase the physical properties of the semiconductor film.

Abstract: The present invention is related to methods of fabricating a resistance variable memory element and a device formed therefrom having improved switching characteristics. According to an embodiment of the present invention a resistance variable material memory element is annealed to remove stoichiometric amounts of a component of the resistance variable material. According to another embodiment of the present invention a silver-germanium-selenide glass is annealed for a duration of about 10 minutes in the presence of oxygen to drive off selenium and increase the rigidity of the glass.

Abstract: A method for programming a semiconductor element in a semiconductor structure such as an IC involves reducing the backside thickness of the substrate and directing an energy beam through the backside at an opaque component of the semiconductor element. A support structure mounted on the semiconductor structure provides support during and after the thinning operation. Alternatively, the substrate can be thinned only under the semiconductor element, leaving the rest of the substrate thick enough to maintain structural integrity. The energy beam heats the opaque component. The prior thinning operation minimizes heat dissipation away from the semiconductor element, so that dopant diffusion occurs, changing the electrical characteristics of the semiconductor element. By modifying selected elements in this manner, a semiconductor structure can be permanently programmed, even if it does not include non-volatile memory. Additionally, security is enhanced since the programming leaves no visible signs.

Abstract: One or more of three different measures are taken to preheat a wafer before it is loaded into direct contact with a wafer holder, in order to provide optimal throughput while reducing the risk of thermal shock to the wafer. The first measure is to move the wafer holder to a raised position prior to inserting the wafer into the reaction chamber and holding the wafer above the wafer holder. The second measure is to provide an increased flow rate of a heat-conductive gas (such as Hs purge gas) through the chamber prior to inserting the wafer therein. The third measure is to provide a power bias to radiative heat elements (e.g., heat lamps) above the reaction chamber.

Abstract: The invention provides a method of making silicon-on-insulator SOI substrates with nitride buried insulator layer by implantation of molecular deuterated ammonia ions ND3+, instead of implanting nitrogen ions (N+, or N2+) as is done in prior art nitride SOI processes. The resultant structure, after annealing, has a buried insulator with a defect density which is substantially lower than in prior art nitride SOI. The deuterated nitride SOI substrates allow much better heat dissipation than SOI with a silicon dioxide buried insulator. These substrates can be used for manufacturing of high speed and high power dissipation monolithic integrated circuits.

Abstract: A heat treatment for diffusing impurity ions implanted into a silicon layer is performed at a heat treatment temperature which is less than an aggregation temperature of the silicon layer. A thermal aggregation of the silicon layer can be inhibited, thereby reducing a silicon deficiency of the silicon layer.

Abstract: Within a method for forming a silicon layer, there is employed at least one sub-layer formed of a higher crystalline silicon material and at least one sub-layer formed of a lower crystalline silicon material. The lower crystalline silicon material is formed employing a hydrogen treatment of the higher crystalline silicon material. The method is particularly useful for forming polysilicon based gate electrodes with enhanced dimensional control and enhanced performance.

Abstract: An a-Si film is patterned into a linear shape (ribbon shape) or island shape on a glass substrate. The upper surface of the a-Si film or the lower surface of the glass substrate is irradiated and scanned with an energy beam output continuously along the time axis from a CW laser in a direction indicated by an arrow, thereby crystallizing the a-Si film. This implements a TFT in which the transistor characteristics of the TFT are made uniform at high level, and the mobility is high particularly in a peripheral circuit region to enable high-speed driving in applications to a system-on glass and the like.

Abstract: A method makes contact with a doping region formed at a substrate surface of a substrate. An insulating layer is applied on the substrate surface and a contact hole is formed in the insulating layer. A metal-containing layer is subsequently deposited on the insulating layer and the surface region of the doping region that is uncovered by the contact hole. In a subsequent thermal process having two steps, first the metal-containing layer is reacted with the silicon of the doping region to form a metal silicide layer and then the rest of the metal-containing layer is converted into a metal-nitride-containing layer in a second thermal step.

Abstract: When carrying workpieces from a loading area in which the workpieces are handled into a heat treatment furnace to make the workpieces subjected to a heat treatment process using a predetermined process gas, the loading area is evacuated and controlled at a predetermined low negative pressure. An exhaust for evacuating the loading area is connected to the loading area, and a controller controls the exhaust so that the loading area is maintained at the predetermined low negative pressure. A specific gas and particles contained in a gas discharged from the loading area are removed by filters.

Abstract: In order to realize a semiconductor device of enhanced TFT characteristics, a semiconductor thin film is selectively irradiated with a laser beam at the step of crystallizing the semiconductor thin film by the irradiation with the laser beam. By way of example, only driver regions (103 in FIG. 1) are irradiated with the laser beam in a method of fabricating a display device of active matrix type. Thus, it is permitted to obtain the display device (such as liquid crystal display device or EL display device) of high reliability as comprises the driver regions (103) made of crystalline semiconductor films, and a pixel region (102) made of an amorphous semiconductor film.

Abstract: A buried bit line and a fabrication method thereof, wherein the device includes a substrate, a shallow doped region disposed in the substrate, a deep doped region disposed in the substrate below a part of the shallow doped region, wherein the shallow doped region and the deep dope region together form a bit line of the memory device.

Abstract: The present invention provides an annealed wafer manufacturing method using a heat treatment method causing no change in resistivity of a wafer surface even when a silicon wafer having boron deposited on a surface thereof from an environment is subjected to heat treatment in an insert gas atmosphere and enabling the heat treatment in an ordinary diffusion furnace not requiring a sealed structure for increasing airtightness nor any specific facility such as explosion-proof facility. The present invention also provides an annealed wafer in which a boron concentration in the vicinity of a surface thereof is constant and crystal defects are annihilated.

Abstract: Disclosed is a method of manufacturing a high-k gate dielectric, characterized in that an annealing process in a forming gas atmosphere, corresponding to a final step of a manufacturing process of a semiconductor device based on MOSFET fabrication techniques, is applied for a high-k gate dielectric-containing semiconductor device, under high pressure, instead of conventional atmospheric pressure, whereby passivation effects of interface charges and fixed charges of the semiconductor device can be maximized even at relatively low temperatures.

Abstract: There are provided a crystallization method which can design laser beam having a light intensity and a distribution optimized on an incident surface of a substrate, form a desired crystallized structure while suppressing generation of any other undesirable structure area and satisfy a demand for low-temperature processing, a crystallization apparatus, a thin film transistor and a display apparatus. When crystallizing a non-single-crystal semiconductor thin film by irradiating laser beam thereto, irradiation light beam to the non-single-crystal semiconductor thin film have a light intensity with a light intensity distribution which cyclically repeats a monotonous increase and a monotonous decrease and a light intensity which melts the non-single-crystal semiconductor. Further, at least a silicon oxide film is provided on a laser beam incident surface of the non-single-crystal semiconductor film.

Abstract: The method for fabricating a semiconductor device comprises the step of: forming a gate electrode on a semiconductor substrate with a gate insulation film formed therebetween; the step of implanting a dopant in the semiconductor substrate with the gate electrode as a mask to form a dope region in the semiconductor substrate; the step of forming a chemical oxide film on the doped region, which prevents the dopant implanted in the doped region from diffusing outside the semiconductor substrate; and the step of performing thermal processing for activating the dopant implanted in the doped region.

Abstract: A wide-slit lateral growth projection mask, projection system, and corresponding crystallization process are provided. The mask includes an opaque region with at least one a transparent slit in the opaque region. The slit has a width in the range of 10X to 50X micrometers, with respect to a X:1 demagnification system, and a triangular-shaped slit end. The triangular-shaped slit end has a triangle height and an aspect ratio in the range of 0.5 to 5. The aspect ratio is defined as triangle height/slit width. In some aspects, the triangular-shaped slit end includes one or more opaque blocking features. In another aspect, the triangular-shaped slit end has stepped-shaped sides. The overall effect of the mask is to promote uniformly oriented grain boundaries, even in the film areas annealed under the slit ends.

Abstract: In a method for manufacturing a semiconductor device, a gate insulating film and a gate electrode are first formed on a substrate. Next, Ge ions, Si ions, or the like are implanted to make the surface of the substrate amorphous, using the gate electrode as a mask. Thereafter, impurities such as B ions or the like, for forming a doped region, are implanted into the amorphous area of the substrate, using the gate electrode as a mask. Furthermore, the doped region is irradiated with visible light for a short period of time.

Abstract: Methods of fabricating a semiconductor device having a MOS transistor with a strained channel are provided. The method includes forming a MOS transistor at a portion of a semiconductor substrate. The MOS transistor is formed to have source/drain regions spaced apart from each other and a gate electrode located over a channel region between the source/drain regions. A stress layer is formed on the semiconductor substrate having the MOS transistor. The stress layer is then annealed to convert a physical stress of the stress layer into a tensile stress or increase a tensile stress of the stress layer.

Abstract: Semiconductor device fabrication methods are provided in which a carbon-containing region is formed in a wafer to inhibit diffusion of dopants during fabrication. Front-end thermal processing operations, such as oxidation and/or anneal processes, are performed at high temperatures for short durations in order to mitigate out-diffusion of carbon from the carbon-containing region, such that carbon remains to inhibit or mitigate dopant diffusion.

Abstract: A laser beam irradiation method that achieves uniform crystallization, even if a film thickness of an a-Si film or the like fluctuates, is provided. The present invention provides a laser beam irradiation method in which a non-single crystal semiconductor film is formed on a substrate having an insulating surface and a laser beam having a wavelength longer than 350 nm is irradiated to the non-single crystal semiconductor film, thus crystallizing the non-single crystal silicon film. The non-single crystal semiconductor film has a film thickness distribution within the surface of the substrate, and a differential coefficient of a laser beam absorptivity with respect to the film thickness of the non-single crystal semiconductor film is positive.

Abstract: A method and system can compensate for anneal non-uniformities by implanting dopant in a pattern to provide higher dopant concentrations where the anneal non-uniformities result in lower active dopant concentrations. A pattern for the anneal non-uniformities may be determined by annealing a wafer having a uniform dopant distribution and measuring properties of the wafer after annealing, e.g., by obtaining a sheet resistance map of the wafer. In one embodiment, the non-uniformities may be measured by measuring temperature variations during annealing.

Abstract: A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition.

Abstract: The invention is directed to method for fabricating a TFT. A semiconductor film is formed over a substrate. A semiconductor island is formed by patterning the semiconductor film. An insulating film is formed over the substrate. An optical annealing process is performed to crystallize the semiconductor island. A transistor is formed on the semiconductor island. Also, a patterning method on an amorphous semiconductor film uses a light beam to illuminate through a mask onto the amorphous semiconductor film, so as to crystallize a portion of the amorphous semiconductor film into a crystal semiconductor portion, or form an oxide on the amorphous semiconductor island in an oxygen ambience. Then, a gas etching process, such as H atoms, is performed to remove a portion of the amorphous semiconductor not being illuminated by the laser.

Abstract: A multi-pattern shadow mask, shadow mask laser annealing system, and a multi-pattern shadow mask method for laser annealing are provided. The method comprises: supplying a silicon substrate; supplying a multi-pattern shadow mask with a plurality of aperture patterns; creating substrate alignment marks; with respect to the alignment marks, laser annealing a substrate region in a plurality of aperture patterns; forming a corresponding plurality of polysilicon regions; and, forming a corresponding plurality of transistor channel regions in the plurality of polysilicon regions. Typically, the shadow mask includes a plurality of sections, with each section having at least one aperture pattern. A shadow mask section can be selected to create a corresponding aperture pattern. If the mask section includes a plurality of aperture patterns, the selection of a section creates all the corresponding aperture patterns in the selected section.

Abstract: A thin-film transistor is formed by a polycrystalline silicon film having a thin-film part and a thick-film part, the thin-film part minimally being used as a channel part. The polycrystalline silicon film is formed by laser annealing with an energy density that completely melts the thin-film part but does not completely melt the thick-film part. Because large coarse crystal grains growing from the boundary between the thin-film part and the thick-film part form the channel part, it is possible to use a conventional laser annealing apparatus to easily achieve high carrier mobility and low leakage current and the like.

Abstract: When a laser beam is radiated on a semiconductor film under appropriate conditions, the semiconductor film can be crystallized into single crystal-like grains connected in a scanning direction of the laser beam (laser annealing). The most efficient laser annealing condition is studied. When a length of one side of a rectangular substrate on which a semiconductor film is formed is b, a scanning speed is V, and acceleration necessary to attain the scanning speed V of the laser beam relative to the substrate is g, and when V=(gb/5.477)1/2 is satisfied, a time necessary for the laser annealing is made shortest. The acceleration g is made constant, however, when it is a function of time, a time-averaged value thereof can be used in place of the constant.

Abstract: A semiconductor device includes a T-shaped gate on a gate insulation film, wherein the T-shaped gate includes a lower polycrystal layer containing Si and Ge and an upper polycrystal layer of polysilicon.

Abstract: An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 &mgr;m deep into the body material but not more than 0.1 &mgr;m deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.

Abstract: A gas discharge laser crystallization apparatus and method for performing a transformation of a crystal makeup or orientation in the substrate of a workpiece is disclosed which may comprise, a multichamber laser system comprising, a first laser unit comprising, a first and second gas discharge chamber; each with a pair of elongated spaced apart opposing electrodes contained within the chamber, forming an elongated gas discharge region; a laser gas contained within the chamber comprising a halogen and a noble gas selected to produce laser light at a center wavelength optimized to the crystallization process to be carried out on the workpiece; a power supply module comprising, a DC power source; a first and a second pulse compression and voltage step up circuit connected to the DC power source and connected to the respective electrodes, comprising a multistage fractional step up transformer having a plurality of primary windings connected in series and a single secondary winding passing through each of the plur

Abstract: A method of manufacturing a semiconductor integrated circuit device includes steps of forming a silicon oxide film as thin as 5 nm or less on the surfaces of p-type wells and n-type wells by wet oxidizing a substrate, heating the substrate in an atmosphere containing about 5% of an NO gas to introduce nitrogen into the silicon oxide film to form a silicon oxynitride film, and exposing the substrate to a nitrogen plasma atmosphere to further introduce nitrogen into the silicon oxynitride film to form a silcon oxynitride gate insulating film having a first peak concentration near the interface with the substrate and a second peak concentration near the surface thereof. Thereby, the concentration of nitrogen in the gate insulating film is increased without raising the concentration of nitrogen near the interface between the substrate and the gate insulating film to a higher level than required.

Abstract: A method of forming a photo-catalytic film made of titanium oxide on a base material based on a simple process at low temperatures, particularly a method of forming a laminated material comprising photo-catalytic film of titanium oxide formed on a base material is provided. A method of forming a photo-catalytic film made of titanium oxide on a base material includes a treating process, in which photo-catalytic film of titanium oxide is formed on a base material and irradiated with UV light in vacuum or in an atmosphere of reducing gas at a temperature maintained between 25° C. and below 300° C.

Abstract: A manufacturing method of a semiconductor thin film, comprising preparing a substrate, forming a semiconductor thin film on the substrate; and irradiating laser beam to the semiconductor thin film, wherein the semiconductor thin film is formed at a thickness so that an absorption rate to the laser beam is equal to or higher than 80% of a peak value, by using light interference that occurs in the interior of the semiconductor thin film, and the semiconductor thin film is crystallized or re-crystallized by irradiating the laser beam, is provided.

Abstract: An aggregation of crystals extending long in the scanning direction (a long crystal grain region) is formed when a continuous wave laser oscillator (a CW laser oscillator) is employed for annealing the semiconductor film in the manufacturing process of a semiconductor device. The long crystal grain region has a characteristic similar to that of single crystal in the scanning direction, but there is restriction for high integration because of the small output of the CW laser oscillator.

Abstract: A method of reducing resistance for a conductive film based on simple process at low temperatures, particularly a method of reducing resistance for a conductive film formed on a base of plastic resins is provided. A method of reducing resistance for a conductive film formed on a base material includes a treating process, in which a conductive film made of metal oxide is formed on a base material and irradiated with UV light in vacuum or in an atmosphere of reducing gas maintaining the temperature between 25° C. and 300° C.

Abstract: A first conductive electrode material is formed on a substrate. Chalcogenide comprising material is formed thereover. The chalcogenide material comprises AxSey. A silver comprising layer is formed over the chalcogenide material. The silver is irradiated effective to break a chalcogenide bond of the chalcogenide material at an interface of the silver comprising layer and chalcogenide material and diffuse at least some of the silver into the chalcogenide material. After the irradiating, the chalcogenide material outer surface is exposed to an iodine comprising fluid effective to reduce roughness of the chalcogenide material outer surface from what it was prior to the exposing. After the exposing, a second conductive electrode material is deposited over the chalcogenide material, and which is continuous and completely covering at least over the chalcogenide material, and the second conductive electrode material is formed into an electrode of the device.

Abstract: A method of fabricating a thin film transistor includes forming an amorphous silicon layer as an active layer on a substrate, forming a gate insulating layer and a gate electrode on the amorphous silicon layer, doping impurities of a first conductive type in the amorphous silicon layer, forming a metal layer on the exposed portions of the amorphous silicon layer, and crystallizing the amorphous silicon layer by applying thermal treatment and electric field to the resultant substrate.

Abstract: A method of forming a doped polycrystalline silicon gate in a Metal Oxide Semiconductor (MOS) device. The method includes forming first an insulation layer on a top surface of a crystalline silicon substrate. Next, an amorphous silicon layer is formed on top of and in contact with the insulation layer and then a dopant is introduced in a top surface layer of the amorphous silicon layer. The top surface of the amorphous silicon layer is irradiated with a laser beam and the heat of the radiation causes the top surface layer to melt and initiates explosive recrystallization (XRC) of the amorphous silicon layer. The XRC process transforms the amorphous silicon layer into a polycrystalline silicon gate and distributes the dopant homogeneously throughout the polycrystalline gate.

Abstract: Metal silcides form low resistance contacts on semiconductor devices such as transistors. Conventional formation of semiconductor devices with metal silicide contacts requires multiple high temperature annealing steps, which can result in crystal damage from dislocations and increased leakage currents. A single, lower temperature annealing step is employed in the invention to produce semiconductor devices with the source/drain regions formed in amorphous regions of a semiconductor substrate and nickel silicide contacts over the source/drain regions. The amorphization of the source/drain regions allows a lower temperature anneal to be performed, and the use of nickel silicide permits a single anneal to be used to both activate the dopants and form the nickel silicide contacts.

Abstract: A laser beam irradiation method that achieves uniform crystallization, even if a film thickness of an a-Si film or the like fluctuates, is provided. The present invention provides a laser beam irradiation method in which a non-single crystal semiconductor film is formed on a substrate having an insulating surface and a laser beam having a wavelength longer than 350 nm is irradiated to the non-single crystal semiconductor film, thus crystallizing the non-single crystal silicon film. The non-single crystal semiconductor film has a film thickness distribution within the surface of the substrate, and a differential coefficient of a laser beam absorptivity with respect to the film thickness of the non-single crystal semiconductor film is positive.