Abstract: The present invention has an object to provide a method for producing particulate barium carbonate having desired properties such as high purity, fineness, and has a spherical shape. The present invention relates to a method of producing substantially spherical barium carbonate, including (A) mixing, in an aqueous medium, a barium compound with at least one first ingredient selected from the group consisting of gluconic acid or salts thereof, gluconolactone, glucoheptonic acid or salts thereof, and glucoheptonolactone, to prepare a mixture; and (B) reacting the barium compound with carbon dioxide or a water-soluble carbonate in the mixture, to produce substantially spherical barium carbonate.

Abstract: A bonding method according to an exemplary embodiment of the present disclosure includes a first holding processing, a second holding processing, a temporary bonding processing, a temperature increasing processing and a main bonding processing. In the first holding processing, a target substrate is held. In the second holding processing, a glass substrate held by electrostatic adsorption. In the temporary bonding processing, the target substrate and the glass substrate are temporarily bonded with a pressing force lower than a predetermined pressing force at a temperature lower than a predetermined temperature. In the temperature increasing processing, while releasing the electrostatic adsorption of the glass substrate at the same time as or after the temporary bonding, the temperature is increased to the predetermined temperature. In the main bonding processing, a main bonding of the target substrate and the glass substrate is performed with the predetermined pressing force.

Abstract: A method for producing a semiconductor device includes: an arranging process of arranging a plurality of silicon carbide wafers having opposed first and surfaces so that the first surface and the second surface of adjacent silicon carbide wafers face each other and are separated in parallel; and a heat treatment process of heating the arranged plurality of silicon carbide wafers so that the first surface of each silicon carbide wafer becomes higher in temperature than the second surface thereof, and, in the adjacent silicon carbide wafers, the second surface of one silicon carbide wafer becomes higher in temperature than the first surface of the other silicon carbide wafer that faces the second surface.

Abstract: A high-pressure washing liquid ejecting washing apparatus comprises a bar-shaped holder; and a plurality of high-pressure washing liquid ejecting nozzles arranged at constant intervals along a longitudinal direction of the bar-shaped holder, the holder being supported at both sides in a longitudinal direction thereof such that the holder is rotatable around its longitudinal axis, the holder being reciprocatingly rotated around the longitudinal axis within a predetermined rotational angle and the ejecting nozzles ejecting a high-pressure washing liquid to a washed surface of an object in a single straight-line shape to wash the object while the object is conveyed at a constant speed with respect to the holder, wherein the holder has a length which is not less than a length across the object and is disposed such that the holder is orthogonal to a direction in which the object is conveyed or is tilted with respect to the direction in which the object is conveyed, when viewed from a normal line direction of the w

Abstract: There is provided a polishing composition for a magnetic disk substrate that can reduce scratches, nanoprotrusion defects, and substrate surface waviness after polishing. The polishing composition for a magnetic disk substrate that contains: a copolymer that has a constituent unit derived from a monomer having a solubility of 2 g or less in 100 g of water at 20° C. and a constituent unit having a sulfonic acid group, and has a saturated hydrocarbon chain as the main chain thereof, or a salt of the copolymer; an abrasive; and water.

Abstract: Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.

Abstract: Provided is a polishing slurry composition, including a non-ionic surfactant represented by the following formula (1) R—(OCH2CH2)x—OH??formula (1) wherein x is an integer from 1 to 50, and R is selected from a group consisting of a C3-C50 alkyl group, a C6-C55 benzylalkyl group and a C6-C55 phenylalkyl group.

Abstract: There is provided a method of fabricating a semiconductor device, the method including: forming a first semiconductor region at a front surface of a substrate, the first semiconductor region including an active element that regulates current flowing in a thickness direction of the substrate; grinding a rear surface of the substrate; after the grinding, performing a first etching that etches the rear surface of the substrate with a chemical solution including phosphorus; after the first etching, performing a second etching that etches the rear surface with an etching method with a lower etching rate than the first etching; and after the second etching, forming a second semiconductor region through which the current is to flow, by implanting impurities from the rear surface of the substrate.

Abstract: A method of treating the surface of a semiconductor wafer through the formation of a bonding system is provided in order to enhance the handling of the wafer during subsequent processing operations. The method generally comprises the steps of applying a release layer and an adhesive to different wafers; bonding the wafers together to form a bonded wafer system; performing at least one wafer processing operation (e.g., wafer grinding, etc.) to form a thin processed wafer; debonding the wafers; and then cleaning the surface of the processed wafer with an organic solvent that is capable of dissolving the release layer or any residue thereof. The adhesive includes a vinyl-functionalized polysiloxane oligomeric resin, a Si—H functional polysiloxane oligomeric resin, a catalyst, and optionally an inhibitor, while the release layer is comprised of either a silsesquioxane-based resin or a thermoplastic resin.

Abstract: An aqueous polishing agent, comprising, as the abrasive, at least one kind of polymer particles (A) finely dispersed in the aqueous phase and having at their surface a plurality of at least one kind of functional groups (a1) capable of interacting with the metals and/or the metal oxides on top of the surfaces to be polished and forming complexes with the said metals and metal cations, the said polymer particles (A) being preparable by the emulsion or suspension polymerization of at least one monomer containing at least one radically polymerizable double bond in the presence of at least one oligomer or polymer containing a plurality of functional groups (a1); graft copolymers preparable by the emulsion or suspension polymerization of at least one monomer containing at least one radically polymerizable double bond in the presence of at least one oligomeric or polymeric aminotriazine-polyamine condensate; and a process for the chemical and mechanical polishing of patterned and unstructured metal surfaces making

Abstract: An object is to provide a compound semiconductor substrate and a surface-treatment method thereof, in which, even after the treated substrate is stored for a long period of time, resistance-value defects do not occur. Even when the compound semiconductor substrate is stored for a long period of time and an epitaxial film is then formed thereon, electrical-characteristic defects do not occur. The semiconductor substrate according to the present invention is a compound semiconductor substrate at least one major surface of which is mirror-polished, the mirror-polished surface being covered with an organic substance containing hydrogen (H), carbon (C), and oxygen (O) and alternatively a compound semiconductor substrate at least one major surface of which is mirror-finished, wherein a silicon (Si) peak concentration at an interface between an epitaxial film grown at a growth temperature of 550° C. and the compound semiconductor substrate is 2×1017 cm?3 or less.

Abstract: In a fabrication method of a silicon carbide semiconductor element including a drift layer playing a role of retaining a high withstand voltage on a front side of a semiconductor substrate of silicon carbide and including an ohmic electrode on a backside, dicing is added to form at least one dicing line in an element active region on a surface of the semiconductor substrate on a side opposite of the drift layer before forming the ohmic electrode on the backside of the semiconductor substrate. Thus, a silicon carbide semiconductor element and fabrication method thereof is provided such that even if the semiconductor substrate is made thinner to reduce the on-resistance, the strength of the substrate can be maintained and cracking of the wafer during wafer processing can be reduced.

Abstract: A substrate polishing method, a semiconductor device and a fabrication method for a semiconductor device are disclosed by which high planarization polishing can be achieved. In the substrate polishing method, two or more different slurries formed from ceria abrasive grains having different BET values from each other are used to carry out two or more stages of chemical-mechanical polishing processing of a polishing object oxide film on a substrate to flatten the polishing object film.

Abstract: A method for chemical mechanical polishing of a substrate includes polishing the substrate at a stock removal rate of greater than about 2.5 ?/min to achieve a Ra of not greater than about 5.0 ?. The substrate can be a III-V substrate or a SiC substrate. The polishing utilizes a chemical mechanical polishing slurry comprising ultra-dispersed diamonds and at least 80 wt % water.

Abstract: A chemical mechanical polishing (CMP) composition (Q) comprising (A) Inorganic particles, organic particles, or a mixture or composite thereof, wherein the particles are cocoon-shaped (B) a non-ionic surfactant, (C) a carbonate or hydrogen carbonate salt, (D) an alcohol, and (M) an aqueous medium.

Abstract: A manufacturing method of a glass substrate for a magnetic disk is provided whereby nano pits and/or nano scratches cannot be easily produced in polishing a principal face of a glass substrate using a slurry containing zirconium oxide as an abrasive. The manufacturing method of a glass substrate for a magnetic disk includes, for instance, a polishing step of polishing a principal face of a glass substrate using a slurry containing, as an abrasive, zirconium oxide abrasive grains having monoclinic crystalline structures (M) and tetragonal crystalline structures (T).

Abstract: Provided are novel chemical mechanical polishing (CMP) slurry compositions for polishing copper substrates and method of using the CMP compositions. The CMP slurry compositions deliver superior planarization with high and tunable removal rates and low defects when polishing bulk copper layers of the nanostructures of IC chips. The CMP slurry compositions also offer the high selectivity for polishing copper relative to the other materials (such as Ti, TiN, Ta, TaN, and Si), suitable for through-silicon via (TSV) CMP process which demands high copper film removal rates.

Abstract: A pattern forming method includes forming a coating film containing a hydrophilic first homopolymer having a first bonding group and a hydrophobic second homopolymer having a second bonding group capable of bonding with the first bonding group, forming a bond between the first and second bonding group to produce a block copolymer of the first and second homopolymers, and heating the coating film to microphase-separating the copolymer into a hydrophilic domain and a hydrophobic domain. The hydrophilic and hydrophobic domains are arranged alternately. The bond is broken, then selectively dissolving-removing either domain by a solvent to provide a polymer pattern of a remainder domain.

Abstract: The present invention relates to a CMP slurry that is able to reduce dishing generation, when it is applied to polishing or planarization of silicon oxide layer, for example, and a polishing method. The CMP slurry includes a polishing abrasive, a linear anionic polymer, a compound including a phosphoric acid group, and water, and the ratio of CMP polishing speed to a silicon oxide layer: CMP polishing speed to a silicon nitride layer is 30:1 to 50:1.

Abstract: A method for cleaning a dielectric and metal structure within a microelectronic structure uses an oxygen containing plasma treatment, followed by an alcohol treatment, in turn followed by an aqueous organic acid treatment. Another method for cleaning a dielectric and metal structure within a microelectronic structure uses an aqueous surfactant treatment followed by an alcohol treatment and finally followed by an aqueous organic acid treatment. The former method may be used to clean a plasma etch residue from a dual damascene aperture. The second method may be used to clean a chemical mechanical polish planarizing residue from a dual damascene structure. The two methods may be used sequentially, absent any intervening or subsequent sputtering method, to provide a dual damascene structure within a microelectronic structure.

Abstract: A method for single side texturing of a crystalline semiconductor substrate (10) comprises: providing a substrate (10), for example a semiconductor substrate, comprising a first surface (12) and a second surface (14) opposite to one another with respect to the substrate (10); providing a masking layer (21) with a random pattern on the first surface (12) of the substrate (10); and etching the substrate (10) in a polishing solution, thereby texturing the first surface (12) of the substrate (10) and polishing the second surface (14) in a single wet etching step.

Abstract: Disclosed are a polishing composition and method of polishing a substrate. The composition has low-load (e.g., up to about 0.1 wt. %) of abrasive particles. The polishing composition also contains water and at least one anionic surfactant. In some embodiments, the abrasive particles are alpha alumina particles (e.g., coated with organic polymer). The polishing composition can be used, e.g., to polish a substrate of weak strength such as an organic polymer. An agent for oxidizing at least one of silicon and organic polymer is included in the composition in some embodiments.

Abstract: A method for creating an extremely thin semiconductor-on-insulator (ETSOI) layer having a uniform thickness includes: measuring a thickness of a semiconductor-on-insulator (SOI) layer at a plurality of locations; determining a removal thickness at each of the plurality of locations; and implanting ions at the plurality of locations. The implanting is dynamically based on the removal thickness at each of the plurality of locations. The method further includes oxidizing the SOI layer to form an oxide layer, and removing the oxide layer.

Abstract: A method of making an imprinted micro-wire structure includes providing a substrate and first, second, and third different stamps. A curable first layer is provided in relation to a substrate and imprinted with first, second, and third micro-channels using the first stamp. First, second, and third micro-wires are formed in the first, second, and third micro-channels. A curable second layer is provided adjacent to the first layer and imprinted with first and second connecting micro-channels. First and second connecting micro-wires are formed in the first and second connecting micro-channels. A curable third layer is provided and imprinted with a bridge micro-channel and a bridge micro-wire formed in the bridge micro-channel. The first and second micro-wires, the first and second connecting micro-wires, and the bridge micro-wire are electrically connected and electrically isolated from the third micro-wire.

Abstract: Disclosed is a method for polishing a silicon wafer, wherein a surface to be polished of a silicon wafer is rough polished, while supplying a polishing liquid, which is obtained by adding a water-soluble polymer to an aqueous alkaline solution that contains no free abrasive grains, to a polishing cloth. Consequently, the surface to be polished can be polished at high polishing rate and the flatness of the edge portion including roll-off and roll-up can be controlled.

Abstract: A polishing composition for a silicon wafer includes a macromolecular compound, an abrasive, and an aqueous medium. The macromolecular compound includes a constitutional unit (a1) represented by the following general formula (1), a constitutional unit (a2) represented by the following general formula (2), and a constitutional unit (a3) represented by the following general formula (3). The total of the constitutional unit (a3) is 0.001 to 1.5 mol % of all the constitutional units of the macromolecular compound.

Abstract: The present disclosure relates to methods of forming a self-aligned contact and related apparatus. In some embodiments, the method forms a plurality of gate lines interspersed between a plurality of dielectric lines, wherein the gate lines and the dielectric lines extend in a first direction over an active area. One or more of the plurality of gate lines are into a plurality of gate line sections aligned in the first direction. One or more of the plurality of dielectric lines are cut into a plurality of dielectric lines sections aligned in the first direction. A dummy isolation material is deposited between adjacent dielectric sections in the first direction and between adjacent gate line sections in the first direction. One or more self-aligned metal contacts are then formed by replacing a part of one or more of the plurality of dielectric lines over the active area with a contact metal.

Abstract: A polishing method and a polishing apparatus finish a surface of a substrate of a compound semiconductor containing an element such as Ga or the like to a desired level of flatness, so that the surface can be flattened with high surface accuracy within a practical processing time. In the presence of water, such as weak acid water, water with air dissolved therein, or electrolytic ion water, the surface of the substrate made of a compound semiconductor containing either one of Ga, Al, and In and a surface of a polishing pad having an electrically conductive member in an area of the surface which is held in contact with the substrate) are relatively moved while being held in contact with each other, thereby polishing the surface of the substrate.

Abstract: The CMP polishing liquid of the present invention contains 1,2,4-triazole, a phosphoric acid, an oxidant, and abrasive particles. The polishing method of the present invention is a substrate polishing method for polishing a substrate with a polishing cloth while supplying a CMP polishing liquid between the substrate and the polishing cloth, in which the substrate is a substrate having a palladium layer, and the CMP polishing liquid is a CMP polishing liquid containing 1,2,4-triazole, a phosphoric acid, an oxidant, and abrasive particles.

Abstract: Provided are a metal-polishing liquid that comprises an oxidizing agent, an oxidized-metal etchant, a protective film-forming agent, a dissolution promoter for the protective film-forming agent, and water; a method for producing it; and a polishing method of using it. Also provided are materials for the metal-polishing liquid, which include an oxidized-metal etchant, a protective film-forming agent, and a dissolution promoter for the protective film-forming agent.

Abstract: The present invention relates to a method for producing silicon waveguides on non-SOI substrate (non-silicon-on-insulator substrate), and particularly relates to a method for producing silicon waveguides on silicon substrate with a laser. This method includes the following steps: (1) forming a ridge structure with high aspect ratio on a non-SOI substrate; (2) melting and reshaping the ridge structure by laser illumination for forming a structure having broad upper part and narrow lower part; and (3) oxidizing the structure having broad upper part and narrow lower part to form a silicon waveguide.

Abstract: A method for polishing Through-Silicon Via (TSV) wafers is provided. The method comprises a step of subjecting the surface of a TSV wafer to a polishing treatment with a polishing composition containing an organic alkaline compound, an oxidizing agent selected from sodium chlorite and/or potassium bromate, silicon oxide abrasive particles, and a solvent to simultaneously remove Si and conductive materials at their respective removal rates. By using the method of this invention, Si and conductive materials can be simultaneously polished at higher removal rates to significantly save the necessary working-hour costs for polishing TSV wafers. A polishing composition used in the above method is also provided.

Abstract: A method of polishing a semiconductor wafer includes applying a polishing pad to the semiconductor wafer so as to subject the semiconductor wafer to a polishing process and supplying an aqueous polishing agent solution between the polishing pad and the semiconductor wafer. The polishing pad includes fixedly bonded abrasives of SiO2 with an average grain size in a range of 0.1 to 1.0 ?m. The aqueous polishing agent solution comprising an alkaline component, being free of solid materials and having a variable pH value in a range of 11 to 13.5. The aqueous polishing agent solution is maintained at a pH value of less than 13 during the polishing process and the pH value of the aqueous polishing agent solution is increased to a range of 13 to 13.5 so as to end the polishing process.

Abstract: Greater planarity is achieved between surfaces of a conductive structure and a layer within which the conductive structure resides. A portion of the conductive structure protruding above the surface of the layer is selectively oxidized, at least in part, to form an oxidized portion. The oxidized portion is then removed, at least partially, to facilitate achieving greater planarity. The protruding portions may optionally be formed by selectively disposing conductive material over the conductive structure, when that the conductive structure is initially recessed below the surface of the layer. A further embodiment includes selectively oxidizing a portion of the conductive structure below the surface of the layer, removing at least some of the oxidized portion so that an upper surface of the conductive structure is below the upper surface of the layer, and planarizing the upper surface of the layer to the upper surface of the conductive structure.

Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a concave portion on a surface of a substrate to be processed. The method further includes forming a coating film on the substrate to embed the coating film in the concave portion. The method further includes performing a first heat treatment in an atmosphere including an oxidant which contains polar molecules. The method further includes performing a second heat treatment after the first heat treatment by irradiating the coating film with a microwave after or while exposing the coating film to a liquid or a gas containing polar molecules.

Abstract: This invention is to provide a method of polishing a silicon wafer wherein a high flatness can be attained likewise the conventional polishing method and further the occurrence of defects due to the remaining of substances included in the polishing solution on the surface of the wafer can be suppressed as well as a polished silicon wafer. The method of polishing a silicon wafer by supplying a polishing solution containing abrasive grains onto a surface of a polishing pad and then relatively sliding the polishing pad to a silicon wafer to polish the surface of the silicon wafer, is characterized in that the number of abrasive grains included in the polishing solution is controlled to not more than 5×1013 grains/cm3.

Abstract: The polishing solution for copper polishing of the invention comprises a first organic acid component which is at least one type selected from among an organic acid containing a hydroxyl group, an organic acid salt and an organic acid anhydride, an inorganic acid component which is at least one type selected from among a dibasic or greater inorganic acid and an inorganic acid salt, an amino acid, a protective film-forming agent, an abrasive grain, an oxidizing agent and water, wherein the inorganic acid component content in terms of inorganic acid is 0.15 mass % or greater, the amino acid content is 0.30 mass % or greater, the protective film-forming agent content is 0.10 mass % or greater, based on the entire polishing solution for copper polishing, and the ratio of the first organic acid component content in terms of organic acid with respect to the protective film-forming agent content is at least 1.5.

Abstract: A donor wafer, for example of silicon, has an irregular surface following cleaving of a lamina from the surface, for example by exfoliation following implant of hydrogen and/or helium ions to define a cleave plane. Pinholes in the lamina leave column asperities at the exfoliated surface of the donor wafer, and the beveled edge may leave an edge asperity which fails to exfoliate. To prepare the surface of the donor wafer for reuse, mechanical grinding removes the column and edge asperities, and minimal additional thickness. Following cleaning, growth and removal of an oxide layer at the surface rounds remaining peaks. The smoothed surface is well adapted to bonding to a receiver element and exfoliation of a new lamina. A variety of devices may be fabricated from the lamina, for example a photovoltaic cell.

Abstract: A group III nitride substrate in one embodiment has a surface layer. The surface layer contains 3 at. % to 25 at. % of carbon and 5×1010 atoms/cm2 to 200×1010 atoms/cm2 of a p-type metal element. The group III nitride substrate has a stable surface.

Abstract: Methods of processing a device substrate are disclosed herein. In one embodiment, a method of processing a device substrate can include bonding a first surface of a device substrate to a carrier with a polymeric material. The device substrate may have a plurality of first openings extending from the first surface towards a second surface of the device substrate opposite from the first surface. Then, material can be removed at the second surface of the device substrate, wherein at least some of the first openings communicate with the second surface at least one of before or after performing the removal of the material. Then, at least a portion of the polymeric material disposed between the first surface and the carrier substrate can be exposed to a substance through at least some first openings to debond the device substrate from the carrier substrate.

Abstract: An object of the present invention is to provide a polishing liquid for CMP with which polishing scratches can be reduced and a sufficiently high polishing rate can be obtained in a CMP step for an ILD film, aggregation of an abrasive grain is difficult to occur, and high flatness is obtained, and provide a polishing method using the same. The polishing liquid for CMP according to the present invention is a polishing liquid for CMP containing an abrasive grain, an additive, and water, wherein the abrasive grain comprises a cerium-based particle, and the additive comprises a 4-pyrone-based compound and at least one of a nonionic surfactant or a cationic surfactant: [wherein X11, X12, and X13 each independently represent a hydrogen atom or a monovalent substituent].

Abstract: A method is provided for preparing multilayer semiconductor structures, such as silicon-on-insulator wafers, having reduced warp and bow. Reduced warp multilayer semiconductor structures are prepared by forming a dielectric structure on the exterior surfaces of a bonded pair of a semiconductor device substrate and a semiconductor handle substrate having an intervening dielectric layer therein. Forming a dielectric layer on the exterior surfaces of the bonded pair offsets stresses that may occur within the bulk of the semiconductor handle substrate due to thermal mismatch between the semiconductor material and the intervening dielectric layer as the structure cools from process temperatures to room temperatures.

Abstract: Provided are methods for processing semiconductor substrates to remove high-dose ion implanted (HDI) photoresist structures without damaging other structures made of titanium nitride, tantalum nitride, hafnium oxide, and/or hafnium silicon oxide. The removal is performed using a mixture of an organic solvent, an oxidant, a metal-based catalyst, and one of a base or an acid. Some examples of suitable organic solvents include dimethyl sulfoxide, n-ethyl pyrrolidone, monomethyl ether, and ethyl lactate. Transition metals in their zero-oxidation state, such as metallic iron or metallic chromium, may be used as catalysts in this mixture. In some embodiments, a mixture includes ethyl lactate, of tetra-methyl ammonium hydroxide, and less than 1% by weight of the metal-based catalyst. The etching rate of the HDI photoresist may be at least about 100 Angstroms per minute, while other structures may remain substantially intact.

Abstract: A method and apparatus for ultra thin wafer backside processing are disclosed. The apparatus includes an outer ring holding a high temperature grinding and/or dicing tape to form a support structure. An ultra thin wafer or diced wafer is adhered to the tape within the ring for wafer backside processing. The wafer backside processing includes ion implantation, annealing, etching, sputtering and evaporation while the wafer is in the support structure. Alternative uses of the support structure are also disclosed including the fabrication of dies having metalized side walls.

Abstract: A cleaning solution of the present invention contains a sodium ion, a potassium ion, an iron ion, an ammonium salt of a sulfuric ester represented by General Formula (1), and water, and each content of the sodium ion, the potassium ion, and the iron ion is 1 ppb to 500 ppb. ROSO3—(X)+ (1) where R is an alkyl group with a carbon number of 8-22 or an alkenyl group with a carbon number of 8-22, and (X)+ is an ammonium ion.

Abstract: The present invention provides a method for forming a fin structure comprising the following steps: first, a multiple-layer structure is formed on a substrate; then, a sacrificial pattern is formed on the multiple-layer structure, a spacer is formed on the sidewall of the sacrificial pattern and disposed on the multiple-layer structure, the sacrificial pattern is removed, the spacer is used as a cap layer to etch parts of the multiple-layer structure, and then the multiple-layer structure is used as a cap layer to etch the substrate and to form at least one fin structure in the substrate.

Abstract: A composition and associated method for chemical mechanical planarization of a metal-containing substrate (e.g., a copper substrate) are described herein which afford high and tunable rates of metal removal as well as low within a wafer non-uniformity values and low residue levels remaining after polishing.

Abstract: Afforded are a polishing agent, and a compound semiconductor manufacturing method and semiconductor device manufacturing method utilizing the agent, whereby the surface quality of compound semiconductor substrates can be favorably maintained, and high polishing rates can be sustained as well. The polishing agent is a polishing agent for Ga?In(1-?)As?P(1-?) (0???1; 0???1) compound semiconductors, and includes an alkali metal carbonate, an alkali metal organic salt, a chlorine-based oxidizer, and an alkali metal phosphate, wherein the sum of the concentrations of the alkali metal carbonate and the alkali metal organic salt is between 0.01 mol/L and 0.02 mol/L, inclusive. The compound semiconductor manufacturing method comprises a step of preparing a Ga?In(1-?)As?P(1-?) (0???1; 0???1) compound semiconductor, and a step of polishing the face of the compound semiconductor utilizing an aforedescribed polishing agent.

Abstract: A post metal chemical-mechanical planarization (CMP) cleaning process for advanced interconnect technology is provided. The process, which follows CMP, combines an acidic clean and a basic clean in sequence. The process can achieve a more than 60% reduction in CMP defects, such as polish residues, foreign materials, slurry abrasives, scratches, and hollow metal, relative to an all-basic clean process. The process also eliminates the circular ring defects that occur intermittently during roller brush cleans within a roller brush clean module.

Abstract: A plasma processing method and a plasma processing apparatus in which a stable process region can be ensured in a wide range, from low microwave power to high microwave power. The plasma processing method includes making production of plasma easy in a region in which production of plasma by continuous discharge is difficult, and plasma-processing an object to be processed, with the generated plasma, wherein the plasma is produced by pulsed discharge in which ON and OFF are repeated, radio-frequency power for producing the pulsed discharge, during an ON period, is a power to facilitate production of plasma by continuous discharge, and a duty ratio of the pulsed discharge is controlled so that an average power of the radio-frequency power per cycle is power in the region in which production of plasma by continuous discharge is difficult.