Including Integrally Formed Optical Element (e.g., Reflective Layer, Luminescent Layer, Etc.) Patents (Class 438/69)
  • Patent number: 8896077
    Abstract: An optoelectronic device comprising an optically active layer that includes a plurality of domes is presented. The plurality of domes is arrayed in two dimensions having a periodicity in each dimension that is less than or comparable with the shortest wavelength in a spectral range of interest. By virtue of the plurality of domes, the optoelectronic device achieves high performance. A solar cell having high energy-conversion efficiency, improved absorption over the spectral range of interest, and an improved acceptance angle is presented as an exemplary device.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: November 25, 2014
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Yi Cui, Jia Zhu, Ching-Mei Hsu, Shanhui Fan, Zongfu Yu
  • Patent number: 8895416
    Abstract: Systems and methods for semiconductor device PN junction fabrication are provided. In one embodiment, a method for fabricating an electrical device having a P-N junction comprises: depositing a layer of amorphous semiconductor material onto a crystalline semiconductor base, wherein the crystalline semiconductor base comprises a crystalline phase of a same semiconductor as the amorphous layer; and growing the layer of amorphous semiconductor material into a layer of crystalline semiconductor material that is epitaxially matched to the lattice structure of the crystalline semiconductor base by applying an optical energy that penetrates at least the amorphous semiconductor material.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: November 25, 2014
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Bhushan Sopori, Anikara Rangappan
  • Publication number: 20140339440
    Abstract: The invention relates to an optoelectronic module (112), more particularly to an optoelectronic chip-on-board module (114). The optoelectronic module (112) comprises a substrate (116), wherein the substrate (116) has a planar design. Furthermore, the optoelectronic module (112) comprises a plurality of optoelectronic components (118) that are arranged on the substrate (116). Furthermore, the optoelectronic module (112) comprises a lens system (122) having a plurality of lenses (124). The lens system (122) comprises at least two lenses (124) with different directivities.
    Type: Application
    Filed: July 6, 2012
    Publication date: November 20, 2014
    Applicant: HERAEUS NOBLELIGHT GMBH
    Inventors: Susanne Schadt, Michael Peil, Harald Maiweg, Florin Oswald, Marcus Krauel
  • Publication number: 20140338748
    Abstract: Provided is an optical element for a light-concentrating solar power generation device having excellent weather resistance and also excellent thermal shock resistance and crack resistance, a method for producing the same, and a light-concentrating solar power generation device including the optical element. An optical element for a light-concentrating solar power generation device, the optical element being made of a glass material having a compressive stress at a surface thereof.
    Type: Application
    Filed: October 22, 2012
    Publication date: November 20, 2014
    Inventors: Takahiro Matano, Fumio Sato
  • Publication number: 20140342491
    Abstract: A method for manufacturing a waveguide-type semiconductor device includes the steps of forming an epitaxial structure including a waveguide mesa and a device mesa; forming a mask for selective growth on the epitaxial structure; growing a semiconductor region on an end surface of the device mesa by using the mask for selective growth, the semiconductor region including a side portion having a layer shape and a protruding wall portion; forming an ohmic electrode on a top surface of the device mesa; forming a resin layer on the device mesa and the semiconductor region; forming a resin mask having an opening on the ohmic electrode; forming an electric conductor connecting the ohmic electrode to an electrode pad, the electric conductor passing over the protruding wall portion while making contact with a surface of the resin mask; and removing the resin mask after forming the electric conductor.
    Type: Application
    Filed: May 16, 2014
    Publication date: November 20, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Publication number: 20140341498
    Abstract: A semiconductor electro-optical phase shifter may include a first optical action zone having a minimum doping level, a first lateral zone and a central zone flanking the first optical action zone along a first axis, doped respectively at first and second conductivity types so as to form a P-I-N junction between the first lateral zone and the central zone. The phase shifter may include a second optical action zone having a threshold doping level, and a second lateral zone flanking the second optical action zone with the central zone along the first axis doped at the first conductivity type so as to form a P-I-N junction between the second lateral zone and the central zone.
    Type: Application
    Filed: May 7, 2014
    Publication date: November 20, 2014
    Applicant: STMICROELECTRONICS SA
    Inventor: Jean-Robert MANOUVRIER
  • Patent number: 8890221
    Abstract: A backside illuminated image sensor with an array of image sensor pixels is provided. Each image pixel may include a photodiode and associated pixel circuits formed in a front surface of a semiconductor substrate. Silicon inner microlenses may be formed on a back surface of the semiconductor substrate. In particular, positive inner microlenses may be formed over the photodiodes, whereas negative inner microlenses may be formed over the associated pixel circuits. Buried light shielding structures may be formed over the negative inner microlenses to prevent pixel circuitry that is formed in the substrate between two neighboring photodiodes from being exposed to incoming light. The buried light shielding structures may be lined with absorptive antireflective coating material to prevent light from being reflected off the surface of the buried light shielding structures.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: November 18, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Victor Lenchenkov, Xianmin Yi
  • Patent number: 8889449
    Abstract: A method for producing a group III nitride semiconductor light-emitting device, by which a non-light-emitting region is easily formed, is disclosed. Mg is activated to convert a p-type layer into p-type, and a p-electrode is then formed on the p-type layer. An Ag paste is applied to a region on the p-electrode and overlapping an n-electrode formed in a subsequent step. Heat treatment is conducted to solidify the Ag paste, thereby forming an Ag paste solidified body. By this, a region overlapping the Ag paste solidified body in a planar view, of the p-type layer converts into a region having high resistance, and a high resistance region is formed. As a result, a region overlapping the high resistance region in a planar view, of a light-emitting layer becomes a non-light-emitting region.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: November 18, 2014
    Assignee: Toyoda Gosei Co., Ltd
    Inventors: Masato Aoki, Koichi Goshonoo, Satoshi Wada
  • Patent number: 8890271
    Abstract: Various embodiments for etching of silicon nitride (SixNy) lightpipes, waveguides and pillars, fabricating photodiode elements, and integration of the silicon nitride elements with photodiode elements are described. The results show that the quantum efficiency of the photodetectors (PDs) can be increased using vertical silicon nitride vertical waveguides.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: November 18, 2014
    Assignees: Zena Technologies, Inc., President and Fellows of Harvard College
    Inventors: Turgut Tut, Peter Duane, Young-June Yu, Winnie N. Ye, Munib Wober, Kenneth B. Crozier
  • Publication number: 20140335645
    Abstract: A photoelectric conversion device according to the present invention has a plurality of photoreceiving portions provided in a substrate, an interlayer film overlying the photoreceiving portion, a large refractive index region which is provided so as to correspond to the photoreceiving portion and has a higher refractive index than the interlayer film, and a layer which is provided in between the photoreceiving portion and the large refractive index region, and has a lower etching rate than the interlayer film, wherein the layer of the lower etching rate is formed so as to cover at least the whole surface of the photoreceiving portion. In addition, the layer of the lower etching rate has a refractive index in between the refractive indices of the large refractive index region and the substrate. Such a configuration can provide the photoelectric conversion device which inhibits the lowering of the sensitivity and the variation of the sensitivity among picture elements.
    Type: Application
    Filed: July 24, 2014
    Publication date: November 13, 2014
    Inventor: Sakae Hashimoto
  • Publication number: 20140335644
    Abstract: A method for producing a spot size converter includes the steps of forming a first insulator mask on a stacked semiconductor layer; forming first and second terraces, and a waveguide mesa disposed between the first and second terraces by etching the stacked semiconductor layer using the first insulator mask, the first terrace having first to fourth terrace portions, the second terrace having fifth to eighth terrace portions, the waveguide mesa having first to fourth mesa portions; forming a second insulator mask including a first pattern on the first terrace portion, a second pattern on the fifth terrace portion, a third pattern on the third and fourth mesa portions, and a fourth pattern that integrally covers a region extending from the fourth terrace portion to the eighth terrace portion through the fourth mesa portion; and selectively growing a semiconductor layer by using the second insulator mask.
    Type: Application
    Filed: May 1, 2014
    Publication date: November 13, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoko INOUE, Hideki YAGI, Ryuji MASUYAMA, Yoshihiro YONEDA
  • Patent number: 8884392
    Abstract: Disclosed herein is a method of manufacturing a solid state imaging device, including the steps of: forming a light receiving portion in a light receiving area of a semiconductor substrate; forming a pad portion in a pad area of the semiconductor substrate; forming a microlens material layer over the light receiving portion and the pad portion; providing the microlens material layer with a microlens corresponding to the light receiving portion; forming a low-reflection material layer on the microlens material layer; etching the microlens material layer and the low-reflection material layer over the pad portion to form an opening; and imparting hydrophilicity to a surface of the low-reflection material layer and an inside portion of the opening by a normal temperature oxygen radical treatment.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: November 11, 2014
    Assignee: Sony Corporation
    Inventors: Yoshinori Toumiya, Ina Hori, Tadayuki Dofuku, Hitomi Kamiya, Atsushi Yamamoto, Taichi Natori
  • Patent number: 8884347
    Abstract: The present disclosure provides a method of manufacturing a photoelectric conversion device, including, a first step of forming a plurality of photoelectric conversion regions on a surface on one side of a semiconductor wafer, a second step of preparing a light-blocking wafer having insertion openings, a third step of bonding the one-side surface of the semiconductor wafer and a surface on the opposite side to a surface on the one side of the light-blocking wafer to each other to form a bonded wafer body, and a fourth step of dividing the bonded wafer body in peripheries of the photoelectric conversion regions, to obtain bonded-body chips each having the photoelectric conversion region.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: November 11, 2014
    Assignee: Sony Corporation
    Inventor: Yasuhide Nihei
  • Publication number: 20140327051
    Abstract: An image sensor and a method of manufacturing the image sensor are provided. The image sensor may include a photo detecting device and a charge storage device. The image sensor may further include a trench and a shield which blocks light from being absorbed by the charge storage device. The charge storage device may temporarily store accumulated charges by the photo detecting device.
    Type: Application
    Filed: January 30, 2014
    Publication date: November 6, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung-chak AHN, Yi-tae KIM, Eun-sub SHIM, Kyung-ho LEE
  • Publication number: 20140326298
    Abstract: A heat-rejecting optic comprising an optical element and receiving element or layer with intermediate layer between is provided. Refractive indices of the optical element and receiving element or layer are greater than the intermediate layer. The optic may be part of a concentrator assembly or lens concentrator system for photovoltaic cells. The heat-rejecting optic functions to redirect wavelengths of light for which power conversion by a photovoltaic cell is inefficient and which cause undesirable photovoltaic cell heating and damage, reducing photovoltaic cell life. The receiving element or layer and intermediate layer modify the optical element to frustrate the total internal reflection of light that would otherwise occur within the optical element and divert that light into the receiving element or layer.
    Type: Application
    Filed: December 3, 2013
    Publication date: November 6, 2014
    Applicant: AMONIX, INC.
    Inventors: Aditya Nayak, Geoffrey S. Kinsey
  • Patent number: 8878116
    Abstract: A method of manufacturing a solid-state imaging element includes: manufacturing an element chip in which photoelectric conversion units are arranged on a main surface side; preparing a base configured using a material with an expansion coefficient greater than the element chip and having an opening of which the periphery of the opening is shaped as a flat surface; expanding the base by heating, mounting the element chip on the flat surface of the base in a state where the opening of the base is covered; and three-dimensionally curving a portion corresponding to the opening in the element chip by cooling and contracting the base in a state where the element chip is fixed to the flat surface of the expanded base.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: November 4, 2014
    Assignee: Sony Corporation
    Inventor: Kazuichiro Itonaga
  • Patent number: 8878053
    Abstract: A bipolar solar cell includes a backside junction formed by an N-type silicon substrate and a P-type polysilicon emitter formed on the backside of the solar cell. An antireflection layer may be formed on a textured front surface of the silicon substrate. A negative polarity metal contact on the front side of the solar cell makes an electrical connection to the substrate, while a positive polarity metal contact on the backside of the solar cell makes an electrical connection to the polysilicon emitter. An external electrical circuit may be connected to the negative and positive metal contacts to be powered by the solar cell. The positive polarity metal contact may form an infrared reflecting layer with an underlying dielectric layer for increased solar radiation collection.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: November 4, 2014
    Assignee: SunPower Corporation
    Inventor: Peter John Cousins
  • Publication number: 20140321802
    Abstract: An optical waveguide structure may include an optical waveguide structure located within a semiconductor structure and an optical coupler. The optical coupler may include a metallic structure located within an electrical interconnection region of the semiconductor structure, whereby the metallic structure extends downward in a substantially curved shape from a top surface of the electrical interconnection region and couples to the optical waveguide structure. The optical coupler may further include an optical signal guiding region bounded within the metallic structure, whereby the optical coupler receives an optical signal from the top surface and couples the optical signal to the optical waveguide structure such that the optical signal propagation is substantially vertical at the top surface and substantially horizontal at the optical waveguide structure.
    Type: Application
    Filed: April 29, 2013
    Publication date: October 30, 2014
    Applicant: International Business Machines Corporation
    Inventors: John J. Ellis-Monaghan, Jeffrey P. Gambino, Mark D. Jaffe, Kirk D. Peterson, Jed H. Rankin
  • Publication number: 20140321801
    Abstract: An optical waveguide structure may include a dielectric layer having a top surface, an optical waveguide structure, and an optical coupler embedded within the dielectric layer. The optical coupler may have both a substantially vertical portion that couples to the top surface of the dielectric layer and a substantially horizontal portion that couples to the optical waveguide structure. The substantially vertical portion and the substantially horizontal portion are separated by a curved portion.
    Type: Application
    Filed: April 29, 2013
    Publication date: October 30, 2014
    Applicant: International Business Machnes Corporation
    Inventors: John J. Ellis-Monaghan, Jeffrey P. Gambino, Mark D. Jaffe, Kirk D. Peterson, Jed H. Rankin
  • Patent number: 8871554
    Abstract: A method for fabricating butt-coupled electro-absorptive modulators is disclosed. A butt-coupled electro-absorptive modulator with minimal dislocations in the electro-absorptive material is produced by adding a dielectric spacer for lining the coupling region before epitaxially growing the SiGe or other electro-absorptive material. It has been determined that during the SiGe growth, the current process has exposed single crystal silicon at the bottom of the hole and exposed amorphous silicon on the sides. SiGe growth on the amorphous silicon is expected to have more dislocations than single crystal silicon. There should also be dislocations or fissures where the SiGe growth from the each nucleation source finally join. Thus, a dielectric sidewall can protect an exposed waveguide face from any etching from an aggressive surface preparation prior to epi growth.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: October 28, 2014
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Craig M. Hill, Andrew T. S. Pomerene
  • Publication number: 20140312443
    Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector and a CMOS device may include forming the CMOS device on a first silicon-on-insulator region, forming a silicon optical waveguide on a second silicon-on-insulator region, and forming a shallow trench isolation (STI) region surrounding the silicon optical waveguide such that the shallow trench isolation electrically isolates the first and second silicon-on-insulator region. Within the STI region, a germanium material is deposited adjacent an end facet of the semiconductor optical waveguide. The germanium material forms an active region that receives propagating optical signals from the end facet of the semiconductor optical waveguide.
    Type: Application
    Filed: April 23, 2013
    Publication date: October 23, 2014
    Applicant: International Business Machines Corportion
    Inventors: SOLOMON ASSEFA, WILLIAM M. GREEN, STEVEN M. SHANK, YURII A. VLASOV
  • Patent number: 8866005
    Abstract: A new solar cell structure called a heterojunction barrier solar cell is described. As with previously reported quantum-well and quantum-dot solar cell structures, a layer of narrow band-gap material, such as GaAs or indium-rich InGaP, is inserted into the depletion region of a wide band-gap PN junction. Rather than being thin, however, the layer of narrow band-gap material is about 400-430 nm wide and forms a single, ultrawide well in the depletion region. Thin (e.g., 20-50 nm), wide band-gap InGaP barrier layers in the depletion region reduce the diode dark current. Engineering the electric field and barrier profile of the absorber layer, barrier layer, and p-type layer of the PN junction maximizes photogenerated carrier escape. This new twist on nanostructured solar cell design allows the separate optimization of current and voltage to maximize conversion efficiency.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: October 21, 2014
    Assignee: Kopin Corporation
    Inventor: Roger E. Welser
  • Patent number: 8866708
    Abstract: An LED switch device and a matrix thereof are disclosed. There is an electroluminescent semiconductor element with a first polarity contact and a second polarity contact. There is also a first polarity LED lead frame, to which the electroluminescent semiconductor element is mounted. The first polarity contact of the electroluminescent semiconductor element is electrically connected to the first polarity LED lead frame. The LED switch device has a second polarity LED lead frame electrically connected to the second polarity contact of the electroluminescent semiconductor element. The LED switch device also has a touch sensor lead frame that is electrically connected to a touch sensor lead.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: October 21, 2014
    Inventor: Peter Sui Lun Fong
  • Patent number: 8859889
    Abstract: A solar cell element is disclosed. The solar cell element comprises a semiconductor substrate, a first electrode, a second electrode, a first wiring member and a second wiring member. The semiconductor substrate with a first surface and a second surface comprises a plurality of through-holes. The first electrode comprises a plurality of conduction portions and at least one first output extracting portion. The second electrode has a resistivity of less than 2.5×10-8 ?m (ohm-meter). The first wiring member comprises a first end face in a long direction thereof. The second wiring member comprises a second end face in a long direction thereof facing the first end face.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: October 14, 2014
    Assignee: KYOCERA Corporation
    Inventor: Koutarou Umeda
  • Patent number: 8859319
    Abstract: Methods of forming photo detectors are provided. The method includes providing a semiconductor layer on a substrate, forming a trench in the semiconductor layer, forming a first single crystalline layer and a second single crystalline layer using a selective single crystalline growth process in the trench, and patterning the first and second single crystalline layers and the semiconductor layer to form a first single crystalline pattern, a second single crystalline pattern and an optical waveguide.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: October 14, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Hoon Kim, Gyungock Kim, In Gyoo Kim, JiHo Joo, Ki Seok Jang
  • Publication number: 20140300788
    Abstract: A solid-state imaging sensor which has a first face and a second face, and includes an image sensing region and an electrode region, comprising a first portion including an insulating member and a wiring pattern, a second portion including a plurality of photoelectric conversion portions in the image sensing region, and a third portion including a plurality of microlenses in the image sensing region, wherein an opening is formed on the side of the first face in the electrode region so as to expose the wiring pattern, and the sensor includes a first film covering the plurality of microlenses, and a second film covering a side face of the opening and exposing part of the wiring pattern in the electrode region, with covering the first film in the image sensing region.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 9, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Yasuhiro Sekine
  • Publication number: 20140302632
    Abstract: Methods and devices that incorporate microlens arrays are disclosed. An image sensor includes a pixel layer and a dielectric layer. The pixel layer has a photodetector portion configured to convert light absorbed by the pixel layer into an electrical signal. The dielectric layer is formed on a surface of the pixel layer. The dielectric layer has a refractive index that varies along a length of the dielectric layer. A method for fabricating an image sensor includes forming an array of microlenses on a surface of the dielectric layer, emitting ions through the array of microlenses to implant the ions in the dielectric layer, and removing the array of microlenses from the surface of the dielectric layer.
    Type: Application
    Filed: May 19, 2014
    Publication date: October 9, 2014
    Applicant: Aptina Imaging Corporation
    Inventors: Giovanni Margutti, Andrea Del Monte
  • Patent number: 8853812
    Abstract: The present invention provides a photodetector which solves the problem of low sensitivity of a photodetector, an optical communication device equipped with the same, and a method for making the photodetector, and a method for making the optical communication device. The photodetector includes a substrate, a lower cladding layer arranged on the substrate, an optical waveguide arranged on the lower cladding layer, an intermediate layer arranged on the optical waveguide, a optical absorption layer arranged on the intermediate layer, a pair of electrodes arranged on the optical absorption layer, and wherein the optical absorption layer includes a IV-group or III-V-group single-crystal semiconductor, and the optical absorption layer absorbs an optical signal propagating through the optical waveguide.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: October 7, 2014
    Assignee: NEC Corporation
    Inventors: Daisuke Okamoto, Junichi Fujikata
  • Patent number: 8852987
    Abstract: A method of manufacturing an image pickup device includes a step of forming a filling member such that the filling member covers a light guiding part and a peripheral part provided in a film. The light guiding part is positioned on an image pickup region of the image pickup device and has openings that correspond to respective photoelectric conversion portions. The peripheral part is positioned on a peripheral region of the image pickup device. The filling member fills in the openings. The method includes a step of processing the filling member. The method includes a step of forming light guiding members, which is performed after the step of processing filling member has been performed, by a polishing process performed on the filling member so that the light guiding part is exposed. The light guiding members are part of the filling member and disposed in the openings.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: October 7, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusuke Tsukagoshi, Tadashi Sawayama, Akihiro Kawano, Sho Suzuki, Takehito Okabe, Masatsugu Itahashi
  • Patent number: 8852974
    Abstract: A method for manufacturing semiconductor light-emitting devices comprising the steps of: providing a multi-layer semiconductor film comprising a surface; roughening the surface of the multi-layer semiconductor film to form a scattering surface; re-growing a semiconductor layer on the scattering surface; and roughening the semiconductor layer to form a sub-scattering portion on the scattering surface; wherein the sub-scattering portion is structurally smaller than the scattering surface.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: October 7, 2014
    Assignee: Epistar Corporation
    Inventors: Chien-Fu Huang, Yi-Ming Chen, Yi-Tang Lai, Chia-Liang Hsu, Tsung-Hsien Yang, Tzu-Chieh Hsu
  • Patent number: 8852969
    Abstract: A wafer-level method of fabricating an opto-electronic component package, in which the opto-electronic component is mounted to a semiconductor wafer having first and second surfaces on opposite sides of the wafer. The method includes etching vias in the first surface of the semiconductor wafer. The first surface and surfaces in the vias are metallized, and the metal is structured to define a thermal pad and to define the anode and cathode contact pads. A carrier wafer is attached on the side of the semiconductor wafer having the first surface, and the semiconductor wafer is thinned from its second surface to expose the metallization in the vias. Metal is provided on the second surface, and the metal is structured to define a die attach pad and additional anode and cathode pads for the opto-electronic component. The opto-electronic component is mounted on the die attach pad and a protective cover is formed over the opto-electronic component.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: October 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jochen Kuhmann
  • Publication number: 20140295610
    Abstract: A method for manufacturing a spectroscopic sensor includes: (a) forming a light receiving element on a semiconductor substrate; (b) forming an angle restricting filter on the semiconductor substrate; and (c) forming a spectroscopic filter on the angle restricting filter. The step (c) of forming a spectroscopic filter includes: (c1) forming a first light transmitting film having a peripheral edge that overlaps a light blocking portion in plan view ox the semiconductor substrate by a lift-off method; and (c2) forming a second light transmitting film at a position spaced apart from the first light transmitting film in plan view of the semiconductor substrate by the lift-off method, the second light transmitting film having a peripheral edge that overlaps the light blocking portion in plan view of the semiconductor substrate.
    Type: Application
    Filed: March 19, 2014
    Publication date: October 2, 2014
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Noriyuki NAKAMURA, Terunao HANAOKA, Kunihiko YANO
  • Publication number: 20140291479
    Abstract: The invention relates to quantum dot and photodetector technology, and more particularly, to quantum dot infrared photodetectors (QDIPs) and focal plane array. The invention further relates to devices and methods for the enhancement of the photocurrent of quantum dot infrared photodetectors in focal plane arrays.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 2, 2014
    Inventors: Xuejun Lu, Guiru Gu, Puminun Vasinajindakaw
  • Publication number: 20140295611
    Abstract: The invention relates to a device for industrially producing photovoltaic concentrator modules which consist of a module frame, a lens pane comprising a plurality of Fresnel lenses, a sensor-carrier pane, and an electric line guide, said device comprising the following features: a) a carriage (30) for retaining a module frame (1) in a tension-free manner by means of clamping elements (31) on the two longitudinal sides and stop elements (37) on the two transverse sides, these clamping elements (31) being adjusted by displacing and rotating a shift rod (32), b) a device (47) for punctually applying acrylic and linearly applying silicone (48) onto the support surfaces of the module frame (1), c) one device for laying the sensor-carrier pane (3) and one for laying the lens pane (2), these panes being conveyed in a tension-free manner using special suction devices (39) and being set down with a centrally-positioned, predetermined contact pressure, d) a device for measuring the position of each pane and for positio
    Type: Application
    Filed: December 6, 2012
    Publication date: October 2, 2014
    Inventors: Markus Schmid, Alexnader Feineis
  • Publication number: 20140290730
    Abstract: A method of manufacturing a buffer layer for a thin film solar cell includes preparing a reaction solution including an ammonia compound, a zinc source, and a sulfur source at a temperature below 70° C.; and immersing a substrate on which an optical absorption layer is formed in the reaction solution. The concentration of the zinc source in the reaction solution is in the range of about 0.01M to about 0.09M.
    Type: Application
    Filed: November 5, 2013
    Publication date: October 2, 2014
    Applicant: SAMSUNG SDI CO., LTD.
    Inventors: Hyun-Chul Kim, Si-Young Cha, Sang-Hyuck Ahn, Jeong-Hoon Kim
  • Patent number: 8846434
    Abstract: A method for manufacturing a micromorph tandem cell is disclosed. The micromorph tandem cell comprises a ?c-Si:H bottom cell and an a-Si:H top cell, an LPCVD ZnO front contact layer and a ZnO back contact in combination with a white reflector. The method comprises the steps of applying an AR—Anti-Reflecting—concept to the micromorph tandem cell; implementing an intermediate reflector in the micromorph tandem cell. The micromorph tandem cell can achieve a stabilized efficiency of 10.6%.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: September 30, 2014
    Assignee: Tel Solar AG
    Inventors: Evelyne Vallat-Sauvain, Daniel Borrello, Julien Bailat, Johannes Meier, Ulrich Kroll, Stefano Benagli, Castens Lucie, Giovanni Monteduro, Miguel Marmelo, Jochen Hoetzel, Yassine Djeridane, Jerome Steinhauser, Jean-Baptiste Orhan
  • Patent number: 8847215
    Abstract: An organic light-emitting diode includes an anode on a substrate; a first hole transporting layer on the anode; a second hole transporting layer on the first hole transporting layer and corresponding to the red and green pixel areas; a first emitting material pattern of a first thickness on the second hole transporting layer and corresponding to the red pixel area; a second emitting material pattern of a second thickness on the second hole transporting layer and corresponding to the green pixel area; a third emitting material pattern of a third thickness on the first hole transporting layer and corresponding to the blue pixel area; an electron transporting layer on the first, second and third emitting material patterns; and a cathode on the electron transporting layer, wherein the second thickness is less than the first thickness and greater than the third thickness.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: September 30, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Jin-Ho Park, Kwang-Hyun Kim, Min-Na Kim
  • Patent number: 8846435
    Abstract: An integrated die-level camera system and method of making the camera system include a first die-level camera formed at least partially in a die. A second die level camera is also formed at least partially in the die. Baffling is formed to block stray light between the first and second die-level cameras.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: September 30, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Dennis Gallagher, Adam Douglas Greengard, Paulo E. X. Silveira, Chris Linnen, Vlad V. Chumanchenko, Jungwon Aldinger
  • Patent number: 8847258
    Abstract: The invention relates to an organic electroluminescent device (1) comprising a substrate (2), at least one electroluminescent layer stack on top of the substrate (2) with at least a substrate electrode (3), a counter electrode (5) and at least one organic electroluminescent layer (4) arranged between substrate electrode (2) and counter electrode (5), and a short prevention layer (6) covering the counter electrode (5) establishing a double layer (DL) with a tensile stress (TS) induced by the short prevention layer (5), and an electrically isolating layer (8) at least partly covering the short prevention layer (6), wherein the electrically isolating layer (8) is suitable to partially dissolve the organic layer (4) in the vicinity of a defect (7) within the electroluminescent layer stack and the tensile stress (TS) induced by the short prevention layer (6) is suitable to roll up (10) the double layer (DL) adjacent to the defect (7) after deposition of the electrically isolating layer (8).
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: September 30, 2014
    Assignee: Koninklijke Philips N.V.
    Inventor: Herbert F. Boerner
  • Patent number: 8841158
    Abstract: A solid-state image pick-up device is provided which includes a semiconductor substrate main body which has an element forming layer and a gettering layer provided on an upper layer thereof; photoelectric conversion elements, each of which includes a first conductive type region, provided in the element forming layer; and a dielectric film which is provided on an upper layer of the gettering layer and which induces a second conductive type region in a surface of the gettering layer.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: September 23, 2014
    Assignee: Sony Corporation
    Inventor: Shin Iwabuchi
  • Publication number: 20140264701
    Abstract: A system and method for blocking light from regions around a photodiode in a pixel of an image sensor is provided. In an embodiment a first optical block layer is formed on a first glue layer and a second glue layer is formed on the first optical block layer. The formation of the first optical block layer and the second glue layer is repeated one or more times to form multiple optical block layers and multiple glue layers. As such, if voids open up in the optical block layers during further processing, there is another optical block layer to block any light that may have penetrated through the void.
    Type: Application
    Filed: May 31, 2013
    Publication date: September 18, 2014
    Inventors: Chih-Ho Tai, Po-Jung Chiang, Bo-Chang Su, Chi-Feng Chen, Jung-I Lin
  • Publication number: 20140264685
    Abstract: Among other things, one or more image sensors and techniques for guiding light towards a photodiode are provided. An image sensor comprises a metal grid configured to direct light towards a corresponding photodiode and away from other photodiodes. The image sensor also comprises a dielectric grid and a filler grid over the metal grid to direct light towards the corresponding photodiode and away from other photodiodes, where the filler grid has a different refractive index than the dielectric grid. In this way, crosstalk, otherwise resulting from detection of light by incorrect photodiodes, is mitigated.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventor: Taiwan Semiconductors Manufacturing Company Limited
  • Publication number: 20140264700
    Abstract: Under one aspect of the present invention, a monolithic sun sensor includes a photosensor; a spacer material disposed over the photosensor; and a patterned mask disposed over the spacer material and defining an aperture over the photosensor. The spacer material has a thickness selected such that the patterned mask casts a shadow onto the photosensor that varies as a function of the monolithic sun sensor's angle relative to the sun. The sun sensor may further include a substrate in which the photosensor is embedded or on which the photosensor is disposed. The spacer material may be transparent, and may include a layer of inorganic oxide, or a plurality of layers of inorganic oxide. The patterned mask may include a conductive material, such as a metal. The aperture may be lithographically defined, and may be square. The sun sensor may further include a transparent overlayer disposed over the patterned mask.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: The Aerospace Corporation
    Inventor: Siegfried W. JANSON
  • Publication number: 20140264692
    Abstract: A host substrate assembly includes a first substrate with opposing first and second surfaces, an aperture extending therethrough, circuit layers, and first contact pads electrically coupled to the circuit layers. A sensor chip includes a second substrate with opposing first and second surfaces, a plurality of photo detectors formed on or in the second substrate and configured to receive light incident on the second substrate first surface, and a plurality of second contact pads formed at the second substrate first or second surfaces and are electrically coupled to the photo detectors. A spacer is mounted to the second substrate first surface. A protective substrate is mounted to the spacer and disposed over the photo detectors. Electrically conductive conduits each extend through the spacer and are in electrical contact with one of the second contact pads. Electrical connectors electrically connect the first contact pads and the conduits.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 18, 2014
    Applicant: Optiz, Inc.
    Inventors: Vage Oganesian, Zhenhua Lu
  • Publication number: 20140264696
    Abstract: Among other things, one or more image sensors and techniques for forming such image sensors are provided. An image sensor comprises a photodiode array configured to detect light. The image sensor comprises a calibration region configured to detect a color level for image reproduction, such as a black calibration region configured to detect a black level for an image detected by the photodiode array. The image sensor comprises a dielectric film that is formed over the photodiode array and the calibration region. The dielectric film is configured to balance stress between the photodiode and the calibration region in order to improve accuracy of the calibration region.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Volume Chien, Che-Min Lin, Shiu-Ko JangJian, Chi-Cherng Jeng, Chih-Mu Huang
  • Publication number: 20140268980
    Abstract: A memory chip package includes memory chips stacked, electrically connected one another, and configured to input and output an optical signal through an optical line formed by a via penetrating the memory chips. The memory chips input and output optical signals with different wavelengths, and each of the memory chips has an optical-electrical converter configured to convert an optical signal with a corresponding wavelength into an electrical signal and to convert an electrical signal into an optical signal with the corresponding wavelength.
    Type: Application
    Filed: December 3, 2013
    Publication date: September 18, 2014
    Inventors: JEONG-KYOUM KIM, INDAL SONG, JUNGHWAN CHOI
  • Publication number: 20140264346
    Abstract: In accordance with one implementation, a photodiode may be integrated by thin film processing within a slider. In accordance with another implementation, an apparatus can be configured to include a slider, a first layer of a metal disposed within the slider, a layer of amorphous silicon disposed adjacent the first layer of metal, a second layer of metal disposed adjacent the layer of amorphous silicon, and wherein the first layer of metal, the layer of amorphous silicon, and the second layer of metal are operable as a photodiode.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 18, 2014
    Applicant: Seagate Technology LLC
    Inventors: Ned Tabat, Xiaoyue Huang
  • Publication number: 20140261627
    Abstract: A concentrator-type photovoltaic module includes a backplane substrate, a plurality of concentrator photovoltaic (CPV) receivers on a surface of the backplane substrate, and concentrating optics positioned over the surface of the backplane substrate and configured to focus on-axis incident light onto the CPV receivers. A plurality of non-concentrator photovoltaic (PV) cells are provided on the surface of the backplane substrate. The PV cells are positioned to receive light that passes off-axis through the concentrating optics. Related devices and methods are also discussed.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: Semprius, Inc.
    Inventors: Matthew Meitl, Joseph Carr, Kevin Schneider
  • Patent number: 8835966
    Abstract: A semiconductor light-emitting element (1) is provided which includes a semiconductor layer (10), an n-type electrode (18) which is provided on an exposed surface (12a) of an n-type semiconductor layer, wherein an exposed surface is exposed by removing a part of the semiconductor layer (10), a transparent conductive film which is provided on the semiconductor layer (10) and a p-type electrode (17) which is provided on the transparent conductive film; a light-reflecting layer (39) is provided between the semiconductor layer (10) and the transparent conductive film, wherein at least part of the light-reflecting layer overlaps with the p-type electrode (17) in the planar view; the p-type electrode (17) comprises a pad portion (P) and a linear portion (L) which linearly extends from the pad portion (P) and has an annular structure in the planar view; the n-type electrode (18) exists in an inner area which is surrounded by the linear portion (L) and exists on a straight line (L1) which goes through a center (17a)
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: September 16, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hironao Shinohara, Remi Ohba
  • Patent number: 8835203
    Abstract: An organic light emitting diode (OLED) display and a method for manufacturing the same are provided. The OLED display includes a substrate, an active layer and a capacitor lower electrode positioned on the substrate, a gate insulating layer positioned on the active layer and the capacitor lower electrode, a gate electrode positioned on the gate insulating layer at a location corresponding to the active layer, a capacitor upper electrode positioned on the gate insulating layer at a location corresponding to the capacitor lower electrode, a first electrode positioned to be separated from the gate electrode and the capacitor upper electrode, an interlayer insulating layer positioned on the gate electrode, the capacitor upper electrode, and the first electrode, a source electrode and a drain electrode positioned on the interlayer insulating layer, and a bank layer positioned on the source and drain electrodes.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: September 16, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Hyunho Kim, Seokwoo Lee, Heedong Choi, Sangjin Lee, Seongmoh Seo