Charge Transfer Device (e.g., Ccd, Etc.) Patents (Class 438/75)
  • Publication number: 20130217174
    Abstract: An exposure mask according to an embodiment of the invention includes a first transmission region where a plurality of dots through which light is shielded or transmitted are arrayed into a matrix form having rows and columns and a second transmission region where a plurality of dots through which the light is shielded or transmitted are arrayed into a matrix form having rows and columns and is disposed adjacent to the first transmission region. The dots arrayed in a row or a column of the first transmission region, which is adjacent to the second transmission region, have an area intermediate between areas of dots arrayed on both sides of the row or the column.
    Type: Application
    Filed: April 5, 2013
    Publication date: August 22, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: KABUSHIKI KAISHA TOSHIBA
  • Patent number: 8501520
    Abstract: A manufacturing method for a solid-state image sensor, the method comprises the steps of: forming a charge storage region in a photoelectric converting unit by implanting a semiconductor substrate with ions of an impurity of a first conductivity type, using a first mask; heating the semiconductor substrate at a temperature of no less than 800° C. and no more than 1200° C. through RTA (Rapid Thermal Annealing); forming a surface region of the charge storage region by implanting the semiconductor substrate with ions of an impurity of a second conductivity type, using a second a mask; heating the semiconductor substrate at a temperature of no less than 800° C. and no more than 1200° C. through RTA (Rapid Thermal Annealing); and forming an antireflection film that covers the photoelectric converting unit at a temperature of less than 800° C., after the step of forming the surface region, in this order.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: August 6, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsunori Hirota, Akira Ohtani, Kazuaki Tashiro, Yusuke Onuki, Takanori Watanabe, Takeshi Ichikawa
  • Patent number: 8476102
    Abstract: A method for manufacturing a solid state image pickup device including a first active region provided with a first conversion unit, a second active region provided with a second conversion unit, and a third active region adjoining the first and the second active regions with a field region therebetween and being provided with a pixel transistor, the method including the steps of ion-implanting first conductivity type impurity ions to form a semiconductor region serving as a potential barrier against the signal carriers at a predetermined depth in the third active region and ion-implanting second conductivity type impurity ions into the third active region with energy lower than the above-described ion-implantation energy.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: July 2, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideaki Takada, Toru Koizumi, Yasuo Yamazaki, Tatsuya Ryoki
  • Patent number: 8455294
    Abstract: A method for making the image sensor structure, for avoiding or mitigating lens shading effect. The image sensor structure includes a substrate, a sensor array disposed at the surface of the substrate, a dielectric layer covering the sensor array, wherein the dielectric layer includes a top surface having a dishing structure, an under layer filled into the dishing structure and having a refraction index greater than that of the dielectric layer, a filter array disposed on the under layer corresponding to the sensor array, and a microlens array disposed above the filter array. A top layer may be additionally disposed to cover the filter array and the microlens array is disposed on the top layer.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: June 4, 2013
    Assignee: United Microelectronics Corp.
    Inventor: Cheng-Hung Yu
  • Patent number: 8450780
    Abstract: Disclosed is a solid-state image sensor including a photoelectric converter, a charge detector, and a transfer transistor. The photoelectric converter stores a signal charge that is subjected to photoelectric conversion. The charge detector detects the signal charge. The transfer transistor transfers the signal charge from the photoelectric converter to the charge detector. In the solid-state image sensor, the transfer transistor includes a gate insulating film, a gate electrode formed on the gate insulating film, a first spacer formed on a sidewall of the gate electrode on a side of the photoelectric converter, and a second spacer formed on another sidewall of the gate electrode on a side of the charge detector. The first spacer is longer than the second spacer.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: May 28, 2013
    Assignee: Sony Corporation
    Inventor: Tetsuya Oishi
  • Patent number: 8435823
    Abstract: According to one embodiment, a method of manufacturing a back-illuminated solid-state imaging device including forming a mask with apertures corresponding to a pixel pattern on the surface of a semiconductor layer, implanting second-conductivity-type impurity ions into the semiconductor layer from the front side of the layer to form second-conductivity-type photoelectric conversion parts and forming a part where no ion has been implanted into a pixel separation region, forming at the surface of the semiconductor layer a signal scanning circuit for reading light signals obtained at the photoelectric conversion parts after removing the mask, and removing the semiconductor substrate and a buried insulating layer from the semiconductor layer after causing a support substrate to adhere to the front side of the semiconductor layer.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: May 7, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirofumi Yamashita
  • Patent number: 8427568
    Abstract: Disclosed herein is a solid-state image pickup device, including a pixel, the pixel including: a light receiving section; a charge transfer path; a transfer electrode; a readout gate section; and a readout electrode.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: April 23, 2013
    Assignee: Sony Corporation
    Inventor: Takeshi Takeda
  • Patent number: 8420517
    Abstract: A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron atoms, the substrate comprising a front substrate surface. The method further includes depositing an ink on the front substrate surface in a ink pattern, the ink comprising a set of silicon-containing particles and a set of solvents. The method also includes heating the substrate in a baking ambient to a first temperature and for a first time period in order to create a densified film ink pattern.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: April 16, 2013
    Assignee: Innovalight, Inc.
    Inventors: Giuseppe Scardera, Shihai Kan, Maxim Kelman, Dmitry Poplavskyy
  • Patent number: 8409907
    Abstract: A method for manufacturing a semiconductor device for detecting a physical amount distribution, the semiconductor device comprising unit components arrayed in a predetermined order, the unit components each including a unit signal generation portion for detecting an electromagnetic wave and outputting the corresponding unit signal. A diffraction grating is provided on the incident light side of a spectral image sensor, the diffraction grating including scatterers, slits, and scatterers disposed in that order. An electromagnetic wave is scattered by the scatterers to produce diffracted waves, and by using the fact that interference patterns between the diffracted waves change with wavelengths, signals are detected for respective wavelengths by photoelectric conversion elements in each photodiode group.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: April 2, 2013
    Assignee: Sony Corporation
    Inventors: Atsushi Toda, Hirofumi Sumi
  • Patent number: 8409887
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: April 2, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Soo-Beom Jo, Dong-Hyun Lee, Kil-Won Lee, Maxim Lisachenko, Yun-Mo Chung, Bo-Kyung Choi, Jong-Ryuk Park, Ki-Yong Lee
  • Patent number: 8409909
    Abstract: Image sensors have photodiodes separated by isolations regions formed from p-well or n-well implants. Isolation regions may be formed that are narrow and deep. Isolation regions may be formed in a multi-step process that selectively places implants at desired depths in a substrate. Complementary photoresist patterns may be used. To form an implant near the surface of a substrate, a photoresist pattern with openings over the desired implant area may be used. Subsequent implantation may use a complementary pattern such that ions pass through photoresist before implanting in desired regions of a substrate.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: April 2, 2013
    Assignee: Aptina Imaging Corporation
    Inventor: Satyadev Nagaraja
  • Publication number: 20130076951
    Abstract: There is provided an imaging element including a transmission channel region provided in an optical black pixel region shielded from light from an outside of a semiconductor substrate by a light shielding film, for transmitting a charge existing inside the semiconductor substrate of the optical black pixel region to an outside of the optical black pixel region.
    Type: Application
    Filed: August 13, 2012
    Publication date: March 28, 2013
    Applicant: Sony Corporation
    Inventor: Suzunori ENDO
  • Patent number: 8395194
    Abstract: A solid-state imaging device according to the present invention is of a MOS type and includes a plurality of pixels arranged in rows and columns, and includes: a semiconductor substrate; a photodiode which is formed in the semiconductor substrate and converts, into a signal charge, light that is incident from a first main surface of the semiconductor substrate; a transfer transistor which is formed in a second main surface of the semiconductor substrate and transfers the signal charge converted by the photodiode; a light shielding film which is conductive and formed on a boundary between the pixels, above the first main surface of the semiconductor substrate; an overflow drain region electrically connected to the light shielding film and formed in the first main surface of the semiconductor substrate; and an overflow barrier region formed between the overflow drain region and the photodiode.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Haruhisa Yokoyama, Hiroshi Sakoh, Kazuhiro Yamashita, Mitsuo Yasuhira, Yuichi Hirofuji
  • Patent number: 8389322
    Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of photodiodes (4) are formed in array form on a surface at a side of an n-type silicon substrate (3) onto which light to be detected is made incident and penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with a transparent resin film (6), which covers the formed regions of the photodiodes (4) and transmits the light to be detected, provided at the incidence surface side.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: March 5, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Katsumi Shibayama
  • Patent number: 8383444
    Abstract: A method is provided for determining a color using a CMOS image sensor. The CMOS image sensor includes an n-type substrate and a p-type epitaxy layer overlying the n-type substrate. The method includes applying a first voltage on the n-type substrate and obtaining a first output, which is associated with the first voltage. The method further includes applying a second voltage on the n-type substrate and obtaining a second output, which is associated with the second voltage. The method additionally includes applying a third voltage on the n-type substrate and obtaining a third output, which is associated with the third voltage. The method also includes providing a plurality of weighting factors and determining the color based on the plurality of weighting factors, the first output, the second output, and the third output.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: February 26, 2013
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Hong Zhu, Jim Yang
  • Patent number: 8383443
    Abstract: A non-uniform gate dielectric charge for pixel sensor cells, e.g., CMOS optical imagers, and methods of manufacturing are provided. The method includes forming a gate dielectric on a substrate. The substrate includes a source/drain region and a photo cell collector region. The method further includes forming a non-uniform fixed charge distribution in the gate dielectric. The method further includes forming a gate structure on the gate dielectric.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Andres Bryant, William F. Clark, Jr., John J. Ellis-Monaghan, Edward J. Nowak
  • Patent number: 8383448
    Abstract: A method of fabricating an MOS device is provided. First, gates and source/drain regions of transistors are formed on a substrate. A photodiode doped region and a floating node doped region are formed in the substrate. Thereafter, a spacer stacked layer including a bottom layer, an inter-layer and a top layer is formed to cover each gate of the transistors. Afterwards, a first mask layer having an opening exposing at least the photodiode doped region is formed on the substrate, and then the top layer exposed by the opening is removed. Next, the first mask layer is removed, and then a second mask layer is formed on a region correspondingly exposed by the opening. A portion of the top layer and the inter-layer exposed by the second mask layer is removed to form spacers on sidewalls of the gates.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: February 26, 2013
    Assignee: United Microelectronics Corp.
    Inventor: Ching-Hung Kao
  • Patent number: 8361898
    Abstract: A bonding pad structure for an optoelectronic device. The bonding pad structure includes a carrier substrate having a bonding pad region and an optoelectronic device region. An insulating layer is disposed on the carrier substrate, having an opening corresponding to the bonding pad region. A bonding pad is embedded in the insulating layer under the opening to expose the top surface thereof. A device substrate is disposed on the insulating layer corresponding to the optoelectronic device region. A cap layer covers the device substrate and the insulating layer excluding the opening. A conductive buffer layer is disposed in the opening to directly contact the bonding pad. The invention also discloses a method for fabricating the same.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: January 29, 2013
    Assignee: VisEra Technologies Company Limited
    Inventors: Kai-Chih Wang, Fang-Chang Liu
  • Patent number: 8354292
    Abstract: In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep P+ type well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: January 15, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Je Park, Young-Hoon Park, Ui-Sik Kim, Dae-Cheol Seong, Yeo-Ju Yoon, Bo-Bae Kang
  • Patent number: 8354295
    Abstract: The present disclosure provides methods and apparatus for reducing dark current in a backside illuminated semiconductor device. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside surface and a backside surface, and forming a plurality of sensor elements in the substrate, each of the plurality of sensor elements configured to receive light directed towards the backside surface. The method further includes forming a dielectric layer on the backside surface of the substrate, wherein the dielectric layer is formed to have a compressive stress to induce a tensile stress in the substrate. A backside illuminated semiconductor device fabricated by such a method is also disclosed.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: January 15, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yuer-Luen Tu, Chia-Shiung Tsai, Ching-Chun Wang, Ren-Jie Lin, Shou-Gwo Wuu
  • Publication number: 20130002918
    Abstract: A solid-state imaging apparatus includes a transfer gate electrode formed on a semiconductor substrate; a photoelectric conversion unit including an electric charge storage area that is formed from a surface side of the semiconductor substrate in a depth direction, a transfer auxiliary area formed of a second conductive type impurity area that is formed in such a manner as to partially overlap the transfer gate electrode, and a dark current suppression area that is a first dark current suppression area formed in an upper layer of the transfer auxiliary and formed so as to have positional alignment in such a manner that the end portion of the transfer auxiliary area on the transfer gate electrode side is at the same position as the end portion of the transfer auxiliary area; and a signal processing circuit configured to process an output signal output from the solid-state imaging apparatus.
    Type: Application
    Filed: June 20, 2012
    Publication date: January 3, 2013
    Applicant: SONY CORPORATION
    Inventors: Mikiko Kobayashi, Sanghoon Ha
  • Patent number: 8345134
    Abstract: An Indium Tin Oxide (ITO) gate charge coupled device (CCD) is provided. The CCD device comprises a CCD structure having a substrate layer, an oxide layer over the substrate layer, a nitride layer over the oxide layer and a plurality of parallel ITO gates extending over the nitride layer. The CCD device further comprises a plurality of substantially similarly sized channel stop regions in the substrate layer that extend transversely relative to the ITO gates, such that a given pair of channel stop regions defining a pixel column of the CCD structure. The CCD device also comprises a plurality of vent openings that extend through the nitride layer along the plurality of substantially similarly sized channel stop regions to allow for penetration of hydrogen to at least one of the oxide layer and the substrate layer.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: January 1, 2013
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Joseph T. Smith, Bron R. Frias, Paul A. Tittel, Robert R. Shiskowski, Nathan Bluzer
  • Patent number: 8329499
    Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: December 11, 2012
    Assignee: Truesense Imaging, Inc.
    Inventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
  • Patent number: 8329497
    Abstract: A backside illuminated imaging sensor includes a semiconductor layer and an infrared detecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel includes a photodiode region formed within the semiconductor layer. The infrared detecting layer is disposed above the front surface of the semiconductor layer to receive infrared light that propagates through the imaging sensor from the back surface of the semiconductor layer.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: December 11, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Yin Qian, Howard E. Rhodes, Hsin-Chih Tai, Vincent Venezia, Duli Mao
  • Patent number: 8304776
    Abstract: The present invention relates to a thin film transistor substrate and method for fabricating the same which can secure an alignment margin and reduce the number of mask steps. A thin transistor substrate according to the present invention includes a gate line and a data line crossing each other to define a pixel, a gate metal pattern under the data line, a thin film transistor having a gate electrode, a source electrode and a drain electrode in the pixel, and a pixel electrode connected to the drain electrode of the thin film transistor by a connection electrode, wherein the data line has a plurality of first slits to disconnect the gate metal pattern from the gate line.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: November 6, 2012
    Assignee: LG Display Co., Ltd.
    Inventor: Seung Hee Nam
  • Patent number: 8293561
    Abstract: There is provided an image pickup device, including a photoelectric conversion element converting light into charges, a transfer gate for transferring the converted charges to a floating node, a source follower transistor for outputting a signal based on a voltage of the floating node to a signal line, and a clip circuit clipping the signal line at a first voltage and a second voltage.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: October 23, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Mahito Shinohara
  • Patent number: 8278131
    Abstract: A method and apparatus for operating an imager pixel that includes the act of applying a relatively small first polarity voltage and a plurality of pulses of a second polarity voltage on the gate of a transfer transistor during a charge integration period.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: October 2, 2012
    Assignee: Micron Technology, Inc.
    Inventor: John Ladd
  • Patent number: 8268662
    Abstract: A method of fabricating a complementary metal-oxide-semiconductor (CMOS) image sensor is provided. First, an isolation structure is formed in a substrate with a photo-sensitive region and a transistor device region in the substrate. The transistor device region includes at least a region for forming a transfer transistor. A dielectric layer and a conductive layer are sequentially formed on the substrate. An ion implantation process is performed to implant a dopant into the substrate below the position for forming a gate of the transfer transistor and in the photo-sensitive region through the conductive layer and the dielectric layer. The conductive layer and the dielectric layer are patterned to at least form the gate structure of the transfer transistor on the transistor device region. Thereafter, a photo diode is formed in the substrate in the photo-sensitive region.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: September 18, 2012
    Assignee: United Microelectronics Corp.
    Inventor: Ching-Hung Kao
  • Publication number: 20120231573
    Abstract: A process and structure of a backside illumination (BSI) image sensor are disclosed. An n-type doped region is formed in a substrate, and a transfer gate is formed on top of the semiconductor substrate. A p-type doped region is formed in the n-type doped region either using the transfer gate as a mask or is non-self aligned formed.
    Type: Application
    Filed: May 23, 2012
    Publication date: September 13, 2012
    Applicant: HIMAX IMAGING, INC.
    Inventors: YANG WU, CHI-SHAO LIN
  • Patent number: 8264013
    Abstract: A device separation insulating film and a device separation semiconductor layer are provided for a device separation section for separating adjacent devices from each other, end portions of the device separation insulating film and end portions of the device separation semiconductor layer are provided to overlap each other in order to surround two sides of an outer-periphery of the voltage conversion section and also to surround a channel section of the charge transfer device and the light receiving devices and an end portion of the device separation insulating film facing an end face of the light receiving device is arranged inwardly below a control electrode with respect to an end face of the control electrode on the light receiving device side.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: September 11, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tomohiko Kawamura
  • Patent number: 8247258
    Abstract: A method for fabricating CMOS image sensor device includes providing a P-type semiconductor substrate. The semiconductor substrate includes a surface region. The method includes forming a first dielectric layer having a first thickness overlying a first region of the semiconductor substrate. The method includes providing an N type impurity region in a portion of the semiconductor substrate underneath the first dielectric layer to cause formation of a photodiode device region characterized by at least the N type impurity region and the P type substrate. A second dielectric layer having a second thickness is formed in a second region of the surface region. The second dielectric layer is formed within a portion of the first region within the first thickness of the first dielectric layer. The method includes forming a polysilicon gate layer overlying at least the second region to form a contact member coupled to the second region.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jianping Yang, Hong Zhu, Jieguang Huo
  • Patent number: 8241942
    Abstract: A method of fabricating a back-illuminated image sensor that includes the steps of providing a first substrate of a semiconductor layer, in particular a silicon layer, forming electronic device structures over the semiconductor layer and, only then, doping the semiconductor layer. By doing so, improved dopant profiles and electrical properties of photodiodes can be achieved such that the final product, namely an image sensor, has a better quality.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: August 14, 2012
    Assignee: Soitec
    Inventors: Konstantin Bourdelle, Carlos Mazure
  • Patent number: 8232580
    Abstract: A semiconductor device includes a photodiode formed using a silicon substrate, a wide-bandgap semiconductor layer formed on the silicon substrate and having a bandgap larger than that of silicon, and a switching element formed using the wide-bandgap semiconductor layer. The switching element is electrically connected to the photodiode so as to be on/off-controlled by a control signal from the photodiode.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: July 31, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshiaki Nozaki
  • Patent number: 8232133
    Abstract: An image sensor includes a semiconductor layer that filters light of different wavelengths. For example, the semiconductor layer absorbs photons of shorter wavelengths and passes more photons of longer wavelengths such that the longer wavelength photons often pass through without being absorbed. An imaging pixel having a photodiode is formed near a front side of the semiconductor layer. A dopant layer is formed below the photodiode near a back side of the semiconductor layer. A mirror that primarily reflects photons of longer visible wavelengths is disposed on the back side of the semiconductor layer.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: July 31, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Howard E. Rhodes, Hidetoshi Nozaki
  • Patent number: 8217431
    Abstract: A solid-state image pickup device for preventing crosstalk between adjacent pixels by providing an overflow barrier at the deep potion of a substrate. A partial P type region is provided at the predetermined position of a lower layer region of the vertical transfer register and a channel stop region. This P type region adjusts potential in the lower layer region of the vertical transfer register and the channel stop region. Accordingly, since the potential in the lower layer region of the vertical transfer register and the channel stop region at both sides of the lower layer region is low, electric charges photoelectrically-converted by the sensor region are blocked by this potential barrier and cannot be diffused easily.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: July 10, 2012
    Assignee: Sony Corporation
    Inventors: Kazushi Wada, Kouichi Harada, Shuji Otsuka, Mitsuru Sato
  • Publication number: 20120154650
    Abstract: A solid-state image sensor includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type that is arranged to contact a lower face of the first semiconductor region and functions as a charge accumulation region, a third semiconductor region including side faces surrounded by the second semiconductor region, a fourth semiconductor region of the second conductivity type that is arranged apart from the second semiconductor region, and a transfer gate that forms a channel to transfer charges accumulated in the second semiconductor region to the fourth semiconductor region. The third semiconductor region is one of a semiconductor region of the first conductivity type and a semiconductor region of the second conductivity type whose impurity concentration is lower than that in the second semiconductor region.
    Type: Application
    Filed: November 30, 2011
    Publication date: June 21, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Patent number: 8198121
    Abstract: A method of manufacturing a solid-state imaging device. Light-receiving sensor portions each constituting a pixel in the form of a matrix is arranged. The matrix has columns aligned in a vertical direction and rows aligned in a horizontal direction. Charge-transfer portions are formed on either side of the columns of said pixels. Transfer electrodes in said charge-transfer portions are formed to include a first transfer electrode formed of a first electrode layer and a second transfer electrode formed by electrically connecting the first electrode layer and a second electrode layer through a contact. The second transfer electrode being disposed in the vertical direction above the charge-transfer portion in a vicinity of the contact to decrease the width of the charge-transfer portions in the horizontal direction and increase the light receiving sensor portions in the vertical direction.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: June 12, 2012
    Assignee: Sony Corporation
    Inventor: Hideo Kanbe
  • Patent number: 8187910
    Abstract: A method for manufacturing a semiconductor device that includes a semiconductor substrate, the method comprises: a first irradiation step of irradiating a first irradiated region with a focused ion beam so as to selectively remove a first portion corresponding to the first irradiated region of the wiring pattern, the first irradiated region being positioned on an inner side of a short defect portion of the wiring pattern in a direction along a plane parallel to the principal surface; and a second irradiation step of, after the first irradiation step, irradiating a second irradiated region with a focused ion beam so as to remove a second portion corresponding to the second irradiated region of the wiring pattern, the second irradiated region including a region that is positioned on an outer side of the short defect portion in the direction along the plane parallel to the principal surface.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: May 29, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kouhei Hashimoto, Masatsugu Itahashi
  • Publication number: 20120122267
    Abstract: A vertically-integrated image sensor is proposed with the performance characteristics of single crystal silicon but with the area coverage and cost of arrays fabricated on glass. The image sensor can include a backplane array having readout elements implemented in silicon-on-glass, a frontplane array of photosensitive elements vertically integrated above the backplane, and an interconnect layer disposed between the backplane array and the image sensing array. Since large area silicon-on-glass backplanes are formed by tiling thin single-crystal silicon layers cleaved from a thick silicon wafer side-by-side on large area glass gaps between the tiled silicon backplane would normally result in gaps in the image captured by the array. Therefore, embodiments further propose that the pixel pitch in both horizontal and vertical directions of the frontplane be larger than the pixel pitch of the backplane, with the pixel pitch difference being sufficient that the frontplane bridges the gap between backplane tiles.
    Type: Application
    Filed: January 25, 2012
    Publication date: May 17, 2012
    Inventor: Timothy J. Tredwell
  • Publication number: 20120115270
    Abstract: Disclosed herein is a solid-state image pickup device including: a photoelectric conversion section configured to convert incident light into a signal charge; a transfer transistor configured to read the signal charge from the photoelectric conversion section and transfer the signal charge; and an amplifying transistor configured to amplify the signal charge read by the transfer transistor, wherein a compressive stress film having a compressive stress is formed on the amplifying transistor.
    Type: Application
    Filed: December 22, 2011
    Publication date: May 10, 2012
    Applicant: SONY CORPORATION
    Inventor: Shinichi Arakawa
  • Patent number: 8173476
    Abstract: There is provided an image pickup device, including a photoelectric conversion element converting light into charges, a transfer gate for transferring the converted charges to a floating node, a source follower transistor for outputting a signal based on a voltage of the floating node to a signal line, and a clip circuit clipping the signal line at a first voltage and a second voltage.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: May 8, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Mahito Shinohara
  • Publication number: 20120097838
    Abstract: An imaging device may be formed in a semiconductor substrate including a matrix array of photosites extending in a first direction and a second direction. The imaging device may include a transfer module configured to transfer charge in the first direction and an extraction module configured to extract charge in the second direction.
    Type: Application
    Filed: September 22, 2011
    Publication date: April 26, 2012
    Applicant: STMicroelectronics (Rousset ) SAS
    Inventor: François ROY
  • Patent number: 8163588
    Abstract: A manufacturing method of a photoelectric conversion device included a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: April 24, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Mineo Shimotsusa, Hiroaki Naruse
  • Patent number: 8164668
    Abstract: A photoelectric conversion device includes an isolation portion defining an active region, a photoelectric converter arranged in the active region and including a charge accumulation region containing an impurity of a first conductivity type, a charge voltage converter arranged in the active region, and a transfer electrode arranged on the active region and configured to form a channel to transfer charges generated by the photoelectric converter to the charge voltage converter. In addition, a first semiconductor region is arranged in the active region between the photoelectric converter and the charge voltage converter and is covered with the transfer electrode and contains the impurity of the first conductivity type at a concentration lower than that in the charge accumulation region. A second semiconductor region extends in the active region along an interface of the isolation portion facing at least the first semiconductor region and is of a second conductivity type.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: April 24, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Satoko Iida, Mahito Shinohara
  • Patent number: 8154097
    Abstract: An image sensor and a method of manufacturing the same are provided. The image sensor includes a substrate having a sensor array area and a peripheral circuit area a first insulating film structure formed on the peripheral circuit area and including a plurality of first multi-layer wiring lines and a second insulating film structure formed on the sensor array area and including a plurality of second multi-layer wiring lines. The uppermost-layer wiring line of the plurality of first multi-layer wiring lines is higher than that of the uppermost-layer wiring line of the plurality of second multi-layer wiring lines. The first insulating film structure includes an isotropic etch-stop layer, and the second insulating film structure does not include the isotropic etch-stop layer.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: April 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Ki Kim, Duck-Hyung Lee, Hyun-Pil Noh
  • Patent number: 8124440
    Abstract: A method for making a solid-state imaging device includes forming a pinning layer, which is a P-type semiconductor layer or an N-type semiconductor layer, on a first substrate by deposition; forming a semiconductor layer on the pinning layer; forming a photoelectric conversion unit in the semiconductor layer, the photoelectric conversion unit being configured to convert incident light into an electrical signal; forming, on the semiconductor layer, a transistor of a pixel unit and a transistor of a peripheral circuit unit disposed in the periphery of the pixel unit, and then forming a wiring section on the semiconductor layer; bonding a second substrate on the wiring section; and removing the first substrate after the second substrate is bonded.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: February 28, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuya Ikuta, Yuki Miyanami
  • Patent number: 8124439
    Abstract: A method for making an optical device with integrated optoelectronic components, including a) making a protective structure including a support in which at least one blind hole is made, an optical element being positioned in the blind hole, b) attaching the support to a substrate including the integrated optoelectronic components, the blind hole forming a cavity in which the optical element faces one of the optoelectronic components, c) achieving thinning of the substrate and making electric connections through the substrate, and d) making an aperture through the bottom wall of the blind hole, uncovering at least one portion of the optical field of the optical element.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: February 28, 2012
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventor: Sebastien Bolis
  • Patent number: 8119444
    Abstract: An image sensor and a method of manufacturing an image sensor. An image sensor may include a semiconductor substrate which may include a readout circuitry. An image sensor may include an interlayer dielectric over a semiconductor substrate, and/or a first metal pattern over an interlayer dielectric. An interconnection may penetrate an interlayer dielectric and/or may be connected to a readout circuitry. A first metal pattern may be formed over an interlayer dielectric, and/or may be connected to an interconnection. A second metal pattern may be formed over a first metal pattern. A photodiode pattern may be formed over a second metal pattern.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: February 21, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Min-Hyung Lee
  • Patent number: 8119436
    Abstract: An image sensor and a method for manufacturing the same are disclosed. The image sensor can include a semiconductor substrate that includes photodiodes arranged for each unit pixel; an interlayer dielectric layer and metal wirings disposed on the semiconductor substrate; and a photorefractive unit that is formed on the periphery of an optical path incident on the photodiodes. The photorefractive unit has a lower refractive index than the interlayer dielectric layer. The slantly incident light can be incident on the photodiodes, while maintaining the slanted optical path as it is. The light sensitivity of the photodiodes can be improved, thereby improving image quality.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: February 21, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Seung Ryong Park
  • Patent number: 8114694
    Abstract: A method of manufacturing a back side illumination image sensor according to an embodiment includes: forming an ion implantation layer by implanting ions throughout the front side of a first substrate; defining a pixel region by forming a device isolation region on the front side of the first substrate; forming a photosensitive device and a readout circuit on the pixel region; forming an interlayer dielectric layer and a metal line on the front side of the first substrate; bonding a second substrate with the front side of the first substrate where the metal line is formed; removing a lower part of the first substrate under the ion implantation layer; applying wet etching to a back side of the first substrate after removing the lower part; and forming a microlens on the photosensitive device at the back side of the first substrate.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: February 14, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Mun Hwan Kim