Abstract: A method includes performing an anneal on a wafer. The wafer includes a wafer-edge region, and an inner region encircled by the wafer-edge region. During the anneal, a first power applied on a portion of the wafer-edge region is at least lower than a second power for annealing the inner region.

Abstract: An annealing method to reduce defects of epitaxial films and epitaxial films formed therewith. The annealing method includes features as follows: apply a pressure ranged from 10 MPa to 6,000 MPa to an epitaxial film grown on a substrate through a vapor phase deposition process and heat the epitaxial film at a temperature lower than the melting temperature of the epitaxial film. Through applying pressure to the epitaxial film, the lattice strain of the epitaxial film is alleviated, and therefore the defect density of the epitaxial film also decreases.

Abstract: A method of annealing a semiconductor and a semiconductor. The method of annealing including heating the semiconductor to a first temperature for a first period of time sufficient to remove physically-adsorbed water from the semiconductor and heating the semiconductor to a second temperature, the second temperature being greater than the first temperature, for a period of time sufficient to remove chemically-adsorbed water from the semiconductor. A semiconductor device including a plurality of metal conductors, and a dielectric including regions separating the plurality of metal conductors, the regions including an upper interface and a lower bulk region, the upper interface having a density greater than a density of the lower bulk region.

Abstract: An oxide or nitride semiconductor layer is formed over a substrate. A first conductive layer including a first element and a second element, and a second conductive layer including the second element are formed over the semiconductor layer. The first element is oxidized or nitrogenized near an interface region between the first conductive layer and the oxide or nitride semiconductor layer by heat treatment or laser irradiation. The Gibbs free energy of oxide formation of the first element is lower than those of the second element or any element in the oxide or nitride semiconductor layer.

Abstract: A method for making a semiconductor device including the steps of exposing a semiconductor substrate to a process step or sequence of process steps of which at least one process performance parameter is determined in a region of the semiconductor substrate, and irradiating the region with a laser having laser irradiation parameters; wherein the irradiation parameters are determined based on the at least one process performance parameter.

Abstract: Disclosed is a device for vacuum processing that performs vapor-deposition on a substrate being heated in a vacuum chamber; the device, wherein the chamber has a light transmissible window formed in a section of the chamber; the light transmissible window and a holding part holding the substrate are connected by a linear space isolated from other parts in the chamber; a laser emitter is installed outside the light transmissible window; and the laser emitter emits a laser beam to the substrate through the linear space, thereby heating the substrate. This device enables laser heating, eliminating conventional drawbacks such as a decrease in laser output.

Abstract: An object of the present invention is to provide an SOI substrate including a semiconductor layer which is efficiently planarized. A method for manufacturing an SOI substrate includes a step of irradiating a bond substrate with an accelerated ion to form an embrittlement region; a step of bonding the bond substrate and the base substrate with an insulating layer positioned therebetween; a step of splitting the bond substrate at the embrittlement region to leave a semiconductor layer bonded to the base substrate; a step of disposing the semiconductor layer in front of a semiconductor target containing the same semiconductor material as the semiconductor layer; and a step of alternately irradiating the surface of the semiconductor layer and the semiconductor target with a rare gas ion, so that the surface of the semiconductor layer is planarized.

Abstract: A method for depositing material on a substrate is described. The method comprises directionally depositing a thin film on one or more surfaces of a substrate using a gas cluster ion beam (GCIB) formed from a source of precursor to the thin film, wherein the deposition occurs on surfaces oriented substantially perpendicular to the direction of incidence of the GCIB, and deposition is substantially avoided on surfaces oriented substantially parallel to the direction of incidence.

Abstract: Disclosed herein are a method for fabricating an organic thin film transistor, including treating the surfaces of a gate insulating layer and source/drain electrodes with a self-assembled monolayer (SAM)-forming compound through a one-pot reaction, and an organic thin film transistor fabricated by the method. According to example embodiments, the surface-treatment of the gate insulating layer and the source/drain electrodes may be performed in a single vessel through a single process.

Abstract: Embodiments of the present invention pertain to substrate processing equipment and methods incorporating light sources which provide independent control of light pulse duration, shape and repetition rate. Embodiments further provide rapid increases and decreases in intensity of illumination.

Abstract: A crystallization method is disclosed. In one embodiment, the method includes providing a substrate having an amorphous silicon layer, wherein the substate has first and second sides opposing each other and irradiating a laser beam onto the substrate so as to have an inclined angle with respect to the first and second sides of the substrate. The method further includes relatively moving one of the laser beam and the substate with respect to the other i) in a first direction from the first side to the second side of the substate and ii) in a second direction which crosses the first direction.

Abstract: A method of cleaving a substrate and a method of manufacturing a bonded substrate using the same, in which warping in a cleaved substrate is reduced. The method includes the following steps of: forming an ion implantation layer by implanting ions into a substrate; annealing the substrate in which the ion implantation layer is formed; implanting ions again into the ion implantation layer of the substrate; and cleaving the substrate along the ion implantation layer by heating the substrate into which ions are implanted.

Abstract: A semiconductor device includes a plurality of active areas disposed on a semiconductor substrate. A manufacturing method of the semiconductor device includes performing a first annealing process on the semiconductor substrate by emitting a first laser alone a first scanning direction, and performing a second annealing process on the semiconductor substrate by emitting a second laser alone a second scanning direction. The first scanning direction and the second scanning direction have an incident angle.

Abstract: It is an object of the present invention to provide a manufacturing method of a semiconductor device where a semiconductor element is prevented from being damaged and throughput speed thereof is improved, even in a case of thinning or removing a supporting substrate after forming the semiconductor element over the supporting substrate.

Abstract: Processing a workpiece with a laser includes generating laser pulses at a first pulse repetition frequency. The first pulse repetition frequency provides reference timing for coordination of a beam positioning system and one or more cooperating beam position compensation elements to align beam delivery coordinates relative to the workpiece. The method also includes, at a second pulse repetition frequency that is lower than the first pulse repetition frequency, selectively amplifying a subset of the laser pulses. The selection of the laser pulses included in the subset is based on the first pulse repetition frequency and position data received from the beam positioning system. The method further includes adjusting the beam delivery coordinates using the one or more cooperating beam position compensation elements so as to direct the amplified laser pulses to selected targets on the workpiece.

Abstract: A method of crystallizing a silicon layer and a method of manufacturing a TFT, the method of crystallizing a silicon layer including forming a catalyst metal layer on a substrate; forming a catalyst metal capping pattern on the catalyst metal layer; forming a second amorphous silicon layer on the catalyst metal capping pattern; and heat-treating the second amorphous silicon layer to form a polycrystalline silicon layer.

Abstract: Provided are a crystallization apparatus and method, which prevent cracks from being generated, a method of manufacturing a thin film transistor (TFT), and a method of manufacturing an organic light emitting display apparatus. The crystallization apparatus includes a chamber for receiving a substrate, a first flash lamp and a second flash lamp, which are disposed facing each other within the chamber, wherein amorphous silicon layers are disposed on a first surface of the substrate facing the first flash lamp and a second surface of the substrate facing the second flash lamp, respectively.

Abstract: A system for configuring and utilizing J electromagnetic radiation sources (J?2) to serially irradiate a substrate. Each source has a different function of wavelength and angular distribution of emitted radiation. The substrate includes a base layer and I stacks (I?2; J?I) thereon. Pj denotes a same source-specific normally incident energy flux on each stack from source j. In each of I independent exposure steps, the I stacks are concurrently exposed to radiation from the J sources. Vi and Si respectively denote an actual and target energy flux transmitted into the substrate via stack i in exposure step i (i=1, . . . , I). t(i) and Pt(i) are computed such that: Vi is maximal through deployment of source t(i) as compared with deployment of any other source for i=1, . . . , I; and an error E being a function of |V1?S1|, |V2?S2|, . . . , |VI?SI| is about minimized with respect to Pi (i=1, . . . , I).

Abstract: A treatment apparatus uses an inductive heating method to allow an object to be heated while preventing a treatment chamber from being heated. The treatment apparatus for performing a heat treatment on the object has a treatment chamber and an induction heating coil section. The treatment chamber is capable of accommodating a plurality of objects. The induction heating coil section is wound around an outer circumference of the treatment chamber. The treatment apparatus also has a high frequency power supply and a gas supply unit. The high frequency power supply applies high frequency power to the induction heating coil section. The gas supply unit introduces a necessary gas to the treatment chamber. A holding unit is inserted in and removed from the treatment chamber under the condition that the holding unit holds the object and an induction heating generator adapted to be inductively heated by means of a high frequency wave emitted by the induction heating coil section.

Abstract: A substrate processing apparatus capable of increasing the life span of a lamp for heating a substrate is provided. The substrate processing apparatus includes: a light receiving chamber for processing a substrate; a substrate support unit inside the light receiving chamber; a lamp including an electrical wire, and a seal accommodating the electrical wire to hermetically seal the lamp with a gas therein, the lamp irradiating the substrate with a light; a lamp receiving unit outside the light receiving chamber to accommodate the lamp therein, the lamp receiving unit including a lamp connector connected to the lamp to supply an electric current through the electrical wire, a heat absorption member including a material having a thermal conductivity higher than that of the seal, and a base member fixing the heat absorption member; and an external electrical wire connected to the lamp connector to supply current to the lamp connector.

Abstract: A system for preparing a semiconductor film, the system including: a laser source; optics to form a line beam, a stage to support a sample capable of translation; memory for storing a set of instructions, the instructions including irradiating a first region of the film with a first laser pulse to form a first molten zone, said first molten zone having a maximum width (Wmax) and a minimum width (Wmin), wherein the first molten zone crystallizes to form laterally grown crystals; laterally moving the film in the direction of lateral growth a distance greater than about one-half Wmax less than Wmin; and irradiating a second region of the film with a second laser pulse to form a second molten zone, wherein the second molten zone crystallizes to form laterally grown crystals that are elongations of the crystals in the first region, wherein laser optics provide less than 2×Wmin.

Abstract: When forming the strain-inducing semiconductor alloy in one type of transistor of a sophisticated semiconductor device, superior thickness uniformity of a dielectric cap material of the gate electrode structures may be achieved by forming encapsulating spacer elements on each gate electrode structure and providing an additional hard mask material. Consequently, in particular, in sophisticated replacement gate approaches, the dielectric cap material may be efficiently removed in a later manufacturing stage, thereby avoiding any irregularities upon replacing the semiconductor material by an electrode metal.

Abstract: A semiconductor-on-insulator substrate and a related semiconductor structure, as well as a method for fabricating the semiconductor-on-insulator substrate and the related semiconductor structure, provide for a multiple order radio frequency harmonic suppressing region located and formed within a base semiconductor substrate at a location beneath an interface of a buried dielectric layer with the base semiconductor substrate within the semiconductor-on-insulator substrate. The multiple order radio frequency harmonic suppressing region may comprise an ion implanted atom, such as but not limited to a noble gas atom, to provide a suppressed multiple order radio frequency harmonic when powering a radio frequency device, such as but not limited to a radio frequency complementary metal oxide semiconductor device (or alternatively a passive device), located and formed within and upon a surface semiconductor layer within the semiconductor structure.

Abstract: Equivalent oxide thickness (EOT) scaled high k/metal gate stacks are provided in which the capacitance bottleneck of the interfacial layer is substantially eliminated, with minimal compromise on the mobility of carriers in the channel of the device. In one embodiment, the aforementioned EOT scaled high k/metal gate stacks are achieved by increasing the dielectric constant of the interfacial layer to a value that is greater than the originally formed interfacial layer, i.e., the interfacial layer prior to diffusion of a high k material dopant element therein. In another embodiment, the aforementioned scaled high k/metal gate stacks are achieved by eliminating the interfacial layer from the structure. In yet another embodiment, the aforementioned high k/metal gate stacks are achieved by both increasing the dielectric constant of the interfacial layer and reducing/eliminating the interfacial layer.

Abstract: Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation.

Abstract: The present invention related to a method for manufacturing a semiconductor, comprising steps of: providing a growing substrate; forming on the growing substrate to have plural grooves; forming a semiconductor element layer on the growing substrate; and changing the temperature of the growing substrate and the semiconductor element layer so as to separate the semiconductor element layer from the growing substrate.

Abstract: In a method for fracturing or mask data preparation or mask process correction for charged particle beam lithography, a plurality of shots are determined that will form a pattern on a surface, where shots are determined so as to reduce sensitivity of the resulting pattern to changes in beam blur (?f). At least some shots in the plurality of shots overlap other shots. In some embodiments, ?f is reduced by controlling the amount of shot overlap in the plurality of shots, either during initial shot determination, or in a post-processing step. The reduced sensitivity to ?f expands the process window for the charged particle beam lithography process.

Abstract: A fiber laser system enables a method for treating a semiconductor material by preheating a wafer for laser annealing and gas immersion laser doping by a laser source. A long wave length fiber laser having a Gaussian or similar profile is applied in a full-width ribbon beam across an incident wafer. Preferably the wavelength is greater than 1 ?m (micron) and preferably a Yb doped fiber laser is used. The process is performed in a suitable environment which may include doping species. The process ensures the temperature gradient arising during processing does not exceed a value that results in fracture of the wafer while also reducing the amount of laser radiation required to achieve controlled surface melting, recrystallization and cooling.

Abstract: A method of forming a high k gate stack on a surface of a III-V compound semiconductor, such GaAs, is provided. The method includes subjecting a III-V compound semiconductor material to a precleaning process which removes native oxides from a surface of the III-V compound semiconductor material; forming a semiconductor, e.g., amorphous Si, layer in-situ on the cleaned surface of the III-V compound semiconductor material; and forming a dielectric material having a dielectric constant that is greater than silicon dioxide on the semiconducting layer. In some embodiments, the semiconducting layer is partially or completely converted into a layer including at least a surface layer that is comprised of AOxNy prior to forming the dielectric material. In accordance with the present invention, A is a semiconducting material, preferably Si, x is 0 to 1, y is 0 to 1 and x and y are both not zero.

Abstract: Provided is a substrate placement stage or substrate processing apparatus which can suppress thermal deformation of the substrate placement stage when the substrate placement stage on which a substrate is placed is heated in a process chamber. The substrate placement stage includes: a heating element; a first member surrounding the heating element; and a second member covering a surface of the first member and including a placing surface for placing a substrate thereon, wherein the first member is made of a first material containing ceramics and aluminum, and the second member is made of a second material containing ceramics and aluminum, a content of the ceramics in the second material being lower than that of the first material.

Abstract: A substrate holder has two holder constituting bodies, each having a plurality of columns arranged on an imaginary circle, and substrate holding sections that hold circumferential portions of respective substrates. The holder constituting bodies hold the substrates so that either their front surfaces or their back surfaces face upward with a substrate having an upward facing front and a substrate having an upward facing rear being alternately arranged in a vertical direction. At least one of the holder constituting bodies moves in the vertical direction to change the positions of the holder constituting bodies relative to each other. A distance between a first pair of vertically adjacent substrates with their respective front surfaces facing each other is set to ensure treatment uniformity, and to be larger than a distance between a second pair of vertically adjacent substrates with their respective back surfaces facing each other.

Abstract: Processes for curing silicon based low k dielectric materials generally includes exposing the silicon based low k dielectric material to ultraviolet radiation in an inert atmosphere having an oxidant in an amount of about 10 to about 500 parts per million for a period of time and intensity effective to cure the silicon based low k dielectric material so to change a selected one of chemical, physical, mechanical, and electrical properties and combinations thereof relative to the silicon based low k dielectric material prior to the ultraviolet radiation exposure. Also disclosed herein are silicon base low k dielectric materials substantially free of sub-oxidized SiO species.

Abstract: A semiconductor device may be created using multiple metal layers and a layer including programmable vias that may be used to form various patterns of interconnections among segments of metal layers. The programmable vias may be formed of materials whose resistance is changeable between a high-resistance state and a low-resistance state.

Abstract: A dual wavelength exposure system provides for patterning a resist layer formed on a wafer for forming semiconductor devices, using two exposure operations, one including a first radiation having a first wavelength and the other including a second radiation including a second wavelength. Different or the same lithography tool may be used to generate the first and second radiation. For each die formed on the semiconductor device, a critical portion of the pattern is exposed using a first exposure operation that uses a first radiation with a first wavelength and a non-critical portion of the pattern is exposed using a second exposure operation utilizing the second radiation at a second wavelength. The resist material is chosen to be sensitive to both the first radiation having a first wavelength and the second radiation having the second wavelength.

Abstract: A plasma enhanced physical vapor deposition process deposits an amorphous carbon layer on an ion-implanted wafer for use in dynamic surface annealing of the wafer with an intense line beam of a laser wavelength. The deposition process is carried out at a wafer temperature below the dopant clustering threshold temperature, and includes introducing the wafer into a chamber having a carbon-containing target overlying the wafer, and furnishing a carrier gas into the chamber. The process further includes generating a wafer bias voltage and applying target source power to the carbon-containing target sufficient to produce ion bombardment of the carbon-containing target. The wafer bias voltage is set to a level at which the amorphous carbon layer that is deposited has a desired extinction coefficient at the laser wavelength.

Abstract: A method for removing coating from a substrate may include: locating an edge of a substrate; directing a laser beam along a first path to a first position on a surface of the substrate proximate to an edge of the substrate at an angle of incidence suitable to redirect the laser beam along a second path, through the substrate, to a second position on a second surface of the substrate corresponding to the located edge of the substrate, where the second surface can include a coating; and ablating at least a portion of coating at the second position on the second surface of the substrate.

Abstract: A method, system and scan lens for use therein are provided for high-speed, laser-based, precise laser trimming at least one electrical element along a trim path. The method includes generating a pulsed laser output with a laser, the output having one or more laser pulses at a repetition rate. A fast rise/fall time, pulse-shaped q-switched laser or an ultra-fast laser may be used. Beam shaping optics may be used to generate a flat-top beam profile. Each laser pulse has a pulse energy, a laser wavelength within a range of laser wavelengths, and a pulse duration. The wavelength is short enough to produce desired short-wavelength benefits of small spot size, tight tolerance, high absorption and reduced or eliminated heat-affected zone (HAZ) along the trim path, but not so short so as to cause microcracking. In this way, resistance drift after the trimming process is reduced.

Abstract: A method for manufacturing a semiconductor device includes irradiating light to an effective region of a semiconductor substrate. A wavelength of the light is a wavelength adapted so that light absorptance of the semiconductor substrate increases if an intensity of the light increases. The light is irradiated so that a focus point of the light is made within the semiconductor substrate in the irradiating.

Abstract: A method for heating a wafer that has at least one layer to be heated and a sub-layer. The method includes applying at least one light flux pulse to the wafer for heating the at least one layer in a manner such that the absorption coefficient of the flux by the layer is low as long as the temperature of the layer to be heated is in the low temperature range (PBT) but the absorption coefficient increases significantly when the temperature of the layer enters a high temperature range (PHT). Also, a sub-layer is selected such that the absorption coefficient of the applied light flux at the selected wavelength is high in the low temperature range (PBT) and the temperature enters the high temperature range (PHT) when the sub-layer is subjected to the light flux. The application of the light flux achieves improved heating of the wafer.

Abstract: A laser processing apparatus including a laser beam applying unit. The laser beam applying unit includes a laser beam generating unit, a focusing unit, and an optical system for guiding a laser beam from the laser beam generating unit to the focusing unit.

Abstract: A method and apparatus are provided for treating a substrate. The substrate is positioned on a support in a thermal treatment chamber. Electromagnetic radiation is directed toward the substrate to anneal a portion of the substrate. Other electromagnetic radiation is directed toward the substrate to preheat a portion of the substrate. The preheating reduces thermal stresses at the boundary between the preheat region and the anneal region. Any number of anneal and preheat regions are contemplated, with varying shapes and temperature profiles, as needed for specific embodiments. Any convenient source of electromagnetic radiation may be used, such as lasers, heat lamps, white light lamps, or flash lamps.

Abstract: The present invention generally relates to methods of controlling UV lamp output to increase irradiance uniformity. The methods generally include determining a baseline irradiance within a chamber, determining the relative irradiance on a substrate corresponding to a first lamp and a second lamp, and determining correction or compensation factors based on the relative irradiances and the baseline irradiance. The lamps are then adjusted via closed loop control using the correction or compensation factors to individually adjust the lamps to the desired output. The lamps may optionally be adjusted to equal irradiances prior to adjusting the lamps to the desired output. The closed loop control ensures process uniformity from substrate to substrate. The irradiance measurement and the correction or compensation factors allow for adjustment of lamp set points due to chamber component degradation, chamber component replacement, or chamber cleaning.

Abstract: Embodiments of the invention contemplate a method, apparatus and system that are used to support and position a substrate on a surface that is at a different temperature than the initial, or incoming, substrate temperature. Embodiments of the invention may also include a method of controlling the transfer of heat between a substrate and substrate support positioned in a processing chamber. The apparatus and methods described herein generally may also provide an inexpensive and simple way of accurately positioning a substrate on a substrate support that is positioned in a semiconductor processing chamber. Substrate processing chambers that can benefit from the various embodiments described herein include, but are not limited to RTP, CVD, PVD, ALD, plasma etching, and/or laser annealing chambers.

Abstract: Systems and methods for performing ultrafast laser annealing in a manner that reduces pattern density effects in integrated circuit manufacturing are disclosed. The method includes scanning at least one first laser beam over the patterned surface of a substrate. The at least one first laser beam is configured to heat the patterned surface to a non-melt temperature Tnonmelt that is within about 400° C. of the melt temperature Tmelt. The method also includes scanning at least one second laser beam over the patterned surface and relative to the first laser beam. The at least one second laser beam is pulsed and is configured to heat the patterned surface from the non-melt temperature provided by the at least one first laser beam up to the melt temperature.

Abstract: Methods and substrates for laser annealing are disclosed. The substrate includes a target region to be annealed and a plurality of reflective interfaces. The reflective interfaces cause energy received by the substrate to resonate within the target region. The method includes emitting energy toward the substrate with a laser, receiving the energy with the substrate, and reflecting the received energy with a plurality of reflective interfaces embedded in the substrate to generate a resonance within the target region.

Abstract: Methods are disclosed herein for determining the laser beam size and the scan pattern of laser annealing when fabricating backside illumination (BSI) CMOS image sensors to keep dark-mode stripe patterns corresponding to laser scan boundary effects from occurring within the sensor array regions of the image sensors. Each CMOS image sensor has a sensor array region and a periphery circuit. The methods determines a size of the laser beam from a length of the sensor array region and a length of the periphery circuit so that the laser beam covers an integer number of the sensor array region for at least one alignment of the laser beam on the array of BSI image sensors. The methods further determines a scan pattern so that the boundary of the laser beam does not overlap the sensor array regions during the laser annealing, but only overlaps the periphery circuits.

Abstract: A method and system for locally processing a predetermined microstructure formed on a substrate without causing undesirable changes in electrical or physical characteristics of the substrate or other structures formed on the substrate are provided. The method includes providing information based on a model of laser pulse interactions with the predetermined microstructure, the substrate and the other structures. At least one characteristic of at least one pulse is determined based on the information. A pulsed laser beam is generated including the at least one pulse. The method further includes irradiating the at least one pulse having the at least one determined characteristic into a spot on the predetermined microstructure. The at least one determined characteristic and other characteristics of the at least one pulse are sufficient to locally process the predetermined microstructure without causing the undesirable changes.

Abstract: Structures and methods for forming the same. A semiconductor chip includes a substrate and a transistor. The chip includes N interconnect layers on the substrate, N being a positive integer. The chip includes a cooling pipes system inside the N interconnect layers. The cooling pipes system does not include any solid or liquid material. Given any first point and any second point in the cooling pipes system, there exists a continuous path which connects the first and second points and which is totally within the cooling pipes system. A first portion of the cooling pipes system overlaps the transistor. A second portion of the cooling pipes system is higher than the substrate and lower than a top interconnect layer. The second portion is in direct physical contact with a surrounding ambient.

Abstract: A method of manufacturing a waveguide within a substrate by local modification of material structure under high power density laser radiation applied from the mostly distant side of the substrate.

Abstract: It is an object to provide a homogeneous semiconductor film in which variation in the size of crystal grains is reduced. Alternatively, it is an object to provide a homogeneous semiconductor film and to achieve cost reduction. By introducing a glass substrate over which an amorphous semiconductor film is formed into a treatment atmosphere set at more than or equal to a temperature that is needed for crystallization, rapid heating due to heat conduction from the treatment atmosphere is performed so that the amorphous semiconductor film is crystallized. More specifically, for example, after the temperature of the treatment atmosphere is increased in advance to a temperature that is needed for crystallization, the substrate over which the semiconductor film is formed is put into the treatment atmosphere.