Radiation Or Energy Treatment Modifying Properties Of Semiconductor Region Of Substrate (e.g., Thermal, Corpuscular, Electromagnetic, Etc.) Patents (Class 438/795)
  • Patent number: 8461033
    Abstract: A light-emission output of a flash lamp for performing a light-irradiation heat treatment on a substrate in which impurities are implanted is increased up to a target value L1 over a period of time from 1 to 100 milliseconds, is kept for 5 to 100 milliseconds within a fluctuation range of plus or minus 30% from the target value L1, and is then attenuated from the target value L1 to zero over a period of time from 1 to 100 milliseconds. That is, compared with conventional flash lamp annealing, the light-emission output of the flash lamp is increased more gradually, is kept to be constant for a certain period of time, and is then decreased more gradually. As a result, a total heat amount of a surface of the substrate increases compared with the conventional case, but a surface temperature thereof rises more gradually and then drops more gradually compared with the conventional case.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: June 11, 2013
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventor: Shinichi Kato
  • Patent number: 8461553
    Abstract: An improved method of producing solar cells utilizes a mask which is fixed relative to an ion beam in an ion implanter. The ion beam is directed through a plurality of apertures in the mask toward a substrate. The substrate is moved at different speeds such that the substrate is exposed to an ion dose rate when the substrate is moved at a first scan rate and to a second ion dose rate when the substrate is moved at a second scan rate. By modifying the scan rate, various dose rates may be implanted on the substrate at corresponding substrate locations. This allows ion implantation to be used to provide precise doping profiles advantageous for manufacturing solar cells.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: June 11, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Nicholas P. T. Bateman, Steven M. Anella, Benjamin B. Riordon, Atul Gupta
  • Publication number: 20130143416
    Abstract: A technique comprising: using a laser beam to ablate a target surface (2) via projection lens (12) as part of a process of defining one or more elements of one or more electronic devices, wherein the ablating is performed whilst extracting material ablated from the target surface via an extraction device inlet (6) having at least a portion at a level between said target surface (2) and said projection lens (12) and at the level of a plume of ablated material above said target surface.
    Type: Application
    Filed: June 3, 2011
    Publication date: June 6, 2013
    Applicant: PLASTIC LOGIC LIMITED
    Inventor: Shane Norval
  • Patent number: 8455299
    Abstract: Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: June 4, 2013
    Assignee: Micron Technology, Inc.
    Inventors: John Smythe, Bhaskar Srinivasan, Ming Zhang
  • Publication number: 20130137204
    Abstract: A crystallization apparatus for crystallizing a semiconductor layer formed on a substrate. The crystallization apparatus includes a laser generator, which generates a laser beam, an optical device for changing a path of the laser beam emitted from the laser generating device, and a stage on which the substrate is arranged, wherein the optical device changes the path of the laser beam by rotating with respect to a constant axis, and the stage is moved so that the laser beam having the changed path is irradiated to a constant region on the semiconductor layer.
    Type: Application
    Filed: September 26, 2012
    Publication date: May 30, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventor: SAMSUNG DISPLAY CO., LTD.
  • Publication number: 20130134528
    Abstract: Etchant-free methods of producing a gap between two materials are provided. Aspects of the methods include providing a structure comprising a first material and a second material, and subjecting the structure to conditions sufficient to cause a decrease in the volume of at least a portion of at least one of the first material and the second material to produce a gap between the first material and the second material. Also provided are devices produced by the methods (e.g., MEMS and NEMS devices), structures used in the methods and methods of making such structures.
    Type: Application
    Filed: May 25, 2012
    Publication date: May 30, 2013
    Inventors: Clark Tu-Cuong Nguyen, Li-Wen Hung
  • Publication number: 20130137261
    Abstract: A dielectric layer having features etched thereon and a low dielectric constant, and that is carried by a semiconductor substrate. The etched dielectric layer is modified so its surface energy is reduced by at least one of: (a) applying thermal energy to the layer to cause the layer temperature to be between 100 C and 400 C; (b) irradiating the layer with electromagnetic energy; and/or (c) irradiating the layer with free ions.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 30, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Joung-Wei LIOU, Chung-Chi KO, Chia-Cheng CHOU, Keng-Chu LIN
  • Patent number: 8451536
    Abstract: Disclosed herein is an irradiation apparatus including: laser light source; a polarization splitting section configured to split laser light emitted from the laser light source into first linearly polarized light and second linearly polarized light different in polarization direction; a light beam dividing section configured to divide the first or second linearly polarized light into a plurality of light beams; a quarter-wave plate array composed of a plurality of first quarter-wave plates for converting some of the light beams into right circularly polarized light and a plurality of second quarter-wave plates for converting the other of the light beams into left circularly polarized light, the first quarter-wave plates and the second quarter-wave plates being alternately arranged in a first direction perpendicular to an optical axis; and a projection optical system for condensing the right circularly polarized light and the left circularly polarized light toward a work surface to be irradiated.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: May 28, 2013
    Assignee: Sony Corporation
    Inventor: Koichi Tsukihara
  • Patent number: 8450704
    Abstract: A system for modifying dislocation distributions in semiconductor materials is provided. The system includes one or more vibrational sources for producing at least one excitation of vibrational mode having phonon frequencies so as to enhance dislocation motion through a crystal lattice.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: May 28, 2013
    Assignee: Massachusetts Institute of Technology
    Inventors: Anthony Buonassisi, Mariana Bertoni, Bonna Newman
  • Publication number: 20130130514
    Abstract: A crystallization method is disclosed. In one embodiment, the method includes providing a substrate having an amorphous silicon layer, wherein the substate has first and second sides opposing each other and irradiating a laser beam onto the substrate so as to have an inclined angle with respect to the first and second sides of the substrate. The method further includes relatively moving one of the laser beam and the substate with respect to the other i) in a first direction from the first side to the second side of the substate and ii) in a second direction which crosses the first direction.
    Type: Application
    Filed: January 21, 2013
    Publication date: May 23, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventor: Samsung Display Co., Ltd.
  • Publication number: 20130126573
    Abstract: A method is provided for the internal processing of a transparent substrate in preparation for a cleaving step. The substrate is irradiated with a focused laser beam that is comprised of pulses having an energy and pulse duration selected to produce a filament within the substrate. The substrate is translated relative to the laser beam to irradiate the substrate and produce an additional filament at one or more additional locations. The resulting filaments form an array defining an internally scribed path for cleaving said substrate. Laser beam parameters may be varied to adjust the filament length and position, and to optionally introduce V-channels or grooves, rendering bevels to the laser-cleaved edges.
    Type: Application
    Filed: July 12, 2011
    Publication date: May 23, 2013
    Applicant: FILASER INC.
    Inventors: S. Abbas Hosseini, Peter R. Herman
  • Patent number: 8445366
    Abstract: Electron beam annealing apparatuses for annealing a thin layer on a substrate and annealing methods using the apparatuses are provided. The electron beam annealing apparatuses may include an electron beam scanning unit that may scan a pulsed electron beam onto a substrate.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: May 21, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hyun Lee, Jong-min Kim, Dong-joon Ma, Chang-soo Lee
  • Publication number: 20130122723
    Abstract: An ultraviolet treatment method is provided for a metal oxide electrode. A metal oxide electrode is exposed to an ultraviolet (UV) light source in a humid environment. The metal oxide electrode is then treated with a moiety having at least one anchor group, where the anchor group is a chemical group capable of promoting communication between the moiety and the metal oxide electrode. As a result, the moiety is bound to the metal oxide electrode. In one aspect the metal oxide electrode is treated with a photoactive moiety. Exposing the metal oxide electrode to the UV light source in the humid environment induces surface defects in the metal oxide electrode in the form of oxygen vacancies. In response to the humidity, atmospheric water competes favorably with oxygen for dissociative adsorption on the metal oxide electrode surface, and hydroxylation of the metal oxide electrode surface is induced.
    Type: Application
    Filed: November 14, 2011
    Publication date: May 16, 2013
    Inventors: Sean Andrew VAIL, David R. EVANS, Wei PAN, Jong-Jan LEE
  • Patent number: 8440517
    Abstract: The disclosure relates to a fin field effect transistor (FinFET). An exemplary structure for a FinFET comprises a substrate comprising a top surface; a first insulation region and a second insulation region over the substrate top surface comprising tapered top surfaces; a fin of the substrate extending above the substrate top surface between the first and second insulation regions, wherein the fin comprises a recessed portion having a top surface lower than the tapered top surfaces of the first and second insulation regions, wherein the fin comprises a non-recessed portion having a top surface higher than the tapered top surfaces; and a gate stack over the non-recessed portion of the fin.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: May 14, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Ta Lin, Chu-Yun Fu, Shin-Yeh Huang, Shu-Tine Yang, Hung-Ming Chen
  • Patent number: 8440941
    Abstract: Provided is a heat treatment apparatus in which a large-sized substrate can be rapidly heated and rapidly cooled with high uniformity, and a heat treatment method using the heat treatment apparatus. The heat treatment apparatus includes: a first chamber of which one side is opened; a second chamber of which one side is opened; a device for moving the first and the second chambers; a heating device; a gas introduction port; a gas exhaust port; and a jig for longitudinally fixing a substrate, in which the substrate is rapidly heated while the first and the second chambers are connected, and rapidly cooled by separating the chambers to move the substrate away from a heat storage portion of the heating device or the like. Further, the heat treatment method includes the heat treatment apparatus, and a method for manufacturing a semiconductor device using an oxide semiconductor is included.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: May 14, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihiro Narita, Hideto Ohnuma, Tomoaki Moriwaka, Shunpei Yamazaki
  • Patent number: 8440581
    Abstract: The disclosed systems and method for non-periodic pulse sequential lateral solidification relate to processing a thin film. The method for processing a thin film, while advancing a thin film in a selected direction, includes irradiating a first region of the thin film with a first laser pulse and a second laser pulse and irradiating a second region of the thin film with a third laser pulse and a fourth laser pulse, wherein the time interval between the first laser pulse and the second laser pulse is less than half the time interval between the first laser pulse and the third laser pulse. In some embodiments, each pulse provides a shaped beam and has a fluence that is sufficient to melt the thin film throughout its thickness to form molten zones that laterally crystallize upon cooling. In some embodiments, the first and second regions are adjacent to each other. In some embodiments, the first and second regions are spaced a distance apart.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: May 14, 2013
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: James S. Im, Ui-Jin Chung, Alexander B. Limanov, Paul C. Van Der Wilt
  • Publication number: 20130115726
    Abstract: A crystallization apparatus for crystallizing a semiconductor layer formed on a substrate, the crystallization apparatus including: a laser generator, which generates a laser beam, and a stage on which the substrate is mounted, where the semiconductor layer is divided into a plurality of crystallization areas and a plurality of non-crystallization areas, and the laser beam is radiated onto the crystallization areas a plurality of times to crystallize the crystallization areas, where the laser beam is radiated onto different positions of the same crystallization area a plurality of times.
    Type: Application
    Filed: April 20, 2012
    Publication date: May 9, 2013
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventors: Sung-Ho Kim, Do-Young Kim, Min-Chul Shin, Min-Hwan Choi, Jong-Moo Huh
  • Patent number: 8435841
    Abstract: A method of manufacturing a semiconductor device begins by fabricating an n-type metal oxide semiconductor (NMOS) transistor structure on a semiconductor wafer. The method continues by forming an optically reflective layer overlying the NMOS transistor structure, forming a layer of tensile stress inducing material overlying the optically reflective layer, and curing the layer of tensile stress inducing material by applying ultraviolet radiation. Some of the ultraviolet radiation directly radiates the layer of tensile stress inducing material and some of the ultraviolet radiation radiates the layer of tensile stress inducing material by reflecting from the optically reflective layer.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: May 7, 2013
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Ralf Richter, Torsten Huisinga
  • Patent number: 8435811
    Abstract: An evaporation donor substrate which enables only a desired evaporation material to be evaporated at the time of deposition by an evaporation method, and capable of reduction in manufacturing cost by increase in use efficiency of the evaporation material and deposition with high uniformity. An evaporation donor substrate capable of controlling laser light so that a desired position of an evaporation donor substrate is irradiated with the laser light in accordance with the wavelength of the emitted laser light at the time of evaporation. Specifically, an evaporation donor substrate in which a region which reflects laser light and a region which absorbs laser light at the time of irradiation with laser light having a wavelength of greater than or equal to 400 nm and less than or equal to 600 nm at the time of evaporation are formed.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: May 7, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kohei Yokoyama, Takahiro Ibe, Takuya Tsurume, Koichiro Tanaka
  • Publication number: 20130105801
    Abstract: Display substrates including a capacitor, methods of repairing a display substrate, and display devices including the display substrate are disclosed. In one embodiment, the capacitor includes a first electrode layer, a dielectric layer, and a second electrode layer sequentially stacked. A portion of the second electrode layer is shorted to the first electrode layer. An opening penetrates the second electrode layer to expose a top surface of the dielectric layer. Due to the opening, the shorted portion is separated from the surrounding portions of the second electrode layer. The opening may be formed by irradiating a laser.
    Type: Application
    Filed: April 16, 2012
    Publication date: May 2, 2013
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Yul Kyu Lee, Sun Park, Joon Hoo Choi
  • Publication number: 20130105807
    Abstract: In one aspect, the present disclosure relates to a method of processing a thin film including, while advancing a thin film in a first selected direction, irradiating a first region of the thin film with a first laser pulse and a second laser pulse, each laser pulse providing a shaped beam and having a fluence that is sufficient to partially melt the thin film and the first region re-solidifying and crystallizing to form a first crystallized region, and irradiating a second region of the thin film with a third laser pulse and a fourth laser pulse, each pulse providing a shaped beam and having a fluence that is sufficient to partially melt the thin film and the second region re-solidifying and crystallizing to form a second crystallized region, wherein the time interval between the first laser pulse and the second laser pulse is less than half the time interval between the first laser pulse and the third laser pulse.
    Type: Application
    Filed: November 2, 2010
    Publication date: May 2, 2013
    Applicant: The Trustees of Columbia University in the city of New York
    Inventors: James S. Im, Yikang Deng, Qiongying Hu, Ui-Jin Chung, Alexander B. Limanov
  • Patent number: 8431467
    Abstract: An object to be processed is restrained from warping at the time of laser processing. A modified region M2 is formed within a wafer 11, and fractures a2, b2 extending in directions parallel to the thickness direction of the wafer 11 and tilted with respect to a plane including lines 5 are generated from the modified region M2. A modified region M3 is formed within the wafer 11, and a fracture a3 extending in a direction parallel to the thickness direction of the wafer 11 and tilted with respect to the plane including the lines 5 is generated from the modified region M3 so as to connect with the fracture b2. That is, the fractures a2, a3, b2 are generated so as to be connected together.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: April 30, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Takeshi Sakamoto
  • Patent number: 8431427
    Abstract: A method for manufacturing a photovoltaic module including a laminating step.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: April 30, 2013
    Assignee: First Solar, Inc.
    Inventors: Markus Gloeckler, Imran Khan
  • Patent number: 8426324
    Abstract: A method for manufacturing a memory element is proposed. A laser beam emitted from a laser oscillator is entered into a deflector, and a laser beam which has passed through the deflector is entered into a diffractive optical element to be diverged into a plurality of laser beams. Then, a photoresist formed over an insulating film is irradiated with the laser beam which is made to diverge into the plurality of laser beams, and the photoresist irradiated with the laser beam is developed so as to selectively etch the insulating film.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro Tanaka, Hirotada Oishi
  • Patent number: 8426250
    Abstract: The present invention discloses an apparatus including: a laser beam directed at a wafer held by a chuck mounted on a stage inside a process chamber; a focusing mechanism for the laser beam; a steering mechanism for the laser beam; an optical scanning mechanism for the laser beam; a mechanical scanning system for the stage; an etch chemical induced by the laser beam to etch the wafer and form volatile byproducts; a gas feed line to dispense the etch chemical towards the wafer; and a gas exhaust line to remove any excess of the etch chemical and the volatile byproducts.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: April 23, 2013
    Assignee: Intel Corporation
    Inventors: George Vakanas, George Chen, Yuval Greenzweig, Eric Li, Sergei Voronov
  • Patent number: 8426323
    Abstract: A substrate processing apparatus includes a chamber capable of being evacuated, a substrate stage adapted to mount a substrate, a heating unit adapted to be set above the substrate mounting surface of the substrate stage, face the substrate mounted on at least the substrate mounting surface, and heat the substrate by radiant heat without being in contact with the substrate, a shutter adapted to be retractably inserted in the space between the heating unit and the substrate mounted on the substrate mounting surface, and a shutter driving unit adapted to extend/retract the shutter into/from the space. The substrate is mounted on the substrate stage to face the heating unit, the substrate is annealed by heating the substrate by radiant heat from the heating unit, and the shutter is extended into the space between the heating unit and the substrate stage.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: April 23, 2013
    Assignee: Canon Anelva Corporation
    Inventors: Nobuyuki Masaki, Yuichi Sasuga, Masami Shibagaki, Hiroshi Doi
  • Patent number: 8426868
    Abstract: An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Toshinari Sasaki
  • Patent number: 8426297
    Abstract: A method of manufacturing a silicon wafer, an oxygen concentration in a surface layer to be maintained more than a predetermined value while promoting a defect-free layer. Strength of the surface layer can be made higher than that of an ordinary annealed sample as a COP free zone is secured. A method of manufacturing a silicon wafer doped with nitrogen and oxygen, includes growing a single crystal silicon doped with the nitrogen by Czochralski method, slicing the grown single crystal silicon to obtain a single crystal silicon wafer; heat treating the sliced single crystal silicon wafer in an ambient gas including a hydrogen gas and/or an inert gas; polishing the heat treated single crystal silicon wafer, after the heat treatment, such that an obtained surface layer from which COP defects have been removed by the heat treatment is polished away until an outermost surface has a predetermined oxygen concentration.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: April 23, 2013
    Assignee: Sumco Techxiv Corporation
    Inventor: Shinya Sadohara
  • Publication number: 20130093060
    Abstract: A silicon wafer and method for producing a silicon wafer, including at least: a first heat treatment process in which rapid heat treatment is performed on the wafer by using a rapid heating/cooling apparatus in an atmosphere containing at least one of nitride film formation atmospheric gas, rare gas, and oxidizing gas at a temperature higher than 1300° C. and lower than or equal to a silicon melting point for 1 to 60 seconds; and a second heat treatment process in which temperature and atmosphere are controlled to suppress generation of a defect caused by a vacancy in the wafer and rapid heat treatment is performed on the wafer. Therefore, RIE defects such as oxide precipitates, COPs, and OSFs are not present at a depth of at least 1 ?m from the surface, which becomes a device fabrication region, and the lifetime is 500 ?sec or longer.
    Type: Application
    Filed: June 7, 2011
    Publication date: April 18, 2013
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Tetsuya Oka, Koji Ebara, Shuji Takahashi
  • Patent number: 8420553
    Abstract: A manufacturing method of a semiconductor device, which includes the steps of forming a gate electrode layer over a substrate having an insulating surface, forming a gate insulating layer over the gate electrode layer, forming an oxide semiconductor layer over the gate insulating layer, forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer, forming an insulating layer including oxygen over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and after formation of an insulating layer including hydrogen over the insulating layer including oxygen, performing heat treatment so that hydrogen in the insulating layer including hydrogen is supplied to at least the oxide semiconductor layer.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: April 16, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8421132
    Abstract: A method of forming a semiconductor structure includes forming a stress inducing layer over one or more partially completed field effect transistor (FET) devices disposed over a substrate, the one or more partially completed FET devices including sacrificial dummy gate structures; planarizing the stress inducing layer and removing the sacrificial dummy gate structures; and following the planarizing the stress inducing layer and removing the sacrificial dummy gate structures, performing an ultraviolet (UV) cure of the stress inducing layer so as to enhance a value of an initial applied stress by the stress inducing layer on channel regions of the one or more partially completed FET devices. A semiconductor structure includes a UV cured tensile nitride layer formed over the substrate and between gate structures of the NFET devices, with portions of the UV cured tensile nitride layer having a trapezoidal profile with a bottom end wider than a top end.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: April 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ming Cai, Dechao Guo, Pranita Kulkarni, Chun-Chen Yeh
  • Patent number: 8420512
    Abstract: A method for manufacturing a semiconductor device according to the invention irradiates a first pulse laser beam with an irradiation energy density of 1.0 J/cm2 or higher to blow off particles on the surface of wafer in activating an impurity layer positioned at a shallow location from the surface of wafer such as p+-type collector layer in an FS-type IGBT or in an NPT-type IGBT. By irradiating a second laser beam, region, on which particles were, is activated in the same manner as the region, on which particles are not, and p+-type collector layer is formed uniformly. The manufacturing method according to the invention facilitates preventing nonuniform laser beam irradiation from causing in laser annealing and preventing defective devices from causing.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: April 16, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Haruo Nakazawa
  • Patent number: 8420495
    Abstract: This invention disclosed a manufacturing approach of collector and buried layer of a bipolar transistor. One aspect of the invention is that a pseudo buried layer, i.e, collector buried layer, is manufactured by ion implantation and thermal anneal. This pseudo buried layer has a small area, which makes deep trench isolation to divide pseudo buried layer unnecessary in subsequent process. Another aspect is, the doped area, i.e, collector, is formed by ion implantation instead of high cost epitaxy process. This invention simplified the manufacturing process, as a consequence, saved manufacturing cost.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: April 16, 2013
    Assignee: Shanghai Hua Hong Nec Electronics Company, Limited
    Inventors: Tzuyin Chiu, TungYuan Chu, YungChieh Fan, Wensheng Qian, Fan Chen, Jiong Xu, Haifang Zhang
  • Patent number: 8420554
    Abstract: A wafer support ring and a method of using the same are disclosed herein. The support ring supports a wafer during a first processing operation. A top surface of the support ring is in contact with a first plurality of locations on a surface of the wafer during the first processing operation. A second wafer support structure is used to support the wafer during a second processing operation. A top surface of the second wafer support structure is in contact with a second, different plurality of locations on the surface of the wafer during the second processing operation. The wafer support ring may also have an outer lip disposed about an outer periphery of the support ring that has a depth such that it does not form part of the top surface of the support ring.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: April 16, 2013
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Brian Lawrence Gilmore
  • Patent number: 8420555
    Abstract: A manufacturing method for a semiconductor device including: determining pattern dependency of a radiation factor of an element forming surface of one wafer having a predetermined pattern formed on the wafer; determining a heating surface of the wafer, based on the pattern dependency of the radiation factor; holding the one wafer having the determined heating surface and another wafer having a determined heating surface, spaced at a predetermined distance in such a manner that non-heating surfaces of the one wafer and the another wafer oppose to each other; and heating the each heating surface of the one wafer and the another wafer.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: April 16, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaki Kamimura, Kenichi Yoshino
  • Patent number: 8420549
    Abstract: A method of manufacturing a semiconductor device includes preparing a semiconductor wafer having a device area, an end face, and a surface peripheral area located outside the device area and between the end face and the device area. Forming a Cu layer on the semiconductor wafer and rotating the wafer in a horizontal plane. Emitting a first liquid from an edge nozzle towards the surface peripheral area which selectively removes a first unnecessary material in the surface peripheral area. Emitting a protecting liquid toward the semiconductor wafer, thereby protecting the device area from the first liquid. An angle of a longitudinal axis of the edge nozzle with respect to a tangent of the semiconductor wafer at a point, where the longitudinal axis of the edge nozzle intersects the end face of the wafer, is set in the range of 0 to 90 degrees in plan view.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: April 16, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Shinya Yamasaki, Hidemitsu Aoki
  • Patent number: 8415670
    Abstract: Methods of producing high uniformity in thin film transistor devices fabricated on laterally crystallized thin films are described. A thin film transistor (TFT) includes a channel area disposed in a crystalline substrate, which has grain boundaries that are approximately parallel with each other and are spaced apart with approximately equal spacings. The shape of the channel area includes a non-equiangular polygon that has two opposing side edges that are oriented substantially perpendicular to the grain boundaries. The polygon further has an upper edge and a lower edge. At least a portion of each of the upper and lower edges is oriented at a tilt angle with respect to the grain boundaries. The tilt angles are selected such that the number of grain boundaries covered by the polygon is independent of the location of the channel area within the crystalline substrate.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: April 9, 2013
    Assignee: The Trustees of Columbia University in the City of New York
    Inventor: James S. Im
  • Patent number: 8410000
    Abstract: The method for producing a photovoltaic cell includes applying, on a partial region of one surface side of a semiconductor substrate, a first p-type diffusion layer forming composition including a p-type impurity-containing glass powder and a dispersion medium; applying, on at least a region other than the partial region on the surface of the semiconductor substrate, a second p-type diffusion layer forming composition which includes a p-type impurity-containing glass powder and a dispersion medium and in which a concentration of the p-type impurity is lower than that of the first p-type diffusion layer forming composition, where the first p-type diffusion layer forming composition is applied; heat-treating the semiconductor substrate on which the first p-type diffusion layer forming composition and the second p-type diffusion layer forming composition are applied to form a p-type diffusion layer; and forming an electrode on the partial region.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: April 2, 2013
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Youichi Machii, Masato Yoshida, Takeshi Nojiri, Kaoru Okaniwa, Mitsunori Iwamuro, Shuuichirou Adachi, Akihiro Orita, Tetsuya Satou, Keiko Kizawa
  • Patent number: 8409961
    Abstract: An alteration method of a titanium nitride film, comprising exposing a titanium nitride film formed on a semiconductor substrate to plasma obtained by exciting a process gas that includes noble gas or nitrogen and excludes oxygen, thereby increasing a specific resistance of the titanium nitride film.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: April 2, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Takuya Sugawara, Yoshihiro Sato
  • Patent number: 8409902
    Abstract: A dielectric film stack of a solar cell is ablated using a laser. The dielectric film stack includes a layer that is absorptive in a wavelength of operation of the laser source. The laser source, which fires laser pulses at a pulse repetition rate, is configured to ablate the film stack to expose an underlying layer of material. The laser source may be configured to fire a burst of two laser pulses or a single temporally asymmetric laser pulse within a single pulse repetition to achieve complete ablation in a single step.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: April 2, 2013
    Assignee: SunPower Corporation
    Inventors: Gabriel Harley, Taeseok Kim, Peter John Cousins
  • Publication number: 20130078822
    Abstract: First flash irradiation from flash lamps is performed on an upper surface of a semiconductor wafer supported on a temperature equalizing ring of a holder to cause the semiconductor wafer to jump up from the temperature equalizing ring into midair. While the semiconductor wafer is in midair above the temperature equalizing ring, second flash irradiation from the flash lamps is performed on the upper surface of the semiconductor wafer to increase the temperature of the upper surface of the semiconductor wafer to a treatment temperature. Cracking in the semiconductor wafer is prevented because the second flash irradiation is performed while the semiconductor wafer is in midair and subject to no restraints.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 28, 2013
    Inventor: Kenichi Yokouchi
  • Patent number: 8404599
    Abstract: The method for producing a photovoltaic cell includes applying, on a partial region of one surface side of a semiconductor substrate, a first n-type diffusion layer forming composition including an n-type impurity-containing glass powder and a dispersion medium; applying, on at least a region other than the partial region on the surface of the semiconductor substrate, a second n-type diffusion layer forming composition which includes an n-type impurity-containing glass powder and a dispersion medium and in which a concentration of the n-type impurity is lower than that of the first n-type diffusion layer forming composition, where the first n-type diffusion layer forming composition is applied; heat-treating the semiconductor substrate on which the first n-type diffusion layer forming composition and the second n-type diffusion layer forming composition are applied to form an n-type diffusion layer; and forming an electrode on the partial region.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: March 26, 2013
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Youichi Machii, Masato Yoshida, Takeshi Nojiri, Kaoru Okaniwa, Mitsunori Iwamuro, Shuuichirou Adachi, Akihiro Orita, Tetsuya Satou, Keiko Kizawa
  • Patent number: 8404573
    Abstract: With the evacuation of an interior of a vacuum chamber halted and with gas supply into the vacuum chamber halted, in a state that a mixed gas of helium gas and diborane gas is sealed in the vacuum chamber, a plasma is generated in a vacuum vessel and simultaneously a high-frequency power is supplied to a sample electrode. By the high-frequency power supplied to the sample electrode, boron is introduced to a proximity to a substrate surface.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Tomohiro Okumura, Yuichiro Sasaki, Satoshi Maeshima, Ichiro Nakayama, Bunji Mizuno
  • Publication number: 20130071776
    Abstract: Techniques for reducing the number of shots required by a radiation beam writing tool to write a pattern, such as fractured layout design, onto a substrate. One or more apertures are employed by a radiation beam writing tool to write a desired pattern onto a substrate using L-shaped images, T-shaped images, or some combination of both. By reducing the number of shots required to write a pattern onto a substrate, various implementations of the invention may reduce the write time and/or write complexity of the write process.
    Type: Application
    Filed: October 12, 2010
    Publication date: March 21, 2013
    Inventors: Emile Y. Sahouria, Steffen F. Schulze
  • Publication number: 20130072034
    Abstract: A substrate processing apparatus includes a process chamber which processes a substrate, a conductive substrate support table which is installed within the process chamber, a dielectric plate on which the substrate is mounted, the dielectric plate being placed on the substrate support table, a microwave generator which is installed outside the process chamber, and a microwave supplying unit which supplies a microwave generated by the microwave generator into the process chamber.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 21, 2013
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Shinji YASHIMA, Atsushi UMEKAWA
  • Patent number: 8399341
    Abstract: The invention is to provide a method for heat treating a silicon wafer reducing grown-in defects while suppressing generation of slip during RTP and improving surface roughness of the wafer. The method performing a first heat treatment while introducing a rare gas, the first heat treatment comprising the steps of rapidly heating the wafer to T1 of 1300° C. or higher and the melting point of silicon or lower, keeping the wafer at T1, rapidly cooling the wafer to T2 of 400-800° C. and keeping the wafer at T2; and performing a second heat treatment while introducing an oxygen gas in an amount of 20-100 vol. %, the second heat treatment comprising the steps of keeping the wafer at T2, rapidly heating the wafer from T2 to T3 of 1250° C. or higher and the melting point of silicon or lower, keeping the wafer at T3 and rapidly cooling the wafer.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: March 19, 2013
    Assignee: Covalent Materials Corporation
    Inventors: Takeshi Senda, Hiromichi Isogai, Eiji Toyoda, Kumiko Murayama, Koji Araki, Tatsuhiko Aoki, Haruo Sudo, Koji Izunome, Susumu Maeda, Kazuhiko Kashima
  • Patent number: 8399798
    Abstract: The invention relates to a method for incorporating a structure into a surface of a workpiece that is transparent in a certain wavelength range. For this purpose the surface to be structured is brought into contact with a target surface containing a target material by means of a laser beam, the wavelength of which is within the certain wavelength range, energy is introduced at least at one position through the workpiece and into the boundary region of the surface to be structured and the target surface such that target material is deposited at the respective position in and/or on the surface to be structured. For this purpose a pulsed laser beam having a pulse repetition rate of more than 10 kHz is used, which is focused such that the focus is positioned on or under the target surface, wherein the laser beam has a power density in the focus of more than 2000 W/mm2. The invention further relates to a device for introducing a structure into a surface of a workpiece transparent in a certain wavelength range.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: March 19, 2013
    Assignee: Panasonic Electric Works Europe AG
    Inventor: Christoph Stahr
  • Patent number: 8394703
    Abstract: When the single crystal semiconductor layer is melted, the outward diffusion of oxygen is promoted. Specifically, an SOI substrate is formed in such a manner that an SOI structure having a bonding layer including oxygen provided over a base substrate and a single crystal semiconductor layer provided over the bonding layer including oxygen is formed, and part of the single crystal semiconductor layer is melted by irradiation with a laser beam in a state that the base substrate is heated at a temperature of higher than or equal to 500° C. and lower than a melting point of the base substrate.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: March 12, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideto Ohnuma, Junpei Momo, Shunpei Yamazaki
  • Patent number: 8389422
    Abstract: A rapid thermal processing device and methods are provided for thermal processing of samples such as semiconductor wafers. The device has components including a stamp (35) having a stamping surface and a heater or cooler (40) to bring it to a selected processing temperature, a sample holder (20) for holding a sample (10) in position for intimate contact with the stamping surface; and positioning components (25) for moving the stamping surface and the stamp (35) in and away from intimate, substantially non-pressured contact. Methods for using and making such devices are also provided. These devices and methods allow inexpensive, efficient, easily controllable thermal processing.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: March 5, 2013
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Pauls Stradins, Qi Wang
  • Patent number: 8389423
    Abstract: One embodiment of the present invention provides a semiconductor device manufacturing method, including: performing a laser spike annealing, by irradiating light, whose wavelength is 10 ?m to 11 ?m, onto a semiconductor substrate including: an active area; a circuit pattern; and a dummy pattern formed at a position, whose distance from an end of the active area is equal to or more than 10 ?m and equal to or less than 11 ?m, at a pitch equal to or more than 10 nm and equal to or less than 510 nm, while setting an angle formed between an arrangement direction of the dummy pattern and a projection direction of the light to be equal to or more than 0° and equal to or less than 30°.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: March 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshi Ohno