Compound Semiconductor Patents (Class 438/93)
-
Publication number: 20020052061Abstract: A structure and method of fabricating an optically active layer embedded in a Si wafer, such that the outermost epitaxial layer exposed to the CMOS processing equipment is always Si or another CMOS-compatible material such as SiO2. Since the optoelectronic layer is completely surrounded by Si, the wafer is fully compatible with standard Si CMOS manufacturing. For wavelengths of light longer than the bandgap of Si (1.1 &mgr;m), Si is completely transparent and therefore optical signals can be transmitted between the embedded optoelectronic layer and an external waveguide using either normal incidence (through the Si substrate or top Si cap layer) or in-plane incidence (edge coupling).Type: ApplicationFiled: August 1, 2001Publication date: May 2, 2002Inventor: Eugene A. Fitzgerald
-
Patent number: 6372981Abstract: A group-IV semiconductor substrate has an inclined front surface, the inclination being toward a direction differing from the <010>crystal lattice direction. The substrate is cleansed by heating in the presence of a gas including a compound of the group-IV substrate element. A source gas of a group-III element is then supplied, forming an atomic film of the group-III element on the substrate surface. Starting at the same time, or shortly afterward, a source gas of a group-V element is supplied, and a III-V compound semiconductor hetero-epitaxial layer is grown. Chemical bonding of the group-III element to the group-IV substrate surface produces a crystal alignment of the hetero-epitaxial layer that leads to improved conversion efficiency when the semiconductor substrate is used in the fabrication of solar cells with compound semiconductor base and emitter layers.Type: GrantFiled: August 8, 2000Date of Patent: April 16, 2002Assignee: Oki Electric Industry Co., Ltd.Inventors: Takashi Ueda, Chouho Yamagishi, Osamu Goto
-
Publication number: 20020036295Abstract: The present invention provides an optical device and a surface emitting type device which have high efficiency and a stable operation and are manufactured at high manufacturing yield. The optical device and the surface emitting type device are characterized in that they have a distributed Bragg reflector (DBR) including a plurality of semiconductor layers made of a nitride semiconductor with substantially same gaps therbetween. Further, the optical device and the surface emitting type device are characterized in that they have a distributed Bragg reflector (DBR) in which a plurality of semiconductor layers made of nitride semiconductor and a plurality of organic layers made of organic material are alternately laminated.Type: ApplicationFiled: September 20, 2001Publication date: March 28, 2002Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shin-Ya Nunoue, Masayuki Ishikawa
-
Patent number: 6359322Abstract: The present disclosure relates to an avalanche photodiode having edge breakdown suppression. The photodiode comprises a p contact and an n contact, as well as a plurality of device layers disposed between the p contact and the n contact. The device layers include, in order from the p contact to the n contact, a primary well, a decoupler layer, a multiplication layer, a charge sheet, an absorption layer, and a substrate. The layers are constructed so as to have particular volumes of charge which affects the order in which they deplete. With the preferred order of depletion, the multiplication layer will deplete before the decoupler layer and the decoupler layer will deplete before the charge sheet when a negative bias is applied to the avalanche photodiode. This results in a joint opening effect within the avalanche photodiode which effectively suppresses edge breakdown.Type: GrantFiled: April 17, 2000Date of Patent: March 19, 2002Assignee: Georgia Tech Research CorporationInventors: Joe N. Haralson, Kevin F. Brennan
-
Publication number: 20020028531Abstract: A metallic surfactant, e.g., Sb, Bi, As, or atomic hydrogen is used to grow a high quality, relaxed, relatively thin SiGe buffer having a very smooth surface and a very low threading dislocation density, on which high-quality films are epitaxially grown for various applications.Type: ApplicationFiled: September 6, 2001Publication date: March 7, 2002Inventors: Kang L. Wang, Jianlin Liu
-
Publication number: 20020025594Abstract: A substrate such as a sapphire substrate or the like is set to a molecular beam epitaxy (MBE) apparatus. Next, the temperature of the substrate is elevated to the temperature which is lower than the temperature at which a predetermined ZnO based oxide semiconductor layer (i.e. function layer) is grown (S1). Then, raw materials containing oxygen radical is irradiated to the substrate to grow a buffer layer made of ZnO based oxide semiconductor (S2). Subsequently, the irradiation of oxygen radical is stopped so as to eliminate the influence of oxygen onto the buffer layer (S3). Then, the temperature of the substrate is elevated to the temperature at which the predetermined ZnO based oxide semiconductor layer is grown (S4). After that, raw materials containing oxygen radical is irradiated so as to sequentially grow a ZnO based oxide semiconductor layer as a function layer (S5).Type: ApplicationFiled: August 28, 2001Publication date: February 28, 2002Inventors: Kakuya Iwata, Paul Fons, Akimasa Yamada, Koji Matsubara, Shigeru Niki, Ken Nakahara
-
Publication number: 20010053618Abstract: A nitride semiconductor substrate including (a) a supporting substrate, (b) a first nitride semiconductor layer having a periodical T-shaped cross-section, having grown from periodically arranged stripe-like, grid-like or island-like portions on the supporting substrate, and (c) a second nitride semiconductor substrate covering said supporting substrate, having grown from the top and side surfaces of said first nitride semiconductor layer, wherein a cavity is formed under the second nitride semiconductor layer.Type: ApplicationFiled: June 15, 2001Publication date: December 20, 2001Inventors: Tokuya Kozaki, Hiroyuki Kiyoku, Kazuyuki Chocho, Hitoshi Maegawa
-
Patent number: 6326639Abstract: The present invention relates to a semiconductor hetereostructure radiation detector for wavelengths in the infrared spectral range. The semiconductor heterostructure radiation detector is provided with an active layer composed of a multiplicity of periodically recurring single-layer systems each provided with a potential well structure having at least one quantum well with subbands (quantum well), the so-called excitation zone, which is connected on one side to a tunnel barrier zone, whose potential adjacent to the excitation zone is higher than the band-edge energy of a drift zone adjoining on the other side of the potential-well structure.Type: GrantFiled: September 17, 1999Date of Patent: December 4, 2001Assignee: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung E.V.Inventors: Harald Schneider, Martin Walter
-
Patent number: 6326649Abstract: A PIN photodiode comprising a p region containing a p type dopant, an n region containing an n type dopant, an i region positioned intermediate the p region and the n region, and a relatively thick, undoped buffer region positioned between the n region and the i region which substantially decreases the capacitance of the PIN photodiode such that the photodiode bandwidth is maximized. Typically, the buffer region is formed as a layer of indium phosphide that is at least approximately 0.5 &mgr;m in thickness.Type: GrantFiled: January 13, 1999Date of Patent: December 4, 2001Assignee: Agere Systems, Inc.Inventors: Chia C. Chang, Robert Eugene Frahm, Keon M. Lee, Orval George Lorimor, Dennis Ronald Zolnowski
-
Patent number: 6323055Abstract: Described is a method for producing high purity tantalum, the high purity tantalum so produced and sputtering targets of high purity tantalum. The method involves purifying starting materials followed by subsequent refining into high purity tantalum.Type: GrantFiled: May 21, 1999Date of Patent: November 27, 2001Assignee: The Alta Group, Inc.Inventors: Harry Rosenberg, Bahri Ozturk, Guangxin Wang, Wesley LaRue
-
Patent number: 6316716Abstract: A solar cell includes a substrate carrier for current generating photoactive layers that include at least one front layer and one layer toward the substrate of different polarities, a front contact, at least one back contact and an integral protective diode which has a polarity opposite the solar cell integrated in and disposed on a front side of the solar cell and including at least one diode semiconductor layer. A tunnel diode extends between the photoactive layers and a region of the substrate toward the front, the tunnel diode being recessed adjacent the protective diode. The region of the substrate toward the front, or a layer toward the front applied to or formed by the front, together with a photoactive layer of corresponding polarity toward the front, make up the at least one diode semiconductor layer of the protective diode.Type: GrantFiled: May 9, 2000Date of Patent: November 13, 2001Assignee: Angewandte Solarenergie - Ase GmbHInventor: Just Hilgrath
-
Patent number: 6309906Abstract: The device (10) comprises a deposition chamber (12) containing two electrodes (13, 14), one of which comprises a support (16) for a substrate (17) and is earthed, the other being connected to an electric radio frequency generator (15). The device includes a mechanism (23) for extracting gas from the chamber (12) and a mechanism (18) for supplying gas. The device also comprises a mechanism for purification (31) of the gases introduced into the chamber, these a mechanism being arranged so as to reduce the number of oxygen atoms contained in the deposition gas, such gas being made up of silane, hydrogen and/or argon. The procedure consists of creating a vacuum in the deposition chamber (12), purifying the gases using purification a mechanism (31), introducing these purified gases into the chamber (12), then creating a plasma between the electrodes (13, 14). A film of intrinsic microcrystalline silicon in then deposited on the substrate.Type: GrantFiled: June 30, 1998Date of Patent: October 30, 2001Assignee: Universite de Neuchatel-Institut de MicrotechniqueInventors: Johann Meier, Ulrich Kroll
-
Publication number: 20010032666Abstract: A method and system for fabricating solid-state energy-storage and energy-conversion devices including fabrication of films for devices without an anneal step, especially for the fabrication of supercapacitors and photovoltaic cells. A film is fabricated by depositing a first material layer to a location. Energy is supplied directly to the material forming the film. The energy can be in the form of energized ions of a second material. Supplying energy directly to the material and/or the film being deposited assists the growth of the crystalline structure of the film and controls stoichiometry.Type: ApplicationFiled: March 23, 2001Publication date: October 25, 2001Applicant: Inegrated Power Solutions Inc.Inventors: Mark Lynn Jenson, Jody Jon Klaassen, Jenn-Feng Yan
-
Patent number: 6307148Abstract: An indium layer and a copper layer, and whenever necessary, a gallium layer or a gallium-alloy layer, are laminated on an electrode film formed on one of the surfaces of a substrate to form a metallic film. The metallic film is then subjected to sulfurization treatment or selenization treatment to form a p-type semiconductor layer made of “CuInS2 or CuInSe2” or “Cu(In, Ga)S2 or Cu(In, Ga)Se2”. This p-type semiconductor layer is subjected to KCN treatment, for removing impurities such as copper sulfide, copper selenide, etc., by a KCN solution, and an n-type semiconductor layer is formed on this p-type semiconductor layer to form a solar cell. In this instance, the indium layer is formed under heating, or is heat-treated by heat-treatment while the surface of the indium layer is exposed.Type: GrantFiled: March 27, 2000Date of Patent: October 23, 2001Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kenji Takeuchi, Yoshio Onuma, Sumihiro Ichikawa
-
Patent number: 6300558Abstract: A solar cell comprises at least a germanium (Ge) substrate, buffer layers formed on the germanium substrate, a first InxGa1-xAs layer of first conductivity type formed on the buffer layers, and a second InxGa1-xAs layer of second conductivity type formed on the first InxGa1-xAs layer to form pn junction. Because the composition x of In contained in the first InxGa1-xAs layer and the second InxGa1-xAs layer is in a range of 0.005≦x≦0.015, the inexpensive and high conversion efficiency solar cell can be achieved.Type: GrantFiled: April 20, 2000Date of Patent: October 9, 2001Assignee: Japan Energy CorporationInventors: Tatsuya Takamoto, Hiroshi Kurita, Takaaki Agui, Eiji Ikeda
-
Patent number: 6297442Abstract: It is to provide an essentially transparent solar cell of high efficiency that can be used by accumulating with a display device to generate electricity simultaneously with utilization of the display function, a self-power-supply display device comprising the same, and a process for producing the solar cell. The solar cell comprises at least a transparent conductive substrate having thereon a photoconductor layer that is transparent to a visible ray and has an absorbance of 0.8 or less at a wavelength of from 400 to 800 nm, and a transparent conductive electrode in this order. An embodiment, in which the photoconductor layer contains at least one element selected from Group IIIA elements and at least one element selected from Group VA elements in the Periodic Table, and an embodiment, in which the photoconductor layer contains a metallic oxide semiconductor, are preferred.Type: GrantFiled: October 7, 1999Date of Patent: October 2, 2001Assignee: Fuji Xerox Co., Ltd.Inventors: Shigeru Yagi, Seiji Suzuki, Nobuyuki Torigoe
-
Publication number: 20010006840Abstract: A method for growing a compound semiconductor includes a first formation step of forming a first group III-V compound layer; a second formation step of forming a second group III-V compound layer including nitrogen and at least one group V element other than nitrogen as a group V composition; and a third formation step of forming a third group III-V compound layer between the first group III-V compound layer and the second group III-V compound layer, the third group III-V compound layer being formed for controlling a reactivity of the second group III-V compound layer with a nitrogen source used in the second formation step.Type: ApplicationFiled: December 26, 2000Publication date: July 5, 2001Inventor: Koji Takahashi
-
Patent number: 6242328Abstract: A method of activating a compound semiconductor layer into a p-type compound semiconductor layer is provided. In order to reduce the electrical conductivity of the compound semiconductor layer grown by a VPE method, electromagnetic waves having energy larger than the band gap of the compound semiconductor layer are irradiated and annealing is performed. If the amount of the p-type impurities contained in the layer during growth thereof increases, the resistivity of the layer increases and an annealing temperature is lowered. Also, the contact resistance between the compound semiconductor layer and an electrode is reduced.Type: GrantFiled: May 10, 1999Date of Patent: June 5, 2001Assignee: Samsung Electronics Co., Ltd.Inventor: Hyun-eoi Shin
-
Patent number: 6239449Abstract: A photodetector capable of normal incidence detection over a broad range of long wavelength light signals to efficiently convert infrared light into electrical signals. It is capable of converting long wavelength light signals into electrical signals with direct normal incidence sensitivity without the assistance of light coupling devices or schemes. In the apparatus, stored charged carriers are ejected by photons from quantum dots, then flow over the other barrier and quantum dot layers with the help of an electric field produced with a voltage applied to the device, producing a detectable photovoltage and photocurrent. The photodetector has multiple layers of materials including at least one quantum dot layer between an emitter layer and a collector layer, with a barrier layer between the quantum dot layer and the emitter layer, and another barrier layer between the quantum dot layer and the collector.Type: GrantFiled: April 14, 1999Date of Patent: May 29, 2001Assignee: National Research Council of CanadaInventors: Simon Fafard, Hui Chun Liu
-
Patent number: 6239354Abstract: A monolithically interconnected photovoltaic module having cells which are electrically connected which comprises a substrate, a plurality of cells formed over the substrate, each cell including a primary absorber layer having a light receiving surface and a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, and a cell isolation diode layer having a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, the diode layer intervening the substrate and the absorber layer wherein the absorber and diode interfacial regions of a same conductivity type orientation, the diode layer having a reverse-breakdown voltage sufficient to prevent inter-cell shunting, and each cell electrically isolated from adjacent cells with a vertical trench trough the pn-junction of the diode layer, interconnects disposed in the trenches contacting the absorber regions of adjaType: GrantFiled: October 8, 1999Date of Patent: May 29, 2001Assignee: Midwest Research InstituteInventor: Mark W. Wanlass
-
Patent number: 6232141Abstract: A semiconductor light-receiving device including (a) a semiconductor substrate, (b) a multi-layered including a first buffer layer having a first electrical conductivity and lying on the semiconductor substrate, a first clad layer having a first electrical conductivity and lying on the first buffer layer, a light-absorbing layer having a first electrical conductivity and lying on the first clad layer, a second clad layer having a second electrical conductivity and lying on the light-absorbing layer, and a second buffer layer having a second electrical conductivity and lying on the second clad layer, (c) a first electrode formed on the second buffer layer, and (d) a second electrode formed on a lower surface of the semiconductor substrate. The multi-layered structure has at least one portion which is inclined to a direction in which a light introduced into the device is directed. For instance, the multi-layered structure has opposite end portions inclined to the direction.Type: GrantFiled: December 7, 1999Date of Patent: May 15, 2001Assignee: NEC CorporationInventor: Atsuhiko Kusakabe
-
Patent number: 6232547Abstract: In a method of manufacturing a solar cell, a phase A is deposited in the form of stacks on an electrically conductive substrate, wherein the stacks are covalently and electrically interconnected and also connected to the substrate, and any spaces between the stacks are filled with a phase B, which is electrically connected to a counter electrode, wherein the phases A and B are so selected that they form a photovoltaic active transition structure or an injection contact. The invention also resides in a solar cell made in accordance with this method.Type: GrantFiled: March 20, 2000Date of Patent: May 15, 2001Assignee: Forschungszentrum Jülich GmbHInventors: Dieter Meissner, Klaus Kohrs
-
Patent number: 6229152Abstract: The use of highly compressively strained In1−xGaxAs quantum wells having a high In content for the detection of light to a wavelength of &lgr;≈2.1 &mgr;m is disclosed. Crystal quality is maintained through strain compensation using tensile strained barriers of InGaAs, InGaP, or InGaAsP. High efficiencies have been achieved in detectors fabricated using this technique. The theoretical cutoff wavelength limit for diodes fabricated using this technique is calculated to be &lgr;˜2.1 &mgr;m. Lattice mismatched layers may be used to transition between compressively strained layers and tensile strained layers to prevent the crystal from breaking up. Multiple quantum wells are formed with multiple periods of strained InGaAs, transition layers and tensile strained layers. These detectors have application in semiconductor, amplifiers, detectors, optical switches, images, etc.Type: GrantFiled: February 18, 1999Date of Patent: May 8, 2001Assignee: The Trustees of Princeton UniversityInventors: John C. Dries, Stephen R. Forrest, Milind Gokhale
-
Patent number: 6218684Abstract: A half-transmittance photodiode usable as a photodetector in receivers for “ping-pong transmission” is improved in temperature characteristic, so that a half-transmittance photodiode usable at low temperatures is available. A p-n junction is formed in a buffer layer, not in an absorption layer.Type: GrantFiled: December 7, 1998Date of Patent: April 17, 2001Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yoshiki Kuhara, Yasuhiro Iguchi, Tadashi Saito, Hitoshi Terauchi
-
Patent number: 6218212Abstract: An apparatus for growing a mixed compound semiconductor layer utilizing three or more source gases. The apparatus includes a horizontal type reactor chamber. The reactor chamber includes a partition plate separating an upstream region of the reactor chamber into an upper region and a lower region. The upper and lower regions are joined together forming a growth region in a downstream region of the reactor chamber. First and second inlet ports are provided at an upstream end of the lower region for admitting first and second source gases, respectively. A third inlet port is provided at an upstream end of the upper region for admitting a third source gas. An outlet port is provided at a downstream end of the growth region for exhaust. A substrate stage is arranged in the growth region so that the substrate surface is exposed to the growth region and forms a smooth surface for allowing a laminar gas flow.Type: GrantFiled: February 18, 1994Date of Patent: April 17, 2001Assignee: Fujitsu LimitedInventors: Tetsuo Saito, Hironori Nishino, Satoshi Murakami, Yoichiro Sakachi
-
Patent number: 6191437Abstract: An n-type layer (3) and a p-type layer (5) which are made of a gallium nitride based compound semiconductor are provided on a substrate (1) so that a light emitting layer forming portion (10) for forming a light emitting layer is provided. A gallium nitride based compound semiconductor layer containing oxygen is used for at least one layer of the light emitting layer forming portion (10). In the case where a buffer layer (2) made of the gallium nitride based compound semiconductor or aluminum nitride is provided between the substrate (1) and the light emitting layer forming portion (10), the buffer layer (2) and/or at least one layer of the light emitting layer forming portion (10) may contain oxygen. By such a structure, crystal defects of the semiconductor layer of the light emitting layer forming portion (10) can be decreased and a luminance can highly be enhanced. Thus, it is possible to obtain a blue color type semiconductor light emitting device having a high luminance.Type: GrantFiled: September 21, 1999Date of Patent: February 20, 2001Assignee: Rohm Co., Ltd.Inventors: Masayuki Sonobe, Shunji Nakata, Tsuyoshi Tsutsui, Norikazu Itoh
-
Patent number: 6180432Abstract: A radiated energy to electrical energy conversion device and technology is provided where there is a single absorber layer of semiconductor material. The thickness of the absorber layer is much less than had been appreciated as being useful heretofore in the art. Between opposing faces the layer is about ½ or less of the carrier diffusion length of the semiconductor material which is about 0.02 to 0.5 micrometers. The thickness of the absorber layer is selected for maximum electrical signal extraction efficiency and may also be selected to accommodate diffusion length damage over time by external radiation.Type: GrantFiled: April 10, 2000Date of Patent: January 30, 2001Assignee: Interface Studies, Inc.Inventor: John Lawrence Freeouf
-
Patent number: 6180967Abstract: A dual-band planar infrared detector with space-time coherence, with a stack of semiconductor layers (16, 18, 20, 21) forming first and second photodiodes. The detector has a planar structure in which each layer has a part showing on a surface (22) substantially perpendicular to the stack.Type: GrantFiled: December 29, 1998Date of Patent: January 30, 2001Assignee: Commissariat a l'Energie AtomiqueInventors: Jean-Paul Zanatta, Pierre Ferret, Philippe Duvaut
-
Patent number: 6150667Abstract: Disclosed is an electroabsorption-type optical modulator, which includes a semiconductor substrate; and a semiconductor buffer layer, a semiconductor optical absorption layer and a semiconductor cladding layer which are layered in order on the semiconductor substrate. The absorption of a light wave supplied to an end of the semiconductor optical absorption layer is controlled by changing the intensity of an electric field applied to the semiconductor optical absorption layer. The semiconductor optical absorption layer has a first region with an absorption-edge wave length shorter than that of a second region of the semiconductor optical absorption layer.Type: GrantFiled: May 21, 1997Date of Patent: November 21, 2000Assignee: NEC CorporationInventors: Masashige Ishizaka, Hiroyuki Yamazaki
-
Patent number: 6140145Abstract: This is an integral IR detector system with at least two epitaxial HgCdTe sensors on integrated silicon or GaAs circuitry and also a method of fabricating such system. The system can comprise: a) integrated silicon or GaAs circuitry 110; b) an epitaxial lattice-match layer (e.g. ZnSe 114) on a top surface of the circuit; c) an epitaxial insulating layer (e.g. CdTe 102) on the lattice-match layer; and d) at least two epitaxial HgCdTe sensors 101,121 on the insulating layer, with the HgCdTe sensors being electrically connected to the circuitry. Preferably, the circuitry is silicon. Preferably, an IR transparent, spacer layer (e.g. CdTe 120 or CdZnTe) is on the HgCdTe sensors and an HgCdTe filter 122 is on the spacer layer. Preferably, at least one of the HgCdTe sensors and the HgCdTe filter is laterally continuously graded.Type: GrantFiled: April 13, 1999Date of Patent: October 31, 2000Assignee: Raytheon CompanyInventors: Dipankar Chandra, Donald F. Weirauch, Thomas C. Penn
-
Patent number: 6137123Abstract: A GaN/AlGaN heterojunction bipolar phototransistor having AlGaN contact, i-GaN absorbing, p-GaN base and n-GaN emitter layers formed, in that order, on a UV transparent substrate. The phototransistor has a gain greater than 10.sup.5. From 360 nm to 400 nm, eight orders of magnitude drop in responsivity was achieved. The phototransistor features a rapid electrical quenching of persistent photoconductivity, and exhibits high dark impedance and no DC drift. By changing the frequency of the quenching cycles, the detection speed of the phototransistor can be adjusted to accommodate specific applications. These results represent an internal gain UV detector with significantly improved performance over GaN based photo conductors.Type: GrantFiled: August 17, 1999Date of Patent: October 24, 2000Assignee: Honeywell International Inc.Inventors: Wei Yang, Thomas E. Nohava, Scott A. McPherson, Robert C. Torreano, Holly A. Marsh, Subash Krishnankutty
-
Patent number: 6130441Abstract: By using wafer fusion, various structures for photodetectors and photodetectors integrated with other electronics can be achieved. The use of silicon as a multiplication region and III-V compounds as an absorption region create photodetectors that are highly efficient and tailored to specific applications. Devices responsive to different regions of the optical spectrum, or that have higher efficiencies are created.Type: GrantFiled: March 19, 1999Date of Patent: October 10, 2000Assignee: The Regents of the University of CaliforniaInventors: John E. Bowers, Aaron R. Hawkins
-
Patent number: 6117690Abstract: Thin, horizontal-plane Hall sensors for read-head in magnetic recordings and methods for fabricating the sensor provide a novel sensor exhibiting high sensitivity and high spatial resolution.Type: GrantFiled: February 1, 1999Date of Patent: September 12, 2000Assignee: NEC Research Institute, Inc.Inventors: James Bennett, Stuart A. Solin, Richard A. Stradling, Tineke Thio
-
Patent number: 6110758Abstract: An improved photocathode and image intensifier tube are disclosed along with a method for making both the tube and photocathode. The disclosed photocathode and image intensifier tube have an active layer comprising two or more sublayers. The first sublayer has a first concentration of a group III-V semiconductor compound while the second sublayer has a second concentration of the group III-V semiconductor compound. The multilayer active layer is coupled to a window layer.Type: GrantFiled: November 8, 1999Date of Patent: August 29, 2000Assignee: Litton Systems, Inc.Inventors: Joseph P. Estrera, Keith T. Passmore, Timothy W. Sinor
-
Patent number: 6107652Abstract: A metal-semiconductor-metal photodetector including an absorbent layer, a barrier layer of greater forbidden band energy on which there are deposited Schottky electrodes and a transition layer of graded composition, the photodetector including a doping plane situated in the vicinity of the join between the absorbent layer and the transition layer of graded composition.Type: GrantFiled: January 16, 1998Date of Patent: August 22, 2000Assignee: France TelecomInventors: Andre Scavennec, Abdelkader Temmar
-
Patent number: 6100111Abstract: A method of fabricating a semiconductor device on a substrate, wherein the substrate comprises a first layer of doped silicon carbide of a first conducting type and exhibits at least one hollow defect. In a first step the positions of the hollow defects in the substrate are identified, whereafter a second SiC layer of a second conducting type is formed in contact with the first layer, whereafter the first and second layer constituting the pn junction are provided with at least one edge termination surrounding any hollow defect, whereby the defect is excluded from the high-field region of the device.Type: GrantFiled: April 6, 1998Date of Patent: August 8, 2000Assignee: ABB Research Ltd.Inventor: Andrei Konstantinov
-
Patent number: 6043106Abstract: A method for reducing the leakage current in CZT crystals, particularly Cd.sub.1-x Zn.sub.x Te crystals (where x is greater than equal to zero and less than or equal to 0.5), and preferably Cd.sub.0.9 Zn.sub.0.1 Te crystals, thereby enhancing the ability of these crystal to spectrally resolve radiological emissions from a wide variety of radionuclides. Two processes are disclosed. The first method provides for depositing, via reactive sputtering, a silicon nitride hard-coat overlayer which provides significant reduction in surface leakage currents. The second method enhances the passivation by oxidizing the CZT surface with an oxygen plasma prior to silicon nitride deposition without breaking the vacuum state.Type: GrantFiled: July 16, 1998Date of Patent: March 28, 2000Inventors: Mark J. Mescher, Ralph B. James, Tuviah E. Schlesinger, Haim Hermon
-
Patent number: 6015721Abstract: A method of manufacturing an avalanche photodiode capable of effectively preventing edge breakdown is disclosed. First, so as to manufacture an avalanche photodiode an absorption layer, a grading layer, a charge sheet layer of a first conductivity type and a multiplying layer are formed in sequence on a compound semiconductor substrate of the first conductivity type. Then, a concave portion is formed within multiplying layer at the central portion thereof. A first diffusion layer of the second conductivity type is formed to a first thickness within the multiplying layer so as to surround the concave portion. Next, a second diffusion layer of second conductivity type is formed within the multiplying layer to a second depth deeper than the first depth by extending the first diffusion layer and simultaneously a floating guard-ring, separated from the second diffusion with a selected distance is formed within the multiplying layer.Type: GrantFiled: December 23, 1997Date of Patent: January 18, 2000Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Don-Soo Kim
-
Patent number: 5985687Abstract: Optically flat cleaved facet mirrors are fabricated in GaN epitaxial films grown on sapphire by wafer fusing a GaN film with a sapphire substrate to a cubic substrate such as an InP or GaAs substrate. The sapphire substrate may then partially or entirely removed by lapping, dry etching, or wet etching away a sacrificial layer disposed in the interface between the sapphire substrate and the GaN layer. Thereafter, the cubic InP or GaN substrate is cleaved to produce the cubic crystal facet parallel to the GaN layer in which active devices are fabricated for use in lasers, photodetectors, light emitting diodes and other optoelectronic devices.Type: GrantFiled: April 12, 1996Date of Patent: November 16, 1999Assignee: The Regents of the University of CaliforniaInventors: John E. Bowers, R. Kehl Sink, Steven P. Denbaars
-
Patent number: 5953617Abstract: A method for manufacturing an optoelectronic integrated circuit including a photo diode for transforming light into electric signals, an HBT for amplifying said electric signals from said photo diode, a capacitor, and a resistor is disclosed. An HBT including an emitter, a base, and a collector on a predetermined location of a semiconductor substrate, and a photo diode including an N type metal, non doped layer, and a P type metal are formed. A lower electrode of a capacitor is formed on the semiconductor substrate located in a place separated by a predetermined space from said photo diode. A SiN film is deposited over the surface of the resulting structure of the semiconductor substrate. The above described SiN film is patterned to exist only on the surfaces of the HBT, photo diode, lower electrode, and semiconductor substrate separated from the lower electrode by a predetermined space. Furthermore, a resistor is formed on the SiN film existing on a predetermined surface of the semiconductor substrate.Type: GrantFiled: October 17, 1997Date of Patent: September 14, 1999Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Joon-Woo Lee
-
Patent number: 5933706Abstract: A method for treatment of the surface of a CdZnTe (CZT) crystal that reduces surface roughness (increases surface planarity) and provides an oxide coating to reduce surface leakage currents and thereby, improve resolution. A two step process is disclosed, etching the surface of a CZT crystal with a solution of lactic acid and bromine in ethylene glycol, following the conventional bromine/methanol etch treatment, and after attachment of electrical contacts, oxidizing the CZT crystal surface.Type: GrantFiled: May 28, 1997Date of Patent: August 3, 1999Inventors: Ralph James, Arnold Burger, Kuo-Tong Chen, Henry Chang
-
Patent number: 5923953Abstract: A process for forming a UV sensitive gallium nitride layer includes a step of depositing a layer of aluminum nitride on which the gallium nitride layer is deposited. Two tests, sheet resistance and photoluminescent response of the gallium nitride layer, allow one to determine that a particular gallium nitride layer produced by the process will have the required response to UV radiation. Either a careful calibration which determines a required length of the aluminum nitride deposition time, or the introduction of silicon into the gallium nitride layer during its deposition, has been found to result in deposit of a gallium nitride layer which has superior UV sensing characteristics.Type: GrantFiled: January 27, 1997Date of Patent: July 13, 1999Assignee: Honeywell Inc.Inventors: Barbara Goldenberg Barany, Scott A. McPherson, Scott T. Reimer, Robert P. Ulmer, J. David Zook, Maurice L. Hitchell, deceased
-
Patent number: 5920798Abstract: A semiconductor layer for photoelectric transfer device for forming a p-n junction, which has large surface area and uniform film pressure, is formed in the atmosphere under normal pressure for several minutes. The semiconductor layer for forming a p-n junction is composed of a compound semiconductor of a Group II element(selected from the group consisting of Cd, Zn and Hg)-Group VI element(selected from the group consisting of S and Te). A semiconductor layer having a p or n conductive type is formed on a substrate by pyrolytically decomposing an organometallic compound containing a II-VI group atom bond. A semiconductor film is formed on the surface of a substrate by dispersing or dissolving an organometallic compound in a solvent to form a solution, applying ink on the surface of the substrate using a suitable printing method and subjecting to a heat treatment.Type: GrantFiled: May 28, 1997Date of Patent: July 6, 1999Assignee: Matsushita Battery Industrial Co., Ltd.Inventors: Hiroshi Higuchi, Akira Hanafusa, Kuniyoshi Omura, Mikio Murozono, Hideaki Oyama
-
Patent number: 5910014Abstract: InGaAs photodiodes are produced on an epitaxial InP wafer having an InP substrate, epitaxially grown layers and an InGaAs light sensing layer. An insulating protection film of SixNy or SiOx with openings is selectively deposited on the epitaxial wafer. Compound semiconductor undercoats of a compound semiconductor with a narrower band gap than InP are grown on the InP window layers at the openings by utilizing the protection film as a mask. A p-type impurity from a solid source or a gas source is diffused through the undercoats and the epitaxial InP layer into the InGaAs sensing layer. Then, either p-electrodes are formed on the undercoats and the undercoats are etched by utilizing the p-electrodes as a mask, or the undercoats are shaped by selective etching in a form of p-electrodes and the p-electrodes are formed on the undercoats.Type: GrantFiled: January 23, 1996Date of Patent: June 8, 1999Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takashi Iwasaki, Nobuhisa Tanaka, Yasuhiro Iguchi, Naoyuki Yamabayashi
-
Patent number: 5851310Abstract: An indium phosphide photovoltaic cell is provided where one or more quantum wells are introduced between the conventional p-conductivity and n-conductivity indium phosphide layer. The approach allows the cell to convert the light over a wider range of wavelengths than a conventional single junction cell and in particular convert efficiently transparency losses of the indium phosphide conventional cell. The approach hence may be used to increase the cell current output.A method of fabrication of photovoltaic devices is provided where ternary InAsP and InGaAs alloys are used as well material in the quantum well region and results in an increase of the cell current output.Type: GrantFiled: December 6, 1995Date of Patent: December 22, 1998Assignee: University of HoustonInventors: Alexandre Freundlich, Philippe Renaud, Mauro Francisco Vilela, Abdelhak Bensaoula
-
Patent number: 5801071Abstract: A semiconductor laser diode apparatus has a substrate of a first conduction type, a first clad layer of the first conduction type which is formed on the substrate, a current block layer which is formed on the first clad layer, a V groove stripe which is formed in a vertical direction so that a tip of the V groove can arrive at the first clad layer in depth, an active layer which is formed on the first clad layer and the current block layer along the V groove stripe without a low resistance layer, a second clad layer of a second conduction type which is formed on the active layer, a contact layer of the second conduction type which is formed on the second clad layer, a first electrode which is formed on a surface of the substrate which is reverse side of a surface on which the first clad layer is formed and a second electrode which is formed oil a surface of the contact layer. Therefore a low threshold current level can be achieved.Type: GrantFiled: July 9, 1996Date of Patent: September 1, 1998Assignee: Ricoh Company, Ltd.Inventor: Takashi Takahashi
-
Patent number: 5800630Abstract: A monolithic, tandem photovoltaic device is provided having an indium phosphide tunnel junction lattice-matched to adjoining subcells and having high peak current densities and low electrical resistance. A method is provided for relatively low-temperature epitaxial growth of a tunnel junction and a subcell over the tunnel junction at temperatures which leave intact the desirable characteristics of the tunnel junction.Type: GrantFiled: December 5, 1994Date of Patent: September 1, 1998Assignee: University of HoustonInventors: Mauro F. Vilela, Abdelhak Bensaoula, Alexandre Freundlich, Philippe Renaud, Nasr-Eddine Medelci
-
Patent number: 5769964Abstract: A thermophotovoltaic energy conversion device and a method for making the device. The device includes a substrate formed from a bulk single crystal material having a bandgap (E.sub.g) of 0.4 eV<E.sub.g <0.7 eV and an emitter fabricated on the substrate formed from one of a p-type or an n-type material. Another thermophotovoltaic energy conversion device includes a host substrate formed from a bulk single crystal material and lattice-matched ternary or quaternary III-V semiconductor active layers.Type: GrantFiled: August 29, 1996Date of Patent: June 23, 1998Assignee: The United States of America as reprresented by the United States Department of EnergyInventors: Greg W. Charache, Paul F. Baldasaro, Greg J. Nichols
-
Patent number: H1835Abstract: A photoconductive switching device is disclosed that has an enhanced speed of response so that its closed (low) and open (high) resistive states are obtained in response to optical illumination in the less than nanosecond regime. The enhanced speed of response is achieved by neutron irradiation of a material preferably comprising GaAs:Si:Cu. An application of the improved photoconductive switching devices is disclosed which allows the realization of a high-power, frequency-agile RF source topology.Type: GrantFiled: January 24, 1997Date of Patent: February 1, 2000Assignee: The United States of America as represented by the Secretary of the NavyInventors: David C. Stoudt, Michael A. Richardson