Compound Semiconductor Patents (Class 438/93)
-
Patent number: 7883998Abstract: It is to provide a vapor phase growth method in which an epitaxial layer consisting of a compound semiconductor such as InAlAs, can be grown, with superior reproducibility, on a semiconductor substrate such as Fe-doped InP. In vapor phase growth method for growing an epitaxial layer on a semiconductor substrate, a resistivity of the semiconductor substrate at a room temperature is previously measured, a set temperature of the substrate is controlled depending on the resistivity at the room temperature such that a surface temperature of the substrate is a desired temperature regardless of the resistivity of the semiconductor substrate, and the epitaxial layer is grown.Type: GrantFiled: February 15, 2005Date of Patent: February 8, 2011Assignee: Nippon Mining & Metals Co., Ltd.Inventors: Masashi Nakamura, Suguru Oota, Ryuichi Hirano
-
Publication number: 20110027938Abstract: Disclosed is a method of fabricating a thin film solar cell including introducing a reaction solution into a reaction chamber, fixing a supporter onto a loader, disposing the loader in the reaction chamber to immerse the supporter into the reaction solution, and heating the supporter and coating a buffer layer. In addition, an apparatus of fabricating a thin film solar cell including a reaction chamber mounted with an inlet of a reaction solution and an outlet of waste water, and a loader disposed in the reaction chamber and being capable of moving up and down, is disclosed.Type: ApplicationFiled: April 15, 2010Publication date: February 3, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Donggi AHN
-
Publication number: 20110024859Abstract: A photoelectric conversion device has a high S/N ratio and can increase the detection efficiency even under a low luminance. The photoelectric conversion device generates an increased electric charge by impact ionization in a photoelectric conversion unit formed from a chalcopyrite type semiconductor, so as to improve dark current characteristic.Type: ApplicationFiled: March 30, 2009Publication date: February 3, 2011Applicant: Rohm Co., LtdInventors: Kenichi Miyazaki, Osamu Matsushima, Shigeru Niki, Keiichiro Sakurai, Shogo Ishizuka
-
Publication number: 20110023948Abstract: One embodiment in accordance with the invention is a solar cell comprising a non-single crystal substrate; a nanowire grown from a surface of the non-single crystal substrate; and an electrode coupled to the nanowire, wherein the nanowire is electrically conductive and is for absorbing electromagnetic wave and generating a current.Type: ApplicationFiled: July 19, 2010Publication date: February 3, 2011Inventors: Shih-Yuan Wang, Nobuhiko KOBAYASHI
-
Publication number: 20110020978Abstract: A method of processing a plurality of photovoltaic materials in a batch process includes providing at least one transparent substrate having an overlying first electrode layer and an overlying copper species based absorber precursor layer within an internal region of a furnace. The overlying copper species based absorber precursor layer has an exposed face. The method further includes disposing at least one soda lime glass comprising a soda lime glass face within the internal region of the furnace such that the soda lime glass face is adjacent by a spacing to the exposed face of the at least one transparent substrate. Furthermore, the method includes subjecting the at least one transparent substrate and the one soda lime glass to thermal energy to transfer one or more sodium bearing species from the soda lime glass face across the spacing into the copper species based absorber precursor layer via the exposed face.Type: ApplicationFiled: September 25, 2009Publication date: January 27, 2011Applicant: STION CORPORATIONInventor: ROBERT D. WIETING
-
Patent number: 7875511Abstract: A CMOS structure includes an n-FET device comprising an n-FET channel region and a p-FET device comprising a p-FET channel region. The n-FET channel region includes a first silicon material layer located upon a silicon-germanium alloy material layer. The p-FET channel includes a second silicon material layer located upon a silicon-germanium-carbon alloy material layer. The silicon-germanium alloy material layer induces a desirable tensile strain within the n-FET channel. The silicon-germanium-carbon alloy material layer suppresses an undesirable tensile strain within the p-FET channel region. A silicon-germanium-carbon alloy material from which is comprised the silicon-germanium-carbon alloy material layer may be formed by selectively incorporating carbon into a silicon-germanium alloy material from which is formed the silicon-germanium alloy material layer.Type: GrantFiled: March 13, 2007Date of Patent: January 25, 2011Assignee: International Business Machines CorporationInventors: Liu Yaocheng, Ricardo A. Donaton, Kern Rim
-
Publication number: 20110005570Abstract: A solar cell structure and a method for fabricating the solar cell structure is provided, where the cell structure includes a plurality of solar cells, wherein each of the solar cells is separated from each adjacent solar cell via at least one of a tunnel junction or a resonant tunneling structure interface, wherein each of the plurality of solar cells is at least partially constructed from a semiconductor material, wherein the semiconductor material has an energy band gap that harnesses photons having energies in a predetermined energy range which is responsive to its energy gap, and wherein each of the plurality of solar cells includes at least one of a p-n junction, an n-p junction, or a Schottky interface, and wherein each of the plurality of solar cells is configured to harness energies in a different solar spectral energy range than the other of the plurality of solar cells.Type: ApplicationFiled: July 9, 2010Publication date: January 13, 2011Inventor: Faquir Chand Jain
-
Publication number: 20110005588Abstract: A photovoltaic device with a low degradation rate and a high stability efficiency. In one aspect, the photovoltaic device includes: a substrate; a first electrode disposed on the substrate; at least one photoelectric transformation layer disposed on the first electrode, the photoelectric transformation layer including a light absorbing layer; and a second electrode disposed on the photoelectric transformation layer; wherein the light absorbing layer includes the first sub-layer and the second sub-layer, the first sub-layer including hydrogenated micro-crystalline silicon germanium (?c-SiGe:H) and an amorphous silicon germanium network (a-SiGe:H) formed among the hydrogenated micro-crystalline silicon germaniums, the second sub-layer including hydrogenated micro-crystalline silicon (?c-Si:H) and an amorphous silicon network (a-Si:H) formed among the hydrogenated micro-crystalline silicons.Type: ApplicationFiled: April 19, 2010Publication date: January 13, 2011Inventor: Seung-Yeop Myong
-
Publication number: 20100330734Abstract: In a manufacturing process of a solar cell comprising an amorphous silicon unit in which a p-type layer, an i-type layer, and an n-type layer are layered, in a step of forming the p-type layer, a doping concentration of a p-type dopant included in the p-type layer is increased as a distance from the i-type layer is increased, and in particular, a high-absorption amorphous silicon carbide layer and a low-absorption amorphous silicon carbide layer are consecutively formed while a state of plasma generation is maintained.Type: ApplicationFiled: June 29, 2010Publication date: December 30, 2010Applicant: SANYO ELECTRIC CO., LTD.Inventors: Mitsuhiro Matsumoto, Makoto Nakagawa
-
Patent number: 7858872Abstract: The present invention discloses thin film photovoltaic devices comprising Group II-VI semiconductor layers with a substrate configuration having an interface layer between the back electrode and the absorber layer capable of creating an ohmic contact in the device. The present invention discloses thin film photovoltaic devices comprising Group II-VI semiconductor layers with a superstrate configuration having an interface layer between the back electrode and the absorber layer capable of creating an ohmic contact in the device where the interface layer comprises nanoparticles or nanoparticles that are sintered.Type: GrantFiled: March 13, 2009Date of Patent: December 28, 2010Assignee: Solexant Corp.Inventors: Charlie Hotz, Puthur D. Paulson, Craig Leidholm, Damoder Reddy
-
Publication number: 20100319764Abstract: Tunnel junctions are improved by providing a rare earth-Group V interlayer such as erbium arsenide (ErAs) to yield a mid-gap state-assisted tunnel diode structure. Such tunnel junctions survive thermal energy conditions (time/temperature) in the range required for dilute nitride material integration into III-V multi-junction solar cells.Type: ApplicationFiled: June 21, 2010Publication date: December 23, 2010Applicant: Solar Junction Corp.Inventors: Michael W. Wiemer, Homan B. Yuen, Vijit A. Sabnis, Michael J. Sheldon, Ilya Fushman
-
Patent number: 7855096Abstract: A semiconductor film is formed on a GaAs substrate (semiconductor substrate). An SiO2 film (insulating film) is formed on the semiconductor film, and the SiO2 film is patterned. The semiconductor film is etched using the SiO2 film as a mask to form a mesa structure. The surface of the SiO2 film is treated by ashing, using SF6 gas (fluorine-containing gas), to terminate the surface of the SiO2 film with fluorine. The mesa structure is selectively buried with a III-V compound semiconductor film, using the SiO2 film having the surface that has been terminated by fluorine, as a mask.Type: GrantFiled: February 20, 2008Date of Patent: December 21, 2010Assignee: Mitsubishi Electric CorporationInventors: Chikara Watatani, Toru Takiguchi
-
Publication number: 20100313948Abstract: A photovoltaic device with a low degradation rate and a high stability efficiency. In one aspect, the photovoltaic device includes: a substrate; a first electrode disposed on the substrate; at least one photoelectric transformation layer disposed on the first electrode, the photoelectric transformation layer including a light absorbing layer; and a second electrode disposed on the photoelectric transformation layer; and wherein the light absorbing layer included in at least the one photoelectric transformation layer includes a first sub-layer and a second sub-layer, each of which includes hydrogenated amorphous silicon based material and a crystalline silicon grain respectively.Type: ApplicationFiled: April 19, 2010Publication date: December 16, 2010Inventor: Seung-Yeop Myong
-
Publication number: 20100307583Abstract: A solar cell comprises an amorphous silicon solar cell unit in which a p-type layer, an i-type layer, and an n-type layer are laminated. The p-type layer includes a high-concentration amorphous silicon carbide layer doped with a p-type dopant and an amorphous silicon buffer layer which is substantially undoped with the p-type dopant. Then, a band gap of the amorphous silicon buffer layer is defined to be 1.65 eV or greater.Type: ApplicationFiled: March 30, 2010Publication date: December 9, 2010Applicant: SANYO ELECTRIC CO., LTD.Inventor: Mitsuhiro Matsumoto
-
Publication number: 20100307591Abstract: A method for forming a single-junction photovoltaic cell includes forming a dopant layer on a surface of a semiconductor substrate; diffusing the dopant layer into the semiconductor substrate to form a doped layer of the semiconductor substrate; forming a metal layer over the doped layer, wherein a tensile stress in the metal layer is configured to cause a fracture in the semiconductor substrate; removing a semiconductor layer from the semiconductor substrate at the fracture; and forming the single junction photovoltaic cell using the semiconductor layer. A single-junction photovoltaic cell includes a doped layer comprising a dopant diffused into a semiconductor substrate; a patterned conducting layer formed on the doped layer; a semiconductor layer comprising the semiconductor substrate located on the doped layer on a surface of the doped layer opposite the patterned conducting layer; and an ohmic contact layer formed on the semiconductor layer.Type: ApplicationFiled: February 26, 2010Publication date: December 9, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen W. Bedell, Norma E. Sosa Cortes, Keith E. Fogel, Devendra Sadana, Davood Shahrjerdi, Brent A. Wacaser
-
Patent number: 7845073Abstract: A method of manufacturing a circuit board embedding a thin film capacitor, the method including: forming a sacrificial layer on a first substrate; forming a dielectric layer on the sacrificial layer; forming a first electrode layer on the dielectric layer; disposing the first substrate on the second substrate in such a way that the first electrode layer is bonded to a top of a second substrate; decomposing the sacrificial layer by irradiating a laser beam onto the sacrificial layer through the first substrate; separating the first substrate from the second substrate; and forming a second electrode layer on the dielectric layer.Type: GrantFiled: December 10, 2007Date of Patent: December 7, 2010Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: In Hyung Lee, Yul Kyo Chung, Bae Kyun Kim, Seung Eun Lee, Jung Won Lee
-
Publication number: 20100301320Abstract: An organic optoelectronic device and a method for manufacturing the same are disclosed. In one aspect, the device has a stack of layers. The stack includes a buffer layer and a first organic semiconductor layer adjacent to the buffer layer at a first side of the buffer layer. The buffer layer includes at least one transition metal oxide doped with a metal.Type: ApplicationFiled: May 27, 2010Publication date: December 2, 2010Applicant: IMECInventors: Barry Rand, David Cheyns, Benjamin Kam
-
Patent number: 7842534Abstract: A method is provided for fabricating a thin film semiconductor device. The method includes providing a plurality of raw semiconductor materials. The raw semiconductor materials undergo a pre-reacting process to form a homogeneous compound semiconductor target material. The compound semiconductor target material is deposited onto a substrate to form a thin film having a composition substantially the same as a composition of the compound semiconductor target material.Type: GrantFiled: April 2, 2008Date of Patent: November 30, 2010Assignee: Sunlight Photonics Inc.Inventors: Allan James Bruce, Sergey Frolov, Michael Cyrus
-
Patent number: 7834412Abstract: Image sensors and the manufacture of image sensors having low dark current. A SiGe or Ge layer is selectively grown on the silicon substrate of the sensing area using an epitaxial chemical vapor deposition (CVD) method. After the SiGe or Ge growth, a silicon layer may be grown by the same epitaxial CVD method in an in-situ manner. This facilitates the formation of the hole accumulation diode and reduces the defect density of the substrate, resulting in device having a lower dark current.Type: GrantFiled: March 17, 2008Date of Patent: November 16, 2010Assignees: Sony Corporation, Sony Electronics, Inc.Inventor: Takashi Ando
-
Publication number: 20100282304Abstract: A bi-functional photovoltaic device is provided. The bi-functional photovoltaic device includes at least one solar cell and a control device. Each of the solar cell includes a multilayer semiconductor layer of group III-V compound semiconductor, a first electrode disposed on the back of the multilayer semiconductor layer, and a second electrode disposed on the front of the multilayer semiconductor layer. The control device connects with the at least one solar cell in order to control them functioning as solar cell or light emitting diode.Type: ApplicationFiled: November 18, 2008Publication date: November 11, 2010Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ming-Hsien Wu, Wen-Yung Yeh, Rong Xuan, Wen-Yih Liao, Jung-Tsung Hsu, Mu-Tao Chu
-
Publication number: 20100279456Abstract: On a surface of a GaAs substrate, layers to be a top cell are formed by epitaxial growth. On the top cell, layers to be a bottom cell are formed. Thereafter, on a surface of the bottom cell, a back surface electrode is formed. Thereafter, a glass plate is adhered to the back surface electrode by wax. Then, the GaAs substrate supported by the glass plate is dipped in an alkali solution, whereby the GaAs substrate is removed. Thereafter, a surface electrode is formed on the top cell. Finally the glass plate is separated from the back surface electrode. In this manner, a compound solar battery that improves efficiency of conversion to electric energy can be obtained.Type: ApplicationFiled: September 15, 2008Publication date: November 4, 2010Applicant: Sharp Kabushiki KaishaInventors: Tatsuya Takamoto, Takaaki Agui
-
Publication number: 20100269895Abstract: A multijunction photovoltaic structure includes a first subcell including a p-n or p-i-n junction with elongated structures; and a second subcell, arranged in tandem with the first subcell, and including a planar p-n or p-i-n junction.Type: ApplicationFiled: April 27, 2009Publication date: October 28, 2010Inventors: Katherine Louise Smith, Thomas Heinz-Helmut Altebaeumer, James Ying Jun Huang, James Andrew Robert Dimmock
-
Publication number: 20100261308Abstract: The present invention provides a method of manufacturing a solar cell, comprising forming a buffer layer comprising a group-III nitride semiconductor on a substrate using a sputtering method, and forming a group-III nitride semiconductor layer and electrodes on the buffer layer. The group-III nitride semiconductor layer is formed on the buffer layer by at least one selected from the group consisting of the sputtering method, a MOCVD method, an MBE method, a CBE method, and an MLE method, and the electrodes are formed on the group-III nitride semiconductor layer.Type: ApplicationFiled: June 22, 2010Publication date: October 14, 2010Applicant: SHOWA DENKO K.K.Inventors: Yoshiaki IKENOUE, Hisayuki Miki, Kenzo Hanawa, Yasumasa Sasaki, Hitoshi Yokouchi, Ryoko Konta, Hiroaki Kaji
-
Publication number: 20100261307Abstract: A method for forming a thin film photovoltaic device having patterned electrode films includes providing a soda lime glass substrate with an overlying lower electrode layer comprising a molybdenum material. The method further includes subjecting the lower electrode layer with one or more pulses of electromagnetic radiation from a laser source to ablate one or more patterns associated with one or more berm structures from the lower electrode layer. Furthermore, the method includes processing the lower electrode layer comprising the one or more patterns using a mechanical brush device to remove the one or more berm structures followed by treating the lower electrode layer comprising the one or more patterns free from the one or more berm structures. The method further includes forming a layer of photovoltaic material overlying the lower electrode layer and forming a first zinc oxide layer overlying the layer of photovoltaic material.Type: ApplicationFiled: September 23, 2009Publication date: October 14, 2010Applicant: STION CORPORATIONInventor: ROBERT D. WIETING
-
Publication number: 20100258181Abstract: Solar cell structures and methods of fabricating solar cell structures having increased efficiency are provided.Type: ApplicationFiled: March 12, 2010Publication date: October 14, 2010Inventors: Michael Tischler, Vladimir Odnoblyudov, Kevin A. Tetz
-
Publication number: 20100252097Abstract: A method for producing a semiconductor material, comprises a step of allowing impurity atoms, Ba atoms and Si atoms to react with each other, the impurity atoms being at least one atom selected from the group consisting of As atom, Sb atom, Bi atom and N atom; and a solar cell comprises the semiconductor material.Type: ApplicationFiled: August 27, 2008Publication date: October 7, 2010Inventor: Takashi Suemasu
-
Publication number: 20100236629Abstract: A copper/indium/gallium/selenium (CIGS) solar cell structure and a method for fabricating the same are provided. The CIGS solar cell structure includes a substrate, a molybdenum thin film layer, an alloy thin film layer, and a CIGS thin film layer. According to the present invention, the alloy thin film layer is provided between the molybdenum thin film layer and the CIGS thin film layer, serving as a conductive layer of the CIGS solar cell structure. The alloy thin film layer is composed of a variety of high electrically conductive materials (such as molybdenum, copper, aluminum, and silver) in different proportions.Type: ApplicationFiled: March 19, 2009Publication date: September 23, 2010Inventor: Chuan-Lung Chuang
-
Publication number: 20100240171Abstract: A multijunction solar cell is fabricated according to an embodiment by providing a substrate, depositing a nucleation first layer over and directly in contact with the substrate, depositing a second layer containing an arsenic dopant over the nucleation layer and depositing a sequence of layers over the second layer forming at least one solar subcell. The nucleation layer serves as a diffusion barrier to the arsenic dopant such that diffusion of the arsenic dopant into the substrate is limited in depth by the nucleation layer.Type: ApplicationFiled: April 8, 2010Publication date: September 23, 2010Applicant: Emcore Solar Power, Inc.Inventors: Mark A. Stan, Nein Y. Li, Frank A. Spadafora, Hong Q. Hou, Paul R. Sharps, Navid S. Fatemi
-
Publication number: 20100236606Abstract: A photoelectric conversion device wherein a lower electrode, a photoelectric-conversion semiconductor layer of a compound semiconductor material, and an upper electrode are formed in this order on an anodized substrate in which an anodized oxide film as an insulating film is formed on an aluminum base arranged at at least one surface of a metal substrate. The lower electrode is formed on the anodized oxide film. The main component of the photoelectric-conversion semiconductor layer is a compound semiconductor material with a chalcopyrite structure of Group Ib, IIIb and VIb elements. The photoelectric conversion device includes at least one insulative alkali supply layer formed between the anodized substrate and the lower electrode, and at least one insulative antidiffusion layer being formed between the anodized substrate and the at least one alkali supply layer, and suppressing diffusion, toward the anodized substrate, of one or more alkali and/or alkaline earth metal elements.Type: ApplicationFiled: March 10, 2010Publication date: September 23, 2010Applicant: FUJIFILM CorporationInventors: Hiroyuki Kobayashi, Shinya Suzuki, Toshiaki Fukunaga, Atsushi Mukai
-
Publication number: 20100229933Abstract: A method of manufacturing a solar cell comprising providing a growth substrate; depositing on said growth substrate a sequence of layers of semiconductor material forming a solar cell; applying a coating layer over said sequence of layers; and removing the semiconductor substrate.Type: ApplicationFiled: March 10, 2009Publication date: September 16, 2010Applicant: Emcore Solar Power, Inc.Inventor: Arthur Cornfeld
-
Publication number: 20100233842Abstract: A method of forming a diode comprises the steps of forming an extraction region of a first conductivity type, forming an active region of a second conductivity type that is opposite the first conductivity type, and forming an exclusion region of the second conductivity type to be adjacent the active region. The active region is formed to be adjacent to the extraction region and along a reverse bias path of the extraction region and the exclusion region does not resupply minority carriers while removing majority carriers. At least one of the steps of forming the exclusion region and forming the extraction region includes the additional step of forming a barrier that substantially reduces the flow of the carriers that flow toward the active region, but does not rely on a diffusion length of the carriers to block the carriers.Type: ApplicationFiled: May 27, 2010Publication date: September 16, 2010Applicant: EPIR TECHNOLOGIES, INC.Inventors: Christopher H. GREIN, Silviu VELICU, Sivalingam SIVANANTHAN
-
Patent number: 7795640Abstract: The invention relates to a photo-detector with a reduced G-R noise, which comprises a sequence of a p-type contact layer, a middle barrier layer and an n-type photon absorbing layer, wherein the middle barrier layer has an energy bandgap significantly greater than that of the photon absorbing layer, and there is no layer with a narrower energy bandgap than that in the photon-absorbing layer.Type: GrantFiled: June 28, 2004Date of Patent: September 14, 2010Assignee: Semi-Conductor Devices-An Elbit Systems-Rafael PartnershipInventor: Philip Klipstein
-
Patent number: 7790495Abstract: An optoelectronic device comprises a photodetector feature, an interfacial layer disposed above at least a portion of the photodetector feature, and a vertical contact disposed on at least a portion of the interfacial layer. The photodetector feature comprises germanium and is operative to convert a light signal into an electrical signal. The interfacial layer comprises nickel. Finally, the vertical contact is operative to transmit the electrical signal from the photodetector feature.Type: GrantFiled: October 26, 2007Date of Patent: September 7, 2010Assignee: International Business Machines CorporationInventors: Solomon Assefa, Stephen Walter Bedell, Yurii A. Vlasov, Fengnian Xia
-
Patent number: 7790536Abstract: A device grade III-V quantum well structure and method of manufacture is described. Embodiments of the present invention enable III-V InSb quantum well device layers with defect densities below 1×108cm?2 to be formed. In an embodiment of the present invention, a delta doped layer is disposed on a dopant segregation barrier in order to confine delta dopant within the delta doped layer and suppress delta dopant surface segregation.Type: GrantFiled: August 10, 2009Date of Patent: September 7, 2010Assignee: Intel CorporationInventors: Mantu K. Hudait, Aaron A. Budrevich, Dmitri Loubychev, Jack T. Kavalieros, Suman Datta, Joel M. Fastenau, Amy W. K. Liu
-
Patent number: 7790566Abstract: A method is disclosed for preparing a surface of a Group III-Group V compound semiconductor for epitaxial deposition. The III-V semiconductor surface is treated with boron (B) at a temperature of between about 250° C. and about 350° C. A suitable form for supplying B for the surface treatment is diborane. The B treatment can be followed by epitaxial growth, for instance by a Group IV semiconductor, at temperatures similar to those of the B treatment. The method yields high quality heterojunction, suitable for fabricating a large variety of device structures.Type: GrantFiled: March 19, 2008Date of Patent: September 7, 2010Assignee: International Business Machines CorporationInventors: Jack Oon Chu, Deborah Ann Neumayer
-
Publication number: 20100206381Abstract: A solar cell which can increase its open-circuit voltage, short-circuit current, and fill factor (F.F.), thereby enhancing its conversion efficiency is provided. The solar cell of the present invention comprises a p-type semiconductor layer and an n-type semiconductor layer, formed on the p-type semiconductor layer, containing a compound expressed by the following chemical formula (1): ZnO1-x-ySxSey??(1) where x?0, y>0, and 0.2<x+y<0.65.Type: ApplicationFiled: February 11, 2010Publication date: August 19, 2010Applicant: TDK CORPORATIONInventors: Yasuhiro AIDA, Masato SUSUKIDA
-
Publication number: 20100206365Abstract: A method of manufacturing a solar cell by providing a first substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell; mounting and bonding a surrogate second substrate on top of the sequence of layers; removing the first substrate; and thinning a plurality of discrete, spaced-apart portions of the backside of the surrogate second substrate so as to reduce its weight.Type: ApplicationFiled: February 19, 2009Publication date: August 19, 2010Applicant: Emcore Solar Power, Inc.Inventors: Daniel R. Chumney, Fred Newman
-
Publication number: 20100206376Abstract: A solar cell, a method and apparatus for manufacturing a solar cell, and a method of depositing a thin film layer are disclosed. The manufacturing apparatus of a solar cell includes a substrate; a first electrode disposed on the substrate; a second electrode; and a photoelectric conversion layer disposed between the first electrode and the second electrode, wherein the photoelectric conversion layer includes a micro-crystalline silicon layer, and sensitivity of the micro-crystalline silicon layer is about 100 to about 1,000, the sensitivity being a ratio expressed as photo conductivity (PC)/dark conductivity (DC).Type: ApplicationFiled: February 12, 2010Publication date: August 19, 2010Inventors: Dongjoo You, Sehwon Ahn, Heonmin Lee, Sunho Kim, Jeonghun Son
-
Patent number: 7776636Abstract: A method for reducing dislocation density between an AlGaN layer and a sapphire substrate involving the step of forming a self-organizing porous AlN layer of non-coalescing column-like islands with flat tops on the substrate.Type: GrantFiled: April 25, 2006Date of Patent: August 17, 2010Assignee: CAO Group, Inc.Inventor: Tao Wang
-
Publication number: 20100193002Abstract: The invention relates to a semiconductor component which contains one semiconductor layer containing germanium. On the rear-side, i.e. on the side orientated away from the incident light, the semiconductor layer has at least one layer containing silicon carbide which serves, on the one hand, for the reflection of radiation and also as rear-side passivation or as diffusion barrier. A method for the production of semiconductor components of this type is likewise described. The semiconductor components according to the invention are used in particular as thermophotovoltaic cells or multiple solar cells based on germanium.Type: ApplicationFiled: May 14, 2008Publication date: August 5, 2010Applicant: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.Inventors: Frank Dimroth, Jara Fernandez, Stefan Janz
-
Publication number: 20100186805Abstract: A new photovoltaic (PV) cell structure, prepared on transparent substrate with transparent conductive oxide (TCO) layer and having nanorod zinc oxide layer. The cell has a thin conductive layer of doped zinc oxide deposited on the nanorod zinc oxide layer, an extremely thin blocking layer of titanium oxide or indium sulfide on the thin conductive layer, a buffer layer of indium sulfide on the extremely thin blocking layer, an absorber layer, comprising copper indium disulfide on said buffer layer and one electrode attached to the transparent conductive oxide layer and a second electrode attached to the absorber layer. Also, a method of preparing a zinc oxide nanorod PV cell entirely by chemical spray pyrolysis is disclosed. Efficiency up to 3.9% is achieved by simple continuous non-vacuum process.Type: ApplicationFiled: July 9, 2008Publication date: July 29, 2010Applicant: TALLINN UNIVERSITY OF TECHNOLOGYInventors: Malle Krunks, Atanas Katerski, Tatjana Dedova, Arvo Mere, Ilona Oja Acik
-
Publication number: 20100186822Abstract: The present application utilizes an oxidation process to fabricating a Group III-V compound semiconductor solar cell device. By the oxidation process, a window layer disposed on a cell unit is oxidized to enhance the efficiency of the solar cell device. The oxidized window has an increased band gap to minimize the surface recombination of electrons and holes. The oxidized window also improves transparency at the wavelengths that were absorbed in the conventional window layer.Type: ApplicationFiled: January 28, 2010Publication date: July 29, 2010Applicant: MICROLINK DEVICES, INC.Inventors: Noren PAN, Christopher YOUTSEY, David S. MCCALLUM, Victor C. ELARDE, John M. DALLESASSE
-
Publication number: 20100181486Abstract: A micro-bolometer type infrared (IR) sensing device is provided. The IR sensing device includes an absorbed heat discharging part; a sensing structure part formed as bean structure, spaced apart from the absorbed heat discharging part, supported at least at one end on the absorbed heat discharging part, and discharging heat absorbed in the sensing structure part by being elastically deformed and thus touching the absorbed heat discharging part. The sensing structure part includes: a sensing part with variation in secondary attribute (for example, in electrical resistance property) according to heat; and a light-absorbing part formed into one unit with the sensing part in a manner to surround the sensing part as seen in section view, and converting energy of incident photons into heat. The sensing structure part discharges heat absorbed therein by being elastically deformed and thus touching the absorbed heat discharge part spaced apart downward from the sensing structure part.Type: ApplicationFiled: January 16, 2009Publication date: July 22, 2010Applicants: HanVision Co., Ltd., Lumiense Photonics Inc.Inventor: Robert Hannebauer
-
Publication number: 20100175746Abstract: This application is related to a tandem solar cell device including a substrate, a first tunnel junction formed on the substrate, and a first p-n junction formed on the first tunnel junction wherein the first tunnel junction including a heavily doped n-type layer and an alloy layer wherein the alloy layer having an element with atomic number larger than that of Gallium.Type: ApplicationFiled: January 12, 2010Publication date: July 15, 2010Inventors: Rong-Ren LEE, Yung-Szu Su, Shih-Chang Lee
-
Publication number: 20100170564Abstract: A high-throughput method of forming a semiconductor precursor layer by use of a chalcogen-rich chalcogenides is disclosed. The method comprises forming a precursor material comprising group IB-chalcogenide and/or group IIIA-chalcogenide particles, wherein an overall amount of chalcogen in the particles relative to an overall amount of chalcogen in a group IB-IIIA-chalcogenide film created from the precursor material, is at a ratio that provides an excess amount of chalcogen in the precursor material. The excess amount of chalcogen assumes a liquid form and acts as a flux to improve intermixing of elements to form the group IB-IIIA-chalcogenide film at a desired stoichiometric ratio, wherein the excess amount of chalcogen in the precursor material is an amount greater than or equal to a stoichiometric amount found in the IB-IIIA-chalcogenide film.Type: ApplicationFiled: September 3, 2009Publication date: July 8, 2010Inventors: Jeroen K. J. Van Duren, Matthew R. Robinson, Craig Leidholm
-
Publication number: 20100170565Abstract: A photovoltaic device having improved conversion efficiency as a result of an increase in the open-circuit voltage is provided. The photovoltaic device comprises a photovoltaic layer having a stacked p-layer, i-layer and n-layer, wherein the p-layer is a nitrogen-containing layer comprising nitrogen atoms at an atomic concentration of not less than 1% and not more than 25%, and the crystallization ratio of the p-layer is not less than 0 but less than 3. Alternatively, the n-layer may be a nitrogen-containing layer comprising nitrogen atoms at an atomic concentration of not less than 1% and not more than 20%, wherein the crystallization ratio of the n-layer is not less than 0 but less than 3. Alternatively, an interface layer may be formed at the interface between the p-layer and the i-layer, wherein the interface layer is a nitrogen-containing layer comprising nitrogen atoms at an atomic concentration of not less than 1% and not more than 30%.Type: ApplicationFiled: December 5, 2008Publication date: July 8, 2010Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Shigenori Tsuruga, Kengo Yamaguchi, Saneyuki Goya, Satoshi Sakai
-
Publication number: 20100163100Abstract: A photovoltaic device with improved cell properties having a photovoltaic layer comprising microcrystalline silicon-germanium, and a process for producing the device. A buffer layer comprising microcrystalline silicon or microcrystalline silicon-germanium, and having a specific Raman peak ratio is provided between a substrate-side impurity-doped layer and an i-layer comprising microcrystalline silicon-germanium.Type: ApplicationFiled: April 3, 2007Publication date: July 1, 2010Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Saneyuki Goya, Satoshi Sakai, Kouji Satake
-
Publication number: 20100159631Abstract: A photo-detector comprising: a photo absorbing layer comprising an n-doped semiconductor exhibiting a valence band energy level; a barrier layer, a first side of the barrier layer adjacent a first side of the photo absorbing layer, the barrier layer exhibiting a valence band energy level substantially equal to the valence band energy level of the doped semiconductor of the photo absorbing layer; and a contact area comprising a doped semiconductor, the contact area being adjacent a second side of the barrier layer opposing the first side, the barrier layer exhibiting a thickness and a conductance band gap sufficient to prevent tunneling of majority carriers from the photo absorbing layer to the contact area and block the flow of thermalized majority carriers from the photo absorbing layer to the contact area. Alternatively, a p-doped semiconductor is utilized, and conductance band energy levels of the barrier and photo absorbing layers are equalized.Type: ApplicationFiled: February 16, 2010Publication date: June 24, 2010Inventor: Shimon Maimon
-
Publication number: 20100154874Abstract: The oxidation of a lower electrode by the reaction between a metal element in the lower electrode and oxygen in a bonding layer is suppressed. The contamination of a semiconductor layer that is a photoelectric conversion layer by the diffusion of the metal element in the lower electrode into the semiconductor layer is suppressed.Type: ApplicationFiled: September 23, 2009Publication date: June 24, 2010Inventors: Takashi HIROSE, Riho KATAISHI, Akihisa SHIMOMURA
-
Publication number: 20100147379Abstract: A present method of manufacturing a silicon-based thin-film photoelectric conversion device is characterized in that a double pin structure stack body is formed by successively forming, in an identical plasma CVD film deposition chamber, a first p-type semiconductor layer, an i-type amorphous silicon-based photoelectric conversion layer, a first n-type semiconductor layer, a second p-type semiconductor layer, an i-type microcrystalline silicon-based photoelectric conversion layer, and a second n-type semiconductor layer on a transparent conductive film formed on a substrate, and the first p-type semiconductor layer, the i-type amorphous silicon-based photoelectric conversion layer and the first n-type semiconductor layer are formed under such conditions that a film deposition pressure in the plasma CVD film deposition chamber is not lower than 200 Pa and not higher than 3000 Pa and power density per unit electrode area is not lower than 0.01 W/cm2 and not higher than 0.3 W/cm2.Type: ApplicationFiled: September 29, 2006Publication date: June 17, 2010Inventor: Katsushi Kishimoto