Abstract: Apparatuses and methods for synthesizing nanoscale materials are provided, including semiconductor nanowires. Precursor solutions include mixed reagent precursor solutions of metal and chalcogenide precursors and a catalyst, where such solutions are liquid at room temperature. The precursor solutions are mixed by dividing a solution flow into multiple paths and converging the paths to form a uniform solution. A thermally controlled reactor receives the uniform solution to form semiconductor nanowires. Various electronic, optical, and sensory devices may employ the semiconductor nanowires described herein, for example.

Abstract: A photoelectric conversion element of an embodiment is a photoelectric conversion element which performs photoelectric conversion by receiving illumination light having n light emission peaks having a peak energy Ap (eV) (where 1?p?n and 2?n) of 1.59?Ap?3.26 and a full width at half maximum Fp (eV) (where 1?p?n and 2?n), wherein the photoelectric conversion element includes m photoelectric conversion layers having a band gap energy Bq (eV) (where 1?q?m and 2?m?n), and the m photoelectric conversion layers each satisfy the relationship of Ap?Fp<Bq?Ap with respect to any one of the n light emission peaks.

Abstract: An epitaxial substrate for electronic devices, in which current flows in a lateral direction and of which warpage configuration is properly controlled, and a method of producing the same. The epitaxial substrate for electronic devices is produced by forming a bonded substrate by bonding a low-resistance Si single crystal substrate and a high-resistance Si single crystal substrate together; forming a buffer as an insulating layer on a surface of the bonded substrate on the high-resistance Si single crystal substrate side; and producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate. The resistivity of the low-resistance Si single crystal substrate is 100 ?·cm or less, and the resistivity of the high-resistance Si single crystal substrate is 1000 ?·cm or more.

Abstract: In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed.

Abstract: A vapor deposition apparatus to form stacked thin films on discrete photovoltaic module substrates conveyed in a continuous non-stop manner through said apparatus is provided. The apparatus includes a first sublimation compartment positioned over a first deposition area of said apparatus and a second sublimation compartment positioned over a second deposition area of said apparatus. The first sublimation compartment is configured to heat a first source material therein to sublimate the first source material into first source material vapors. A movable first shutter plate within the first sublimation compartment is configured to control the flow rate of the first source material vapors therethrough. Similarly, the second sublimation compartment is configured to heat a second source material therein to sublimate the second source material into second source material vapors, and includes a movable first shutter plate configured to control the flow rate of the second source material vapors therethrough.

Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects as well as Fabrication methods and structures for forming thin film back contact solar cells are described.

Abstract: A method for fabricating a Cu—In—Ga—Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu—In—Ga—Se absorbing layer on the molybdenum back electrode; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu—In—Ga—Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer.

Abstract: A conventional thin-film photoelectric converter using amorphous germanium or crystalline silicon as a photoelectric conversion layer is problematic in that light having a long wavelength of 1100 nm or more cannot be used for photoelectric conversion, and is inefficient. The problem is solved by a thin-film photoelectric converter including one or more photoelectric conversion units each having a photoelectric conversion layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer, wherein the photoelectric conversion layer of at least one photoelectric conversion unit includes an intrinsic or weak n-type crystalline germanium semiconductor, and the absorption coefficient of infrared-absorption peak at wave number of 935±5 cm?1 of the crystalline germanium semiconductor is less than 6000 cm?1.

Abstract: A barrier infrared detector with absorber materials having selectable cutoff wavelengths and its method of manufacture is described. A GaInAsSb absorber layer may be grown on a GaSb substrate layer formed by mixing GaSb and InAsSb by an absorber mixing ratio. A GaAlAsSb barrier layer may then be grown on the barrier layer formed by mixing GaSb and AlSbAs by a barrier mixing ratio. The absorber mixing ratio may be selected to adjust a band gap of the absorber layer and thereby determine a cutoff wavelength for the barrier infrared detector. The absorber mixing ratio may vary along an absorber layer growth direction. Various contact layer architectures may be used. In addition, a top contact layer may be isolated into an array of elements electrically isolated as individual functional detectors that may be used in a detector array, imaging array, or focal plane array.

Abstract: A method to improve operation of a CdTe-based photovoltaic device is disclosed, the method comprising the steps of depositing a semiconductor absorber layer adjacent to a substrate, depositing a semiconductor buffer layer adjacent to the semiconductor layer, and annealing at least one of the semiconductor absorber layer and the semiconductor buffer layer with one of a laser and a flash lamp.

Abstract: A four-junction quaternary compound solar cell and a method thereof are provided.

Abstract: Fabricating a layered precursor includes depositing a first film including a first indium gallium selenide compound on a substrate; then depositing a second film including a first CuSe compound; then heating the substrate, the first film and the second film to convert the first CuSe compound in the second film to a first Cu2-xSe (0=<x<1) compound; and then depositing a third film including a indium gallium selenide compound. A layered precursor includes a substrate; a first film coupled to the substrate, the first film including a first indium gallium selenide compound; a second film coupled to the first film, the second film including a first Cu2-xSe where (0=<x<=1) compound; and a third film coupled to the second film, the third film including a second indium gallium selenide compound.

Abstract: Inverted metamorphic multijunction solar cells having a heterojunction middle subcell and a graded interlayer, and methods of making same, are disclosed herein. The present disclosure provides a method of manufacturing a solar cell using an MOCVD process, wherein the graded interlayer is composed of (InxGa1-x)y Al1-yAs, and is formed in the MOCVD reactor so that it is compositionally graded to lattice match the middle second subcell on one side and the lower third subcell on the other side, with the values for x and y computed and the composition of the graded interlayer determined so that as the layer is grown in the MOCVD reactor, the band gap of the graded interlayer remains constant at 1.5 eV throughout the thickness of the graded interlayer.

Abstract: Solar cell structures formed using molecular beam epitaxy (MBE) that can achieve improved power efficiencies in relation to prior art thin film solar cell structures are provided. A reverse p-n junction solar cell device and methods for forming the reverse p-n junction solar cell device using MBE are described. A variety of n-p junction and reverse p-n junction solar cell devices and related methods of manufacturing are provided. N-intrinsic-p junction and reverse p-intrinsic-n junction solar cell devices are also described.

Abstract: An alloy composition for a subcell of a solar cell is provided that has a bandgap of at least 0.9 eV, namely, Ga1-xInxNyAs1-y-zSbz with a low antimony (Sb) content and with enhanced indium (In) content and enhanced nitrogen (N) content, achieving substantial lattice matching to GaAs and Ge substrates and providing both high short circuit currents and high open circuit voltages in GaInNAsSb subcells for multijunction solar cells. The composition ranges for Ga1-xInxNyAs1-y-zSbz are 0.07?x?0.18, 0.025?y?0.04 and 0.001?z?0.03.

Abstract: Provided are methods for making a device or device component by providing a multi layer structure having a plurality of functional layers and a plurality of release layers and releasing the functional layers from the multilayer structure by separating one or more of the release layers to generate a plurality of transferable structures. The transferable structures are printed onto a device substrate or device component supported by a device substrate. The methods and systems provide means for making high-quality and low-cost photovoltaic devices, transferable semiconductor structures, (opto-)electronic devices and device components.

Abstract: A solar cell comprising a semiconductor solar cell of a first band gap; a buffer layer formed on a surface of the semiconductor solar cell; and at least one layer of a multiferroic or a ferroelectric material formed on the buffer layer; wherein the at least one layer of a multiferroic or a ferroelectric material has a second bang gap, the first band gap being smaller than the second band gap.

Abstract: A method for creating a nanostructure according to one embodiment includes depositing material in a template for forming an array of nanocables; removing only a portion of the template such that the template forms an insulating layer between the nanocables; and forming at least one layer over the nanocables. A nanostructure according to one embodiment includes a nanocable having a roughened outer surface and a solid core. A nanostructure according to one embodiment includes an array of nanocables each having a roughened outer surface and a solid core, the roughened outer surface including reflective cavities; and at least one layer formed over the roughened outer surfaces of the nanocables, the at least one layer creating a photovoltaically active p-n junction. Additional systems and methods are also presented.

Abstract: A semiconductor device includes a substrate, a first insulation layer formed on the substrate in a first region, a photon absorption seed layer formed on the first insulation layer in the first region and on the substrate in a second region separate from the first region, and a photon absorption layer formed on the photon absorption seed layer in the first region. The photon absorption seed layer has a particular structure that may assist in reducing dislocation density in a region that includes a photon absorption layer.

Abstract: Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening.

Abstract: There is provided a semiconductor wafer including a base wafer whose surface is entirely or partially a silicon crystal plane, an inhibitor positioned on the base wafer to inhibit crystal growth and having an opening that reaches the silicon crystal plane, a first crystal layer made of SixGe1-x (0?x<1) and positioned on the silicon crystal plane that is exposed in the opening, a second crystal layer positioned on the first crystal layer and made of a III-V Group compound semiconductor that has a band gap width larger than a band gap width of the first crystal layer, and a pair of metal layers positioned on the inhibitor and the second crystal layer. The pair of the metal layers are each in contact with the first crystal layer and the second crystal layer.

Abstract: A multijunction tandem photovoltaic device is disclosed having a bottom subcell of silicon germanium or silicon germanium tin material and above that a subcell of gallium nitride arsenide antimonide material. The materials are lattice matched to gallium arsenide, which preferably forms the substrate. Preferably, further lattice matched subcells of gallium arsenide, indium gallium phosphide and aluminium gallium arsenide or aluminium indium gallium phosphide are provided.

Abstract: A photoactive layer for an organic photovoltaic device has a supramolecular assembly of donors or acceptors formed from a plurality of units that are mixed with electron acceptors or electron donors, respectively, to form an ordered or semi-ordered bulk heterojunction structure. Each unit is formed from a plurality of sub-units that are combined and ordered by hydrogen bonding or other non-covalent interactions to form units that by ?-stacking and, optionally, other forces are organized into the supramolecular assembly. Each sub-unit includes at least one electron donor or acceptor moiety, at least one non-covalent interacting moiety, and a linking moiety between the non-covalent interacting moiety and the electron donor or electron acceptor moiety of the sub-unit. The organized supramolecular assembly connects donors or acceptors through the thickness of the photoactive layer, and allows parallel continuous electron acceptor or electron donor phases through the thickness of the active layer.

Abstract: A method for forming a nanostructure according to one embodiment includes creating a hole in an insulating layer positioned over an electrically conductive layer; and forming a nanocable in the hole such that the nanocable extends through the hole in the insulating layer and protrudes therefrom, the nanocable being in communication with the electrically conductive layer. Additional systems and methods are also presented.

Abstract: A method for manufacturing a CZTS based thin film having a dual band gap slope, comprising the steps of: forming a Cu2ZnSnS4 thin film layer; forming a Cu2ZnSn(S,Se)4 thin film layer; and forming a Cu2ZnSnS4 thin film layer. A method for manufacturing a CZTS based solar cell having a dual band gap slope according to another aspect of the present invention comprises the steps of: forming a back contact; and forming a CZTS based thin film layer on the back contact by the method described above.

Abstract: A tandem photovoltaic cell. The tandem photovoltaic cell includes a bifacial top cell and a bottom cell. The top bifacial cell includes a top first transparent conductive oxide material. A top window material underlies the top first transparent conductive oxide material. A first interface region is disposed between the top window material and the top first transparent conductive oxide material. The first interface region is substantially free from one or more entities from the top first transparent conductive oxide material diffused into the top window material. A top absorber material comprising a copper species, an indium species, and a sulfur species underlies the top window material. A top second transparent conductive oxide material underlies the top absorber material. A second interface region is disposed between the top second transparent conductive oxide material and the top absorber material. The bottom cell includes a bottom first transparent conductive oxide material.

Abstract: A method for forming a photovoltaic device includes forming an absorber layer with a granular structure on a conductive layer; conformally depositing an insulating protection layer over the absorber layer to fill in between grains of the absorber layer; and planarizing the protection layer and the absorber layer. A buffer layer is formed on the absorber layer, and a top transparent conductor layer is deposited over the buffer layer.

Abstract: A hybrid organic solar cell (HOSC) with perovskite structure as absorption material and a manufacturing method thereof are provided. The HOSC includes a conductive substrate, a hole transport layer, an active layer, a hole blocking layer and a negative electrode. The active layer has a light absorption layer (LAL) and an electron acceptor layer (EAL). The LAL is made of perovskite material represented by the following equation: CnH2n+1NH3XY3, n is positive integer form 1 to 9; X is Pb, Sn or Ge; and Y is at least one of I, Br or Cl. The EAL is made of at least one type of fullerene or derivatives thereof. A planar heterojunction (PHJ) is formed between the LAL and the EAL. The LAL has simple structure and fabricating process with relatively low cost, so that it is advantageous to carry out the mass production of HOSCs of flexible solid-state form.

Abstract: A nitride semiconductor device includes a semiconductor substrate and a nitride semiconductor layer disposed on the semiconductor substrate. The semiconductor substrate includes a normal region, a carrier supplying region, and an interface current blocking region. The interface current blocking region surrounds the normal region and the carrier supplying region. The interface current blocking region and the carrier supplying region include impurities. The carrier supplying region has a conductivity type allowing the carrier supplying region to serve as a source of carriers supplied to or a destination of carriers supplied from a carrier layer generated at an interface between the nitride semiconductor layer and the semiconductor substrate. The interface current blocking region has a conductivity type allowing the interface current blocking region to serve as a potential barrier to the carriers.

Abstract: Electronic device quality Aluminum Antimonide (AlSb)-based single crystals produced by controlled atmospheric annealing are utilized in various configurations for solar cell applications. Like that of a GaAs-based solar cell devices, the AlSb-based solar cell devices as disclosed herein provides direct conversion of solar energy to electrical power.

Abstract: A photovoltaic device is presented. The photovoltaic device includes a layer stack; and an absorber layer is disposed on the layer stack. The absorber layer comprises selenium, wherein an atomic concentration of selenium varies across a thickness of the absorber layer. The photovoltaic device is substantially free of a cadmium sulfide layer.

Abstract: A multijunction tandem photovoltaic device is disclosed having a bottom subcell of silicon germanium or silicon germanium tin material and above that a subcell of gallium nitride arsenide bismide, or indium gallium nitride arsenide bismide, material. The materials are lattice matched to gallium arsenide, which preferably forms the substrate. Preferably, further lattice matched subcells of gallium arsenide, indium gallium phosphide and aluminium gallium arsenide or aluminium indium gallium phosphide are provided.

Abstract: Portions of a top compound semiconductor layer are recessed employing a gate electrode as an etch mask to form a source trench and a drain trench. A low temperature epitaxy process is employed to deposit a semiconductor material including at least one elemental semiconductor material in the source trench and the drain trench. Metallization is performed on physically exposed surfaces of the elemental semiconductor material portions in the source trench and the drain trench by depositing a metal and inducing interaction with the metal and the at least one elemental semiconductor material. A metal semiconductor alloy of the metal and the at least one elemental semiconductor material can be performed at a temperature lower than 600° C. to provide a high electron mobility transistor with a well-defined device profile and reliable metallization contacts.

Abstract: A device including at least one heterostructure p/n diode, including a substrate based on HgCdTe including for each diode: a first part having a first cadmium concentration; a concentrated part, having a second cadmium concentration, greater than the first concentration, forming a heterostructure with the first part; a p+ doped zone situated in the concentrated part and extending into the first part, forming a p/n junction with an n-doped position of the first part, or a base plate; and the concentrated part is only located in the p+ doped zone and forms a substantially constant cadmium concentration well.

Abstract: Provided are a light receiving element etc. which have a high responsivity over the near- to mid-infrared region and stably have a high quality while maintaining the economical efficiency. The light receiving element includes an InP substrate that is transparent to light having a wavelength of 3 to 12 ?m, a middle layer that is epitaxially grown on the InP substrate, a GaSb buffer layer located in contact with the middle layer, and a light-receiving layer that is epitaxially grown on the GaSb buffer layer and that has a type-II multiple quantum well structure. The GaSb buffer layer is epitaxially grown on the middle layer while exceeding a range of a normal lattice-matching condition.

Abstract: Systems and methods are described herein for generating surface-wave plasmas capable of simultaneously achieving high density with low temperature and planar scalability. A key feature of the invention is reduced damage to objects in contact with the plasma due to the lack of an RF bias; allowing for damage free processing. The preferred embodiment is an all-in-one processing reactor suitable for photovoltaic cell manufacturing, performing saw-damage removal, oxide stripping, deposition, doping and formation of heterostructures. The invention is scalable for atomic-layer deposition, etching, and other surface interaction processes.

Abstract: A thin-film solar cell which uses an InS-based buffer layer is produced by forming a metal back electrode layer on a substrate, forming a p-type light absorption layer on the metal back electrode layer, oxidizing the p-type light absorption layer surface, forming an InS-based buffer layer as an n-type high resistance buffer layer on the oxidized p-type light absorption layer, and forming an n-type transparent conductive film on the InS-based buffer layer.

Abstract: Provided is a manufacturing method of a semiconductor quantum dot-sensitized solar cell. More particularly, the manufacturing method according to the present invention includes: a quantum dot forming step of forming a semiconductor layer containing a group 4 element and InP on a substrate and then performing heat-treatment on the substrate including the semiconductor layer formed thereon to remove indium (In) therefrom, thereby forming an n-type semiconductor quantum dot, which is a group 4 element quantum dot doped with phosphorus (P).

Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.

Abstract: A new solar cell structure called a heterojunction barrier solar cell is described. As with previously reported quantum-well and quantum-dot solar cell structures, a layer of narrow band-gap material, such as GaAs or indium-rich InGaP, is inserted into the depletion region of a wide band-gap PN junction. Rather than being thin, however, the layer of narrow band-gap material is about 400-430 nm wide and forms a single, ultrawide well in the depletion region. Thin (e.g., 20-50 nm), wide band-gap InGaP barrier layers in the depletion region reduce the diode dark current. Engineering the electric field and barrier profile of the absorber layer, barrier layer, and p-type layer of the PN junction maximizes photogenerated carrier escape. This new twist on nanostructured solar cell design allows the separate optimization of current and voltage to maximize conversion efficiency.

Abstract: The present invention discloses a method of fabricating a heterojunction battery, comprising the steps of: depositing a first amorphous silicon intrinsic layer on the front of an n-type silicon wafer, wherein the n-type silicon wafer may be a monocrystal or polycrystal silicon wafer; depositing an amorphous silicon p layer on the first amorphous silicon intrinsic layer; depositing a first boron doped zinc oxide thin film on the amorphous silicon p layer; forming a back electrode and an Al-back surface field on the back of the n-type silicon wafer; and forming a positive electrode on the front of the silicon wafer. In addition, the present invention further discloses a method of fabricating a double-sided heterojunction battery. In the present invention, the boron doped zinc oxide is used as an anti-reflection film in place of an ITO thin film; due to the special nature, especially the light trapping effect of the boron doped zinc oxide, the boron doped zinc oxide can achieve good anti-reflection.

Abstract: In one aspect, semiconductor structures are described herein. A semiconductor structure, in some implementations, comprises a first semiconductor layer having a first bandgap and a first lattice constant and a second semiconductor layer having a second bandgap and a second lattice constant. The second lattice constant is lower than the first lattice constant. Additionally, a transparent metamorphic buffer layer is disposed between the first semiconductor layer and the second semiconductor layer. The buffer layer has a constant or substantially constant bandgap and a varying lattice constant. The varying lattice constant is matched to the first lattice constant adjacent the first semiconductor layer and matched to the second lattice constant adjacent the second semiconductor layer. The buffer layer comprises a first portion comprising AlyGazIn(1-y-z)As and a second portion comprising GaxIn(1-x)P.

Abstract: A solar cell element is disclosed. The solar cell element comprises a semiconductor substrate, a first electrode, a second electrode, a first wiring member and a second wiring member. The semiconductor substrate with a first surface and a second surface comprises a plurality of through-holes. The first electrode comprises a plurality of conduction portions and at least one first output extracting portion. The second electrode has a resistivity of less than 2.5×10-8 ?m (ohm-meter). The first wiring member comprises a first end face in a long direction thereof. The second wiring member comprises a second end face in a long direction thereof facing the first end face.

Abstract: A method of fabricating on a semiconductor substrate bifacial tandem solar cells with semiconductor subcells having a lower bandgap than the substrate bandgap on one side of the substrate and with subcells having a higher bandgap than the substrate on the other including, first, growing a lower bandgap subcell on one substrate side that uses only the same periodic table group V material in the dislocation-reducing grading layers and bottom subcells as is present in the substrate and after the initial growth is complete and then flipping the substrate and growing the higher bandgap subcells on the opposite substrate side which can be of different group V material.

Abstract: An improvement in a method of making a semiconducting device having a hole-collecting electrode includes coating the hole-collecting electrode with a p-type transition metal oxide through a sol-gel process.

Abstract: Methods are used to develop and evaluate new materials and deposition processes for use as TCO materials in HJCS solar cells. The TCO layers allow improved control over the uniformity of the TCO conductivity and interface properties, and reduce the sensitivity to the texture of the wafer. In Some embodiments, the TCO materials include indium, zinc, tin, and aluminum.

Abstract: A semiconductor device, in particular a solar cell is formed on the basis of a hybrid deposition strategy using MOCVD and MBE in order to provide lattice matched semiconductor compounds. To this end, the MBE may be applied for providing a nitrogen-containing semiconductor compound that allows a desired low band gap energy and a lattice matched configuration with respect to gallium arsenide substrates.

Abstract: A back electrode for a PV device and method of formation are disclosed. A ZnTe material is provided over an absorber material and a MoNx material is provided over the ZnTe material. A Mo material may also be included in the back electrode above or below the MoNx layer and a metal layer may be also provided over the MoNx layer.

Abstract: A method to improve CdTe-based photovoltaic device efficiency is disclosed, the method including steps for removing surface contaminants from a semiconductor absorber layer prior to the deposition or formation of a back contact layer on the semiconductor absorber layer, the surface contaminants removed using at least one of a dry etching process and a wet etching process.

Abstract: A completed photovoltaic device and method forming it are described in which fluxing of a window layer into an absorber layer is mitigated by the presence of a sacrificial fluxing layer.