Abstract: A photovoltaic cell structure is disclosed that includes a buffer/passivation layer at a CdTe/Back contact interface. The buffer/passivation layer is formed from the same material that forms the n-type semiconductor active layer. In one embodiment, the buffer layer and the n-type semiconductor active layer are formed from cadmium sulfide (CdS). A method of forming a photovoltaic cell includes the step of forming the semiconductor active layers and the buffer/passivation layer within the same deposition chamber and using the same material source.

Abstract: A method of fabricating a buffer layer of a photovoltaic device comprises: providing a substrate having a back contact layer disposed above the substrate and an absorber layer disposed above the back contact layer; depositing a metal layer on the absorber layer; and performing a thermal treatment on the deposited metal layer in an atmosphere comprising sulfur, selenium or oxygen, to form a buffer layer.

Abstract: A photovoltaic device is presented. The photovoltaic device includes a buffer layer disposed on a transparent conductive oxide layer; a window layer disposed on the buffer layer; and an interlayer interposed between the transparent conductive oxide layer and the window layer. The interlayer includes a metal species, wherein the metal species includes gadolinium, beryllium, calcium, barium, strontium, scandium, yttrium, hafnium, cerium, lutetium, lanthanum, or combinations thereof.

Abstract: A method of forming a photovoltaic device includes forming a thermal stress relieving layer on top of a substrate and forming a sacrificial back electrode metal layer on the thermal stress relieving layer. A semiconductor photon absorber layer is formed on the sacrificial back electrode metal layer, and the absorber layer is reacted with substantially an entire thickness of the sacrificial back electrode metal layer, thereby forming a back ohmic contact comprising a metallic compound of the sacrificial back electrode metal layer and the absorber layer, in combination with the thermal stress relieving layer.

Abstract: A method for forming a photovoltaic device includes forming a doped layer on a crystalline substrate, the doped layer having an opposite dopant conductivity as the substrate. A non-crystalline transparent conductive electrode (TCE) layer is formed on the doped layer at a temperature less than 150 degrees Celsius. The TCE layer is flash annealed to crystallize material of the TCE layer at a temperature above about 150 degrees Celsius for less than 10 seconds.

Abstract: A method of manufacturing an order vacancy compound (OVC) is provided. The method includes the following steps. A trivalent ion, a hexavalent ion and one of a univalent ion and a bivalent ion for an electrodeposition process are provided to form a solar energy absorbing film. The OVC is formed by performing an electrochemical etching process on the solar energy absorbing film.

Abstract: Disclosed are a nano particle, a nano particle complex and a method of fabricating the nano particle. The nano particle includes a compound semiconductor having a first metal element and a second metal element. The property of the nano particle is readily controlled depending on the composition of the first and second metal elements.

Abstract: Disclosed is a nitride semiconductor light-emitting element comprising a p-type nitride semiconductor layer 1, a p-type nitride semiconductor layer 2, and a p-type nitride semiconductor layer 3 placed in order above a nitride semiconductor active layer, wherein the p-type nitride semiconductor layer 1 and p-type nitride semiconductor layer 2 each contain Al, the average Al composition of the p-type nitride semiconductor layer 1 is equivalent to the average Al composition of the p-type nitride semiconductor layer 2, the p-type nitride semiconductor layer 3 has a smaller band gap than the p-type nitride semiconductor layer 2, the p-type impurity concentration of the p-type nitride semiconductor layer 2 and the p-type impurity concentration of the p-type nitride semiconductor layer 3 are both lower than the p-type impurity concentration of the p-type nitride semiconductor layer 1, and a method for producing same.

Abstract: A quantum well infrared photodetector (QWIP) and method of making is disclosed. The QWIP includes a plurality of epi-layers formed into multiple periods of quantum wells, each of the quantum wells being separated by a barrier, the quantum wells and barriers being formed of II-VI semiconductor materials. A multiple wavelength QWIP is also disclosed and includes a plurality of QWIPs stacked onto a single epitaxial structure, in which the different QWIPs are designed to respond at different wavelengths. A dual wavelength QWIP is also disclosed and includes two QWIPs stacked onto a single epitaxial structure, in which one QWIP is designed to respond at 10 ?m and the other at 3-5 ?m wavelengths.

Abstract: Systems and methods of implementing barrier infrared detectors on lattice mismatched substrates are provided. The barrier infrared detector systems combine an active detector structure (e.g., contact/barrier/absorber pairs) with a non-lattice matched substrate through a multi-layered transitional structure that forms a virtual substrate that can be strain balanced with the detector structure. The transitional metamorphic layer may include one or both of at least one graded metamorphic buffer layer or interfacial misfit array (IMF). A further interfacial layer may be interposed within the transitional structure, in some embodiments this interfacial layer includes at least one layer of AlSb.

Abstract: An efficient solar cell and method of fabricating the same is disclosed. The solar cell includes an n-doped substrate layer. A p-doped buffer layer is disposed on the n-doped substrate layer. A quantum dot absorber stack is disposed on the buffer layer. The absorber stack includes at least one quantum dot layer and one p-doped spacer layer. A p-doped cap layer is disposed on the quantum dot absorber layer. The thickness of the quantum dot layer is less than an electron diffusion length from the depletion region formed by the n-doped substrate layer and the p-doped buffer layer. The quantum dot absorber layer allows for additional photo currents from two-photon absorption from the p-doped cap layer being exposed to a light source.

Abstract: A method and device are provided for forming an integrated Ge or Ge/Si photo detector in the CMOS process by non-selective epitaxial growth of the Ge or Ge/Si. Embodiments include forming an N-well in a Si substrate; forming a transistor or resistor in the Si substrate; forming an ILD over the Si substrate and the transistor or resistor; forming a Si-based dielectric layer on the ILD; forming a poly-Si or a-Si layer on the Si-based dielectric layer; forming a trench in the poly-Si or a-Si layer, the Si-based dielectric layer, the ILD, and the N-well; forming Ge or Ge/Si in the trench; and removing the Ge or Ge/Si, the poly-Si or a-Si layer, and the Si-based dielectric layer down to an upper surface of the ILD. Further aspects include forming an in-situ doped Si cap epilayer or an ex-situ doped poly-Si or a-Si cap layer on the Ge or Ge/Si.

Abstract: A dye-sensitized solar cell (DSC) is provided with energy-donor enhancement. A transparent conductive oxide (TCO) film is formed overlying a transparent substrate, and an n-type semiconductor layer is formed overlying the TCO. The n-type semiconductor layer is exposed to a dissolved dye (D1) having optical absorbance local maximums at a first wavelength (A1) and second wavelength (A2), longer than the first wavelength. The n-type semiconductor layer is functionalized with the dye (D1), forming a sensitized n-type semiconductor layer. A redox electrolyte is added that includes a dissolved energy-donor material (ED1) in contact with the sensitized n-type semiconductor layer. The energy-donor material (ED1) is capable of non-radiative energy transfer to the dye (D1), which is capable of charge transfer to the n-type semiconductor.

Abstract: A method of making a photovoltaic device is presented. The method includes disposing an absorber layer on a window layer. The method further includes treating at least a portion of the absorber layer with a first solution including a first metal salt to form a first component, wherein the first metal salt comprises a first metal selected from the group consisting of manganese, cobalt, chromium, zinc, indium, tungsten, molybdenum, and combinations thereof. The method further includes treating at least a portion of the first component with cadmium chloride to form a second component. The method further includes treating at least a portion of the second component with a second solution including a second metal salt to form an interfacial layer on the second component, wherein the second metal salt comprises a second metal selected from the group consisting of manganese, cobalt, nickel, zinc, and combinations thereof.

Abstract: A method of growing non-polar m-plane III-nitride film, such as GaN, AlN, AlGaN or InGaN, wherein the non-polar m-plane III-nitride film is grown on a suitable substrate, such as an m-SiC, m-GaN, LiGaO2 or LiAlO2 substrate, using metalorganic chemical vapor deposition (MOCVD). The method includes performing a solvent clean and acid dip of the substrate to remove oxide from the surface, annealing the substrate, growing a nucleation layer, such as aluminum nitride (AlN), on the annealed substrate, and growing the non-polar m-plane III-nitride film on the nucleation layer using MOCVD.

Abstract: Novel structures of photovoltaic cells (also called as solar cells) are provided. The cells are based on nanoparticles or nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators, and may be metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications such as in space, commercial, residential and industrial applications.

Abstract: A multi junction solar cell structure includes a top photovoltaic cell including III-V semiconductor materials and a silicon-based bottom photovoltaic cell. A thin, germanium-rich silicon germanium buffer layer is provided between the top and bottom cells. Fabrication techniques for producing multi junction III-V solar cell structures, lattice-matched or pseudomorphic to germanium, on silicon substrates is further provided wherein silicon serves as the bottom cell. The open circuit voltage of the silicon cell may be enhanced by localized back surface field structures, localized back contacts, or amorphous silicon-based heterojunction back contacts.

Abstract: Embodiments of an exemplary image sensor structure of the present disclosure contains at least two different layers of band gap semiconductors, where each upper layer of the different layers has a different band gap than a lower layer. For such an image sensor structure, the upper layer has a greater band gap than any layer positioned below the upper layer including the lower layer.

Abstract: Disclosed are a solar cell apparatus and a method for manufacturing the same. The solar cell apparatus includes a substrate; a back electrode layer on the substrate; a light absorbing layer on the back electrode layer; and a front electrode layer on the light absorbing layer, wherein an outer peripheral side of the back electrode layer is aligned on a plane different from a plane of an outer peripheral side of the light absorbing layer.

Abstract: To provide a semiconductor device in which a rectifying element capable of reducing a leak current in reverse bias when a high voltage is applied and reducing a forward voltage drop Vf and a transistor element are integrally formed on a single substrate. A semiconductor device has a transistor element and a rectifying element on a single substrate. The transistor element has an active layer formed on the substrate and three electrodes (source electrode, drain electrode, and gate electrode) disposed on the active layer. The rectifying element has an anode electrode disposed on the active layer, a cathode electrode which is the drain electrode, and a first auxiliary electrode between the anode electrode and cathode electrode.

Abstract: A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between the top and bottom diode materials.

Abstract: A method of forming a solar cell including: providing a semiconductor body including at least one photoactive junction; forming a semiconductor contact layer composed of GaAs deposited over the semiconductor body; and depositing a metal contact layer including a germanium layer and a palladium layer over the semiconductor contact layer so that the specific contact resistance is less than 5×10?4 ohms-cm2.

Abstract: A center region of conductive material/s may be disposed or “sandwiched” between transition regions of relatively lower conductivity materials to provide substantially low defect density interfaces for the sandwiched material. The center region and surrounding transition regions may in turn be disposed or sandwiched between dielectric insulative material to form a sandwiched and transitioned device structure. The center region of such a sandwiched structure may be implemented, for example, as a device layer such as conductive microbolometer layer for a microbolometer detector structure.

Abstract: A method to minimize edge-related substrate breakage during spalling using an edge-exclusion region where the stressor layer is either non-present (excluded either during deposition or removed afterwards) or present but significantly non-adhered to the substrate surface in the exclusion region is provided. In one embodiment, the method includes forming an edge exclusion material on an upper surface and near an edge of a base substrate. A stressor layer is then formed on exposed portions of the upper surface of the base substrate and atop the edge exclusion material, A portion of the base substrate that is located beneath the stressor layer and which is not covered by the edge exclusion material is then spalled.

Abstract: Quantum-well-based semiconductor devices and methods of forming quantum-well-based semiconductor devices are described. A method includes providing a hetero-structure disposed above a substrate and including a quantum-well channel region. The method also includes forming a source and drain material region above the quantum-well channel region. The method also includes forming a trench in the source and drain material region to provide a source region separated from a drain region. The method also includes forming a gate dielectric layer in the trench, between the source and drain regions; and forming a gate electrode in the trench, above the gate dielectric layer.

Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.

Abstract: New photovoltaic device configurations utilize combinations of n-copper indium selenide (n-CIS) absorber and p-type semiconducting organic/polymeric or inorganic materials to maximize the efficiency of solar energy conversion into electric power. Fabrication methods to produce various device configurations, based on n-CIS thin films, nanoparticles, organic or polymeric materials deposited on flexible or rigid substrates are described, that simplify process steps and hence the costs for high volume solar cell manufacturing.

Abstract: The invention relates to a method for production of thin layers of semiconductor alloys of the I-III-VI2 type, including sulphur, for photovoltaic applications, whereby a heterostructure is firstly deposited on a substrate comprising a thin layer of precursor I-III-VI2 which is essentially amorphous and a thin layer, including at least some sulphur, the heterostructure is then annealed to promote the diffusion of the sulphur into the precursor layer and the at least partial crystallization of the I-III-VI2 alloy of the precursor layer with a stoichiometry which hence includes sulphur. A layer of selenium may also be deposited to assist the recrystallization processes or annealing.

Abstract: A photovoltaic device and method include a substrate, a conductive layer formed on the substrate and an absorber layer formed on the conductive layer from a Cu—Zn—Sn containing chalcogenide material. An emitter layer is formed on the absorber layer and a buffer layer is formed on the emitter layer including an atomic layer deposition (ALD) layer. A transparent conductor layer is formed on the buffer layer.

Abstract: Devices comprising: an absorbing medium (AM) having first and second sides; a first membrane layer (ML) having first and second sides, wherein the first side of the first ML contacts the first side of the AM; a second ML having first and second sides, wherein the first side of the second ML contacts the second side of the AM; a first contact in contact with the second side of the first ML; and a second contact in contact with the second side of the second ML, wherein a first band alignment mismatch between the first contact and the AM causes a first surface of the AM on the first side of the AM to be in inversion, and wherein a second band alignment mismatch between the second contact and the AM causes a second surface of the AM on the second side of the AM to be under accumulation.

Abstract: An optoelectronic device includes a first electrode, a quantum dot layer disposed on the first electrode including a plurality of quantum dots, a fullerene layer disposed directly on the quantum dot layer wherein the quantum dot layer and the fullerene layer form an electronic heterojunction, and a second electrode disposed on the fullerene layer. The device may include an electron blocking layer. The quantum dot layer may be modified by a chemical treatment to exhibit increased charge carrier mobility.

Abstract: A method of spray deposition for inorganic nanocrystal solar cells comprising subjecting a first solution of CdTe or CdSe nanocrystals to ligand exchange with a small coordinating molecule, diluting the first solution in solvent to form a second solution, applying the second solution to a substrate, drying the substrate, dipping the substrate in a solution in MeOH of a compound that promotes sintering, washing the substrate with iPrOH, drying the substrate with N2, and heating and forming a film on the substrate. An inorganic nanocrystal solar cell comprising a substrate, a layer of metal, a layer of CdTe, a layer of CdSe, and a layer of transparent conductor. An inorganic nanocrystal solar cell comprising a transparent conductive substrate, a layer of CdSe, a layer of CdTe, and a Au contact.

Abstract: A solar cell including: a silicon (Si) substrate; a buffer layer disposed on a side of the silicon substrate; a germanium (Ge) junction disposed on a side of the buffer layer opposite the silicon substrate; a first electrode electrically connected to the germanium junction; and a second electrode electrically connected to the germanium junction, wherein the buffer layer has a lattice constant that increases in a direction from the silicon substrate to the germanium junction.

Abstract: A solar cell includes a substrate having an N-region and a P-region, a first anti-reflective layer disposed on the substrate, a metallic contact disposed on the first anti-reflective layer, a second anti-reflective layer disposed on the first anti-reflective layer and the metallic contact, and a region partially defined by the first anti-reflective layer and the second anti-reflective layer having diffused metallic contact material operative to form a conductive path to the substrate through the first anti-reflective layer, the metallic contact, and the second anti-reflective layer.

Abstract: A method for forming a minute pattern mask includes forming an etching target layer on a substrate. A convex pattern including a plurality of convex parts is formed on the etching target layer. A resin composition is coated on the convex pattern to form a resin layer including a first region neighboring the convex part and a second region positioned between the neighboring convex parts. The resin layer is ashed or etched to form the plurality of first resin patterns. The plurality of first resin patterns is processed to form a minute pattern mask including a plurality of second resin patterns. The etching target layer is etched using the plurality of second resin patterns as an etch mask to form a minute pattern.

Abstract: A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiO2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiO2 mask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiO2 mask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.

Abstract: A method for fabricating a solar cell element, the method comprising a step (a) of preparing a laminate and a chamber, a step (b) of bringing the laminate into contact with the aqueous solution in such a manner that the second surface is immersed in the aqueous solution after the step (a); a step (c) of applying a voltage difference between an anode electrode and the laminate under an atmosphere of the inert gas to form a Zn layer on the second surface after the step (b); and a step (d) of exposing the Zn layer to oxygen so as to convert the Zn layer into a ZnO crystalline layer after the step (c).

Abstract: Multijunction solar cells having at least four subcells are disclosed, in which at least one of the subcells comprises a base layer formed of an alloy of one or more elements from group III on the periodic table, nitrogen, arsenic, and at least one element selected from the group consisting of Sb and Bi, and each of the subcells is substantially lattice matched. Methods of manufacturing solar cells and photovoltaic systems comprising at least one of the multijunction solar cells are also disclosed.

Abstract: A multi-junction photovoltaic cell includes a substrate and a back contact layer formed on the substrate. A low bandgap Group IB-IIIB-VIB2 material solar absorber layer is formed on the back contact layer. A heterojunction partner layer is formed on the low bandgap solar absorber layer, to help form the bottom cell junction, and the heterojunction partner layer includes at least one layer of a high resistivity material having a resistivity of at least 100 ohms-centimeter. The high resistivity material has the formula (Zn and/or Mg)(S, Se, O, and/or OH). A conductive interconnect layer is formed above the heterojunction partner layer, and at least one additional single-junction photovoltaic cell is formed on the conductive interconnect layer, as a top cell. The top cell may have an amorphous Silicon or p-type Cadmium Selenide solar absorber layer. Cadmium Selenide may be converted from n-type to p-type with a chloride doping process.

Abstract: A method for forming thin films or layers of cadmium telluride (CdTe) for use in photovoltaic modules or solar cells. The method includes varying the substrate temperature during the growth of the CdTe layer by preheating a substrate (e.g., a substrate with a cadmium sulfide (CdS) heterojunction or layer) suspended over a CdTe source to remove moisture to a relatively low preheat temperature. Then, the method includes directly heating only the CdTe source, which in turn indirectly heats the substrate upon which the CdTe is deposited. The method improves the resulting CdTe solar cell reliability. The resulting microstructure exhibits a distinct grain size distribution such that the initial region is composed of smaller grains than the bulk region portion of the deposited CdTe. Resulting devices exhibit a behavior suggesting a more n-like CdTe material near the CdS heterojunction than devices grown with substrate temperatures held constant during CdTe deposition.

Abstract: A multijunction photovoltaic device (300) is provided. The multijunction photovoltaic device (300) includes a substrate (301) and one or more intermediate sub-cells (303a-303c) coupled to the substrate (301). The multijunction photovoltaic device (300) further includes a top sub-cell (304) comprising an AlxIn1-xP alloy coupled to the one or more intermediate sub-cells (303a-303c) and lattice mismatched to the substrate (301).

Abstract: Electrical contact to the front side of a photovoltaic cell is provided by an array of conductive through-substrate vias, and optionally, an array of conductive blocks located on the front side of the photovoltaic cell. A dielectric liner provides electrical isolation of each conductive through-substrate via from the semiconductor material of the photovoltaic cell. A dielectric layer on the backside of the photovoltaic cell is patterned to cover a contiguous region including all of the conductive through-substrate vias, while exposing a portion of the backside of the photovoltaic cell. A conductive material layer is deposited on the back surface of the photovoltaic cell, and is patterned to form a first conductive wiring structure that electrically connects the conductive through-substrate vias and a second conductive wiring structure that provides electrical connection to the backside of the photovoltaic cell.

Abstract: A unit cell for use in an imaging system may include an absorber layer of semiconductor material formed on a semiconductor substrate, at least one contact including semiconductor material formed on the semiconductor substrate and electrically coupled to the absorber layer, and a cap layer of semiconductor material formed on the semiconductor substrate and electrically coupled to and formed between the absorber layer and the at least one contact. The absorber layer may be configured to absorb incident photons such that the absorbed photons excite electrons in the absorber layer to generate a photocurrent. The at least one contact may be configured to conduct the photocurrent to one or more electrical components external to the unit cell. The cap layer may be configured to conduct the photocurrent between the absorber layer and the at least one contact.

Abstract: A solar cell structure includes stacked layers in reverse order on a germanium substrate. A heterostructure including an (In)GaAs absorbing layer and a disordered emitter layer is provided in the solar cell structures. Controlled spalling may be employed as part of the fabrication process for the solar cell structure, which may be single or multi-junction.

Abstract: A flexible semiconductor device and a method of manufacturing the flexible semiconductor device are provided. The flexible semiconductor device may include at least one vertical semiconductor element that is at least partly embedded in a flexible material layer. The flexible semiconductor device may further include a first electrode formed on a first surface of the flexible material layer and a second electrode formed on a second surface of the flexible material layer. A method of manufacturing a flexible semiconductor device may include separating a flexible material layer, in which the at least one vertical semiconductor element is embedded, from a substrate by weakening or degrading an adhesive force between an underlayer and a buffer layer by using a difference in coefficients of thermal expansion of the underlayer and the buffer layer.

Abstract: Provided is a silicon-wafer-based germanium semiconductor photodetector configured to be able to provide properties of high gain, high sensitivity, and high speed, at a relatively low voltage. A germanium-based carrier multiplication layer (e.g., a single germanium layer or a germanium and silicon superlattice layer) may be provided on a silicon wafer, and a germanium charge layer may be provided thereon, a germanium absorption layer may be provided on the charge layer, and a polysilicon second contact layer may be provided on the absorption layer. The absorption layer may be configured to include germanium quantum dots or wires.

Abstract: A method of hybrid stacked Flip chip for a solar cell onto which semiconductor layers of different materials are stacked in the Flip chip technology to solve the problem of lattices mismatch between the layers for further increase of the efficiency of solar cell.

Abstract: A method for manufacturing a photodiode including the steps of providing a substrate, solution depositing a quantum nanomaterial layer onto the substrate, the quantum nanomaterial layer including a number of quantum nanomaterials having a ligand coating, and applying a thin-film oxide layer over the quantum nanomaterial layer.

Abstract: Novel structures of photovoltaic cells (also known as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.

Abstract: Provided is a photo active layer for a solar cell or a light emitting diode and a fabricating method thereof. The photo active layer is formed by alternately stacking silicon quantum dot layers in which a plurality of silicon quantum dots containing conductive type impurities are formed in a medium, which is a silicon compound, and conductive layers, which are polycrystalline silicon layers, containing the same conductive type impurities as those of the silicon quantum dots.