Heterojunction Patents (Class 438/94)
  • Publication number: 20120255600
    Abstract: A photovoltaic device including at least one top cell that include at least one semiconductor material; a bottom cell of a germanium containing material having a thickness of 10 microns or less; and a back surface field (BSF) region provided by a eutectic alloy layer of aluminum and germanium on the back surface of the bottom cell of that is opposite the interface between the bottom cell and at least one of the top cells. The eutectic alloy of aluminum and germanium bonds the bottom cell of the germanium-containing material to a supporting substrate.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 11, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20120248410
    Abstract: An electron transporting surfactant is added to a raw material solution such that the electron transporting surfactant is coordinated on the surfaces of quantum dots, and after the dispersion solvent is evaporated by vacuum drying, the immersion in a solvent containing a hole transporting surfactant prepares a quantum dot dispersed solution with a portion of the electron transporting surfactant replaced with the hole transporting surfactant. The quantum dot dispersed solution is applied onto a substrate to prepare a hole transport layer and a quantum dot layer at the same time, and thereby to achieve a thin film which has a two-layer structure.
    Type: Application
    Filed: June 15, 2012
    Publication date: October 4, 2012
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Koji Murayama
  • Publication number: 20120240989
    Abstract: A method for fabricating a thin film photovoltaic device is provided. The method includes providing a substrate comprising a thin film photovoltaic absorber which has a surface including copper, indium, gallium, selenium, and sulfur. The method further includes subjecting the surface to a material containing at least a zinc species substantially free of any cadmium. The surface is heated to cause formation of a zinc doped material. The zinc doped material is free from cadmium. Furthermore the method includes forming a zinc oxide material overlying the zinc doped material and forming a transparent conductive material overlying the zinc oxide material.
    Type: Application
    Filed: September 19, 2011
    Publication date: September 27, 2012
    Applicant: Stion Corporation
    Inventors: Kannan Ramanathan, Robert D. Wieting
  • Publication number: 20120231569
    Abstract: An optoelectronic component with three-dimension quantum well structure and a method for producing the same are provided, wherein the optoelectronic component comprises a substrate, a first semiconductor layer, a transition layer, and a quantum well structure. The first semiconductor layer is disposed on the substrate. The transition layer is grown on the first semiconductor layer, contains a first nitride compound semiconductor material, and has at least a texture, wherein the texture has at least a first protrusion with at least an inclined facet, at least a first trench with at least an inclined facet and at least a shoulder facet connected between the inclined facets. The quantum well structure is grown on the texture and shaped by the protrusion, the trench and the shoulder facet.
    Type: Application
    Filed: May 17, 2012
    Publication date: September 13, 2012
    Applicant: HERMES-EPITEK CORP.
    Inventors: BENSON CHAO, CHUNG-HUA FU, SHIH-CHIEH JANG
  • Publication number: 20120227797
    Abstract: Inverted metamorphic multijunction solar cells having a heterojunction middle subcell and a graded interlayer, and methods of making same, are disclosed herein. The present disclosure provides a method of manufacturing a solar cell using an MOCVD process, wherein the graded interlayer is composed of (InxGa1-x)y Al1-yAs, and is formed in the MOCVD reactor so that it is compositionally graded to lattice match the middle second subcell on one side and the lower third subcell on the other side, with the values for x and y computed and the composition of the graded interlayer determined so that as the layer is grown in the MOCVD reactor, the band gap of the graded interlayer remains constant at 1.5 eV throughout the thickness of the graded interlayer.
    Type: Application
    Filed: May 17, 2012
    Publication date: September 13, 2012
    Applicant: Emcore Solar Power, Inc.
    Inventors: Mark A. Stan, Arthur Cornfeld
  • Publication number: 20120217478
    Abstract: Provided are a semiconductor device and an optical sensor device, each having reduced dark current, and detectivity extended toward longer wavelengths in the near-infrared. Further, a method for manufacturing the semiconductor device is provided. The semiconductor device 50 includes an absorption layer 3 of a type II (GaAsSb/InGaAs) MQW structure located on an InP substrate 1, and an InP contact layer 5 located on the MQW structure. In the MQW structure, a composition x (%) of GaAsSb is not smaller than 44%, a thickness z (nm) thereof is not smaller than 3 nm, and z??0.4x+24.6 is satisfied.
    Type: Application
    Filed: May 19, 2011
    Publication date: August 30, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Kei Fujii, Katsushi Akita, Takashi Ishizuka, Hideaki Nakahata, Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai
  • Publication number: 20120216858
    Abstract: Photovoltaic cells with one or more subcells are provided with a wide band gap, pseudomorphic window layer of at least 15 nm in thickness and with an intrinsic material lattice constant that differs by at least 1% from an adjacent emitter layer. This window layer has a higher band gap than a window layer with substantially the same intrinsic material lattice constant as the adjacent emitter layer, which increases the light transmission through the window, thereby increasing the current generation in the solar cell. The quality of being pseudomorphic material preserves a good interface between the window and the emitter, reducing the minority carrier surface recombination velocity. A method is provided for building a wide band gap, pseudomorphic window layer of a photovoltaic cell that has an intrinsic material lattice constant that differs by at least 1% from the adjacent emitter layer.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 30, 2012
    Applicant: Solar Junction Corporation
    Inventors: Rebecca Elizabeth Jones-Albertus, Ferran Suarez Arias, Michael West Wiemer, Michael J. Sheldon, Homan B. Yuen
  • Publication number: 20120199184
    Abstract: Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.
    Type: Application
    Filed: February 9, 2011
    Publication date: August 9, 2012
    Applicant: Alta Devices, Inc.
    Inventors: Hui NIE, Brendan M. Kayes, Isik C. Kizilyalli
  • Publication number: 20120186641
    Abstract: A method of manufacturing a solar cell comprising providing a growth substrate; depositing on said growth substrate a sequence of layers of semiconductor material forming a solar cell, including at least one subcell composed of a group IV alloy such as GeSiSn; and removing the semiconductor substrate.
    Type: Application
    Filed: March 8, 2012
    Publication date: July 26, 2012
    Applicant: Emcore Solar Power, Inc.
    Inventors: Paul Sharps, Fred Newman
  • Publication number: 20120186640
    Abstract: A photoelectric conversion device which is a semiconductor device comprising a first conductive layer having a first conductivity type; a second conductive layer formed on the first conductive layer and having a second conductivity type; and a photosensitizing layer formed between the first conductive layer and the second conductive layer, wherein charge carriers generated by photoelectric conversion in the photosensitizing layer are freely movable to at least one of the first conductive layer and the second conductive layer.
    Type: Application
    Filed: August 5, 2010
    Publication date: July 26, 2012
    Applicant: NATIONAL UNIVERSITY CORPORATION CHIBA UNIVERSITY
    Inventors: Akihiko Yoshikawa, Yoshihiro Ishitani, Kazuhide Kusakabe
  • Patent number: 8227291
    Abstract: A method of manufacturing a stacked-layered thin film solar cell with a light-absorbing layer having a band gradient is provided. The stacked-layered thin film solar cell includes a substrate, a back electrode layer, a light-absorbing layer, a buffer layer, a window layer, and a top electrode layer stacked up sequentially. The light-absorbing layer has a band gradient structure and is essentially a group I-III-VI compound, wherein the group III elements at least include indium (In) and aluminum (Al). Moreover, the Al/In ratio in the upper half portion of the light-absorbing layer is greater than that in the lower half portion of the light-absorbing layer, wherein the upper half portion is proximate to a light incident surface.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: July 24, 2012
    Assignee: Nexpower Technology Corp.
    Inventor: Feng-Chien Hsieh
  • Patent number: 8227359
    Abstract: A method for manufacturing a Group III nitride semiconductor layer according to the present invention includes a sputtering step of disposing a substrate and a target containing a Group III element in a chamber, introducing a gas for formation of a plasma in the chamber and forming a Group III nitride semiconductor layer added with Si as a dopant on the substrate by a reactive sputtering method, wherein a Si hydride is added in the gas for formation of a plasma.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: July 24, 2012
    Assignee: Showa Denko K.K.
    Inventors: Yasunori Yokoyama, Hisayuki Miki
  • Publication number: 20120180868
    Abstract: A III-nitride photovoltaic device structure and method for fabricating the III-nitride photovoltaic device that increases the light collection efficiency of the III-nitride photovoltaic device. The III-nitride photovoltaic device includes one or more III-nitride device layers, and the III-nitride photovoltaic device functions by collecting light that is incident on the back-side of the III-nitride device layers. The III-nitride device layers are grown on a substrate, wherein the III-nitride device layers are exposed when the substrate is removed and the exposed III-nitride device layers are then intentionally roughened to enhance their light collection efficiency. The collection of the incident light via the back-side of the device simplifies the fabrication of the multiple junctions in the device. The III-nitride photovoltaic device may include grid-like contacts, transparent or semi-transparent contacts, or reflective contacts.
    Type: Application
    Filed: October 21, 2011
    Publication date: July 19, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Robert M. Farrell, Carl J. Neufeld, Nikholas G. Toledo, Steven P. DenBaars, Umesh K. Mishra, James S. Speck, Shuji Nakamura
  • Publication number: 20120175676
    Abstract: A photodetector detects the absence or presence of light by detecting a change in the inductance of a coil. The magnetic field generated when a current flows through the coil passes through an electron-hole generation region. Charged particles in the electron-hole generation region come under the influence of the magnetic field, and generate eddy currents whose magnitudes depend on whether light is absent or present. The eddy currents generate a magnetic field that opposes the magnetic field generated by current flowing through the coil.
    Type: Application
    Filed: January 11, 2011
    Publication date: July 12, 2012
    Inventors: Ann Gabrys, Peter J. Hopper, William French, Kyuwoon Hwang
  • Publication number: 20120168720
    Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.
    Type: Application
    Filed: July 21, 2010
    Publication date: July 5, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Takashi Ishizuka, Kei Fujii, Youichi Nagai
  • Patent number: 8211727
    Abstract: According to the present invention, an AlN crystal film seed layer having high crystallinity is combined with selective/lateral growth, whereby a Group III nitride semiconductor multilayer structure more enhanced in crystallinity can be obtained. The Group III nitride semiconductor multilayer structure of the present invention is a Group III nitride semiconductor multilayer structure where an AlN crystal film having a crystal grain boundary interval of 200 nm or more is formed as a seed layer on a C-plane sapphire substrate surface by a sputtering method and an underlying layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, each composed of a Group III nitride semiconductor, are further stacked, wherein regions in which the seed layer is present and is absent are formed on the C-plane sapphire substrate surface and/or regions capable of epitaxial growth and incapable of epitaxial growth are formed in the underlying layer.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: July 3, 2012
    Assignee: Showa Denko K.K.
    Inventors: Kenzo Hanawa, Yasumasa Sasaki
  • Patent number: 8207443
    Abstract: The present invention relates to electrical contacts in a semiconductor device, and more particularly to methods and apparatuses for providing point contacts in a polysilicon emitter or HIT type solar cell. According to certain aspects, the invention uses a dielectric layer interposed between the substrate and a conductive layer to provide a limited area over which junction current can flow. The benefit is that the metal grid conductors do not need to align to the contacts, and can be applied freely without registration. Another benefit of the invention is that it provides increased efficiency for poly emitter and HIT cells through use of point contacts to increase current density. A further benefit is that patterning can be accomplished using low cost methods such as inclusion masking, screen printing or laser ablation. A still further benefit is that final contacts do not need alignment to the point contacts, eliminating registration required for conventional point contact designs.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: June 26, 2012
    Assignee: Applied Materials, Inc.
    Inventor: Peter Borden
  • Patent number: 8202752
    Abstract: A semiconductor device fabrication method is disclosed. A buffer layer is provided and a first semiconductor layer is formed on the buffer layer. Next, a first intermediate layer is formed on the first semiconductor layer by dopant with high concentration during an epitaxial process. A second semiconductor layer is overlaid on the first intermediate layer. A semiconductor light emitting device is grown on the second semiconductor layer. The formation of the intermediate layer and the second semiconductor layer is a set of steps.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: June 19, 2012
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih Cheng Huang, Po Min Tu, Ying Chao Yeh, Wen Yu Lin, Peng Yi Wu, Shih Hsiung Chan
  • Publication number: 20120138898
    Abstract: A sensor includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat, where the photothermal absorber outputs an electric signal in response to incident light to be introduced into the photothermal absorber or heat to be applied to the photothermal absorber. A semiconductor wafer includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 7, 2012
    Applicants: National Institute of Advanced Industrial Science and Technology, SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Masahiko HATA, Tomoyuki TAKADA, Sadanori YAMANAKA, Taro ITATANI
  • Patent number: 8187913
    Abstract: In a process for producing a photoelectric conversion device comprising a bottom electrode layer, a photoelectric conversion semiconductor layer, a buffer layer, and a transparent conductive layer, which are stacked in this order on a substrate, all film forming stages ranging from a stage of forming the buffer layer to a stage of forming the transparent conductive layer are performed with a liquid phase technique. The buffer layer is formed with a chemical bath deposition technique, and the transparent conductive layer is formed with an electrolytic deposition technique.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: May 29, 2012
    Assignee: FUJIFILM Corporation
    Inventors: Tetsuo Kawano, Takashi Koike, Ryouko Agui
  • Publication number: 20120129290
    Abstract: An embodiment of this invention utilizes ZnO rods as the etching mask to etch a GaN layer arranged below, so that GaN rods are formed. The GaN rods have similar patterns as the ZnO rods. The pattern, size, position, and height of the GaN rods are respectively controlled by the pattern, size, position, and height of the ZnO rods.
    Type: Application
    Filed: March 4, 2011
    Publication date: May 24, 2012
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventor: CHING-FUH LIN
  • Patent number: 8183083
    Abstract: Disclosed is a method for manufacturing a back side illumination image sensor. The method includes defining a pixel area by forming a first isolation area in a first substrate; forming a photo detecting unit buried in the pixel area; forming an ion implantation layer on the photo detecting unit; growing a second substrate on the first substrate having the ion implantation layer; forming a logic unit electrically connected to the first substrate on the second substrate; forming an insulting layer and an interconnection on the second substrate; and exposing the photo detecting unit by grinding a backside of the first substrate.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: May 22, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Yong Geun Lee
  • Patent number: 8183081
    Abstract: Embodiments of the invention generally provide a high efficiency solar cell using a novel processing sequence to form a solar cell device. In one embodiment, the methods include forming one or more layers on a backside of a solar cell substrate prior to the texturing process to prevent attack of the backside surface of the substrate. In one embodiment, the one or more layers are a metalized backside contact structure that is formed on the backside of the solar cell substrate. In another embodiment, the one or more layers are a chemical resistant dielectric layer that is formed over the backside of the solar cell substrate.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: May 22, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Timothy W. Weidman, Rohit Mishra, Michael P. Stewart, Yonghwa Chris Cha, Kapila P. Wijekoon, Hongbin Fang
  • Publication number: 20120120478
    Abstract: Electro-optical components are disclosed having intersubband transitions by quantum confinement between two Group III nitride elements, typically by means of GaN/AlN. Related devices or systems are also disclosed including such components, as well as to a method for manufacturing such a component. Such a component includes at least one active area that includes at least two so-called outer barrier layers surrounding one or more N-doped quantum well structures, and said quantum well structure(s) are each surrounded by two barrier areas that are unintentionally doped at a thickness of at least five monoatomic layers.
    Type: Application
    Filed: July 30, 2010
    Publication date: May 17, 2012
    Applicants: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, UNIVERSITE PARIS-SUD 11
    Inventors: François Julien, Anatole Lupu, Maria Tchernycheva, Laurent Nevou
  • Patent number: 8178375
    Abstract: A method of manufacturing a light generating device with required wavelength is disclosed. According to the method, a) a required wavelength is determined. b) A polar angle and an azimuthal angle corresponding to the required wavelength in a nitride semiconductor are determined. Then, c) a nitride semiconductor crystal is grown according to the polar angle and the azimuthal angle. Therefore, a light generating device with required wavelength may be manufactured without adjusting amounts of elements of compound semiconductor.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: May 15, 2012
    Assignee: Wooree LST Co. Ltd.
    Inventors: Do-Yeol Ahn, Seoung-Hwan Park, Jung-Tae Jang
  • Publication number: 20120111395
    Abstract: A solar cell including: a silicon (Si) substrate; a buffer layer disposed on a side of the silicon substrate; a germanium (Ge) junction disposed on a side of the buffer layer opposite the silicon substrate; a first electrode electrically connected to the germanium junction; and a second electrode electrically connected to the germanium junction, wherein the buffer layer has a lattice constant that increases in a direction from the silicon substrate to the germanium junction.
    Type: Application
    Filed: March 29, 2011
    Publication date: May 10, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Dong-Ho KIM
  • Patent number: 8173469
    Abstract: Provided is a method for fabricating a light emitting device. The method for fabricating the light emitting device includes forming a buffer layer including a compound semiconductor in which a rare-earth element is doped on a substrate, forming a light emitting structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer, which are successively stacked on the buffer layer, forming a first electrode layer on the light emitting structure, removing the substrate, and forming a second electrode layer under the light emitting structure.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: May 8, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kyung Wook Park, Myung Hoon Jung
  • Publication number: 20120108001
    Abstract: Disclosed are a relatively high-efficiency solar cell and a method for fabricating the same using a micro-heater array. The solar cell may include first and second micro-heaters intersecting each other or being parallel to each other on a substrate, and a plurality of InxGa1-xN p-n junction layers formed using the first and second micro-heaters. The solar cell has improved efficiency because sunlight with various wavelengths may be effectively absorbed by the plurality of InxGa1-xN p-n junction layers. Furthermore, relatively large-sized solar cells may be fabricated, because the plurality of InxGa1-xN p-n junction layers may be formed on a glass substrate using a micro-heater array.
    Type: Application
    Filed: December 29, 2011
    Publication date: May 3, 2012
    Applicants: SAMSUNG SDI CO., LTD., SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Junhee CHOI, Jai Yong HAN, Andrei ZOULKARNEEV
  • Publication number: 20120104460
    Abstract: Embodiments of the invention generally relate to optoelectronic semiconductor devices such as photovoltaic devices including solar cells. In one aspect, an optoelectronic semiconductor device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device, the emitter layer made of a different material than the absorber layer and having a higher bandgap than the absorber layer. A heterojunction formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. The p-n junction causes a voltage to be generated in the device in response to the device being exposed to light at a front side of the device.
    Type: Application
    Filed: November 3, 2010
    Publication date: May 3, 2012
    Applicant: ALTA DEVICES, INC.
    Inventors: Hui NIE, Brendan M. KAYES, Isik C. KIZILYALLI
  • Patent number: 8168467
    Abstract: The present invention provides improved solar cells. This patent teaches a particularly efficient method of device manufacture based on incorporating the solar cell fabrication into the widely used, high temperature, Float Glass manufacture process.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: May 1, 2012
    Inventors: James P Campbell, Harry R Campbell, Ann B Campbell, Joel F Farber
  • Patent number: 8163581
    Abstract: Techniques to utilize layer transfer schemes such as ion-cut to form novel light emitting diodes (LEDs), CMOS image sensors, displays, microdisplays and solar cells are disclosed.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: April 24, 2012
    Assignee: Monolith IC 3D
    Inventors: Zvi Or-Bach, Deepak C. Sekar
  • Patent number: 8163587
    Abstract: A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron atoms, the substrate comprising a front substrate surface, and depositing an ink on the front substrate surface in an ink pattern, the ink comprising a set of nanoparticles and a set of solvents. The method further includes heating the substrate in a baking ambient to a first temperature of between about 200° C. and about 800° C. and for a first time period of between about 3 minutes and about 20 minutes in order to create a densified film ink pattern. The method also includes exposing the substrate to a dopant source in a diffusion furnace with a deposition ambient, the deposition ambient comprising POCl3, a carrier N2 gas, a main N2 gas, and a reactive O2 gas, wherein a ratio of the carrier N2 gas to the reactive O2 gas is between about 1:1 to about 1.5:1, at a second temperature of between about 700° C. and about 1000° C.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: April 24, 2012
    Assignee: Innovalight, Inc.
    Inventors: Giuseppe Scardera, Dmitry Poplavskyy, Michael Burrows, Sunil Shah
  • Publication number: 20120080092
    Abstract: Embodiments of the invention provide a method of forming a doped gallium arsenide based (GaAs) layer from a solution based precursor. The doped gallium arsenide based (GaAs) layer formed from the solution based precursor may assist solar cell devices to improve light absorption and conversion efficiency. In one embodiment, a method of forming a solar cell device includes forming a first layer with a first type of dopants doped therein over a surface of a substrate, forming a GaAs based layer on the first layer, and forming a second layer with a second type of dopants doped therein on the GaAs based layer.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 5, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Kaushal K. Singh, Robert Jan Visser, Srikant Rao, Bhaskar Kumar, Claire J. Carmalt, Ranga Rao Arnepalli, Omkaram Nalamasu, Gaurav Saraf, Sanjayan Sathasivam, Christopher Stuart Blackman
  • Patent number: 8148192
    Abstract: The present invention provides improved devices such as transparent solar cells. This patent teaches a particularly efficient method of device manufacture based on incorporating the solar cell fabrication into the widely used, high temperature, Float Glass manufacture process.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: April 3, 2012
    Inventors: James P Campbell, Harry R Campbell, Ann B Campbell, Joel F Farber
  • Publication number: 20120074463
    Abstract: Provided is a semiconductor wafer including: a base wafer containing silicon; an inhibitor that has been formed on the base wafer, has an aperture in which a surface of the base wafer is exposed, and inhibits crystal growth; and a light-absorptive structure that has been formed inside the aperture in contact with a surface of the base wafer exposed inside the aperture, where the light-absorptive structure includes a first semiconductor and a second semiconductor.
    Type: Application
    Filed: December 2, 2011
    Publication date: March 29, 2012
    Applicants: National Institute of Advanced Industrial Science and Technology, SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Masahiko HATA, Taro ITATANI
  • Publication number: 20120073658
    Abstract: In a heterojunction solar cell, a semiconductor A is bonded to a different conductivity type semiconductor B having an electron affinity a2 which is larger than an electron affinity a1 of the semiconductor A. The semiconductor A and the semiconductor B are lattice-matched to each other with a mismatch ratio of less than 1%, respectively. In a method for fabricating the heterojunction solar cell, the semiconductor A and the semiconductor B are lattice-matched to each other with a mismatch ratio of less than 1% respectively, and the semiconductor A is made of p-type silicon with a p-type germanium layer formed on the surface thereof, and n-type GaP is formed after removing an oxide film by removing the germanium layer.
    Type: Application
    Filed: August 31, 2011
    Publication date: March 29, 2012
    Applicant: Takashi Tomita
    Inventor: Takashi TOMITA
  • Publication number: 20120068225
    Abstract: A bispectral detector comprising upper and lower semiconductor layers of a first conductivity type in order to absorb a first and a second electromagnetic spectrum, separated by an intermediate layer that forms a barrier; semiconductor zones of a second conductivity type implanted in upper layer and lower layer and each implanted at least partially in the bottom of an opening that passes through upper layer and intermediate layer; and conductor elements connected to semiconductor zones. At least that part of each opening that passes through upper layer is separated from the latter by a semiconductor cap layer: whereof the concentration of dopants of the second conductivity type is greater than 1017 cm?3; and whereof the thickness is chosen as a function of said concentration so that it exceeds the minority carrier diffusion length in the cap layer.
    Type: Application
    Filed: September 13, 2011
    Publication date: March 22, 2012
    Applicant: Commissariat A L'Energie Atomique Et Aux Energies Alternatives
    Inventors: Olivier GRAVRAND, Jacques Baylet
  • Publication number: 20120068207
    Abstract: Provided is an optical device including a base wafer containing silicon, a plurality of seed crystals disposed on the base wafer, and a plurality of Group 3-5 compound semiconductors lattice-matching or pseudo lattice-matching the plurality of seed crystals. At least one of the Group 3-5 compound semiconductors has a photoelectric semiconductor formed therein, the photoelectric semiconductor including a light emitting semiconductor that emits light in response to a driving current supplied thereto or a light receiving semiconductor that generates a photocurrent in response to light applied thereto, and at least one of the plurality of Group 3-5 compound semiconductors other than the Group 3-5 compound semiconductor having the photoelectric semiconductor has a heterojunction transistor formed therein.
    Type: Application
    Filed: December 2, 2011
    Publication date: March 22, 2012
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Masahiko HATA, Sadanori Yamanaka, Tomoyuki Takada
  • Publication number: 20120060924
    Abstract: Method and system for forming a plurality of cadmium-sulfide layers. The method includes preparing a first solution and a second solution. The method further includes loading at least the first solution and the second solution into a pyrolysis-deposition system and placing a target structure into the pyrolysis-depositions system. The method further includes spraying the first solution through one or more first nozzles towards the target structure, forming, from the sprayed first solution, the first cadmium-sulfide layer, directly or indirectly, on the target structure, spraying the second solution through one or more second nozzles towards the target structure with at least the first cadmium-sulfide layer, and forming, from the sprayed second solution, the second cadmium-sulfide layer directly or indirectly, on the target structure.
    Type: Application
    Filed: September 6, 2011
    Publication date: March 15, 2012
    Applicant: Alion, Inc.
    Inventors: Yuriy B. Matus, Roman Mostovoy
  • Publication number: 20120060922
    Abstract: A non-sintered structure. The non-sintered structure includes a first non-sintered nanocrystal layer, and a second non-sintered nanocrystal layer wherein the first layer and the second layer are configured to interact electronically.
    Type: Application
    Filed: March 2, 2009
    Publication date: March 15, 2012
    Applicant: The Regents of the University of California
    Inventors: Cyrus Wadia, Yue Wu, Paul A. Alivisatos
  • Publication number: 20120056243
    Abstract: A photodetector 1 according to an embodiment of the present invention includes: an n-type InAs substrate 12; an n-type InAs buffer layer 14 formed on the n-type InAs substrate 12; an n-type InAs light absorbing layer 16 formed on the n-type InAs buffer layer 14; an InAsXPYSb1-X-Y cap layer 18 (X?0, Y>0) formed on the n-type InAs light absorbing layer 16; a first inorganic insulating film 20 formed on the cap layer 18, and having an opening portion 20h in a deposition direction; a p-type impurity semiconductor region 24 fowled by diffusing a p-type impurity from the opening portion 20h of the first inorganic insulating film 20, and reaching from the cap layer 18 to an upper layer of the n-type InAs light absorbing layer 16; and a second inorganic insulating film 22 formed on the first inorganic insulating film 20 and on the p-type impurity semiconductor region 24.
    Type: Application
    Filed: November 10, 2011
    Publication date: March 8, 2012
    Inventor: Akihito YOKOI
  • Publication number: 20120058595
    Abstract: Electronic device quality Aluminum Antimonide (AlSb)-based single crystals produced by controlled atmospheric annealing are utilized in various configurations for solar cell applications. Like that of a GaAs-based solar cell devices, the AlSb-based solar cell devices as disclosed herein provides direct conversion of solar energy to electrical power.
    Type: Application
    Filed: October 24, 2011
    Publication date: March 8, 2012
    Inventors: John W. Sherohman, Jick Hong Yee, Arthur W. Combs, III
  • Publication number: 20120052621
    Abstract: Methods are generally provided for manufacturing such thin film photovoltaic devices via sputtering a mixed phase layer from a target (e.g., at least including CdSOx, where x is 3 or 4) on a transparent conductive oxide layer and depositing a cadmium telluride layer on the mixed layer. The transparent conductive oxide layer is on a glass substrate.
    Type: Application
    Filed: May 31, 2011
    Publication date: March 1, 2012
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Scott Daniel Feldman-Peabody, Robert Dwayne Gossman
  • Publication number: 20120052620
    Abstract: Thin film photovoltaic devices are provided that generally include a transparent conductive oxide layer on the glass, a multi-layer n-type stack on the transparent conductive oxide layer, and an absorber layer (e.g., a cadmium telluride layer) on the multi-layer n-type stack. The multi-layer n-type stack generally includes a first layer (e.g., a cadmium sulfide layer) and a second layer (e.g., a mixed phase layer). The multi-layer n-type stack can, in certain embodiments, include additional layers (e.g., a third layer, a fourth layer, etc.). Methods are also generally provided for manufacturing such thin film photovoltaic devices.
    Type: Application
    Filed: May 31, 2011
    Publication date: March 1, 2012
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Scott Daniel Feldman-Peabody, Robert Dwayne Gossman
  • Publication number: 20120042929
    Abstract: A photovoltaic device with a low-resistance stable electrical back contact is disclosed. The photovoltaic device can have a CuTex or CuTexNy layer.
    Type: Application
    Filed: August 22, 2011
    Publication date: February 23, 2012
    Inventors: Pratima V. Addepalli, Sreenivas Jayaraman, Oleh P. Karpenko
  • Patent number: 8115097
    Abstract: Electrical contact to the front side of a photovoltaic cell is provided by an array of conductive through-substrate vias, and optionally, an array of conductive blocks located on the front side of the photovoltaic cell. A dielectric liner provides electrical isolation of each conductive through-substrate via from the semiconductor material of the photovoltaic cell. A dielectric layer on the backside of the photovoltaic cell is patterned to cover a contiguous region including all of the conductive through-substrate vias, while exposing a portion of the backside of the photovoltaic cell. A conductive material layer is deposited on the back surface of the photovoltaic cell, and is patterned to form a first conductive wiring structure that electrically connects the conductive through-substrate vias and a second conductive wiring structure that provides electrical connection to the backside of the photovoltaic cell.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: February 14, 2012
    Assignee: International Business Machines Corporation
    Inventors: Supratik Guha, Yves Martin, Naim Moumen, Robert L. Sandstrom, Theodore G. van Kessel
  • Patent number: 8115203
    Abstract: An infrared photodiode structure is provided. The infrared photodiode structure includes a doped semiconductor layer having ions of certain conductivity. An active photodetecting region is positioned on the doped semiconductor layer for detecting an infrared light signal. The active photodetecting region includes one or more amorphous semiconductor materials so as to allow for high signal-to-noise ratio being achieved by invoking carrier hopping and band conduction, under dark and illuminated conditions.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: February 14, 2012
    Assignee: Massachusetts Institute of Technology
    Inventors: Juejun Hu, Anuradha Agarwal, Lionel C. Kimerling
  • Publication number: 20120031491
    Abstract: A single P-N junction solar cell is provided having two depletion regions for charge separation while allowing the electrons and holes to recombine such that the voltages associated with both depletion regions of the solar cell will add together. The single p-n junction solar cell includes an alloy of either InGaN or InAlN formed on one side of the P-N junction with Si formed on the other side in order to produce characteristics of a two junction (2J) tandem solar cell through only a single P-N junction. A single P-N junction solar cell having tandem solar cell characteristics will achieve power conversion efficiencies exceeding 30%.
    Type: Application
    Filed: October 17, 2011
    Publication date: February 9, 2012
    Applicant: RoseStreet Labs Energy, LLC
    Inventors: Wladyslaw Walukiewicz, Joel W. Ager, III, Kin Man Yu
  • Patent number: 8110427
    Abstract: A stacked-layered thin film solar cell and a manufacturing method thereof are provided. The stacked-layered thin film solar cell includes a front electrode layer, a stacked-layered light-absorbing structure, and a back electrode layer. The stacked-layered light-absorbing structure has a p-i-n-type layered structure and consists essentially of I-III-VI compounds, wherein the group III elements at least include indium (In) and aluminum (Al). The p-type layer of the stacked-layered light-absorbing structure is near the front electrode layer while the n-type layer is near the back electrode layer. The Al/In concentration ratio in the p-type layer is higher than that in the n-type layer.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: February 7, 2012
    Assignee: Nexpower Technology Corp.
    Inventor: Feng-Chien Hsieh
  • Publication number: 20120028407
    Abstract: Thin film photovoltaic devices are provided that generally include a transparent conductive oxide layer on the glass, a multi-layer n-type stack on the transparent conductive oxide layer, and a cadmium telluride layer on the multi-layer n-type stack. The multi-layer n-type stack generally includes a first layer and a second layer, where the first layer comprises cadmium and sulfur and the second layer comprises cadmium and oxygen. The multi-layer n-type stack can, in certain embodiments, include additional layers (e.g., a third layer, a fourth layer, etc.). Methods are also generally provided for manufacturing such thin film photovoltaic devices.
    Type: Application
    Filed: May 31, 2011
    Publication date: February 2, 2012
    Applicant: PRIMESTAR SOLAR, INC.
    Inventors: Scott Daniel Feldman-Peabody, Robert Dwayne Gossman