Quality Control Patents (Class 700/109)
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Patent number: 7239970Abstract: A manufacturing cell for inspecting workpieces such as magnetic disk substrates comprises an input conveyor for providing workpieces to be tested, one or more testers for inspecting the workpieces, and three or more output receptacles for receiving tested workpieces. One or more robotic arms move the workpieces from the input conveyor to the tester and from the tester to one of the output receptacles depending upon the results of the test performed by the tester. The output receptacles include a pass receptacle, a reject receptacle, and at least an additional receptacle for workpieces that are to be re-worked or studied further. If the additional receptacle is full, workpieces that would otherwise be provided to the additional bin are placed in the reject receptacle. The reject receptacle is very large, so that it is rarely filled to capacity.Type: GrantFiled: April 22, 2005Date of Patent: July 3, 2007Assignee: Komag, Inc.Inventors: David Treves, Thomas A. O'Dell
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Patent number: 7225047Abstract: Methods, systems, and mediums of controlling a semiconductor manufacturing process are described. The method comprises the steps of measuring at least one critical dimension of at least one device being fabricated on at least one of the plurality of wafers, determining at least one process parameter value on the at least one measured dimension, and controlling at least one semiconductor manufacturing tool to process the at least one of the plurality of wafers based on the at least one parameter value. A variation in the at least one critical dimension causes undesirable variations in performance of the at least one device, and at least one process condition is directed to controlling the processing performed on the plurality of wafers. The at least one manufacturing tool includes at least one of an implanter tool and an annealing tool.Type: GrantFiled: March 19, 2002Date of Patent: May 29, 2007Assignee: Applied Materials, Inc.Inventors: Amir Al-Bayati, Babak Adibi, Majeed Foad, Sasson Somekh
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Patent number: 7221990Abstract: A method, system and medium is provided for enabling improved control systems. An error, or deviation from a target result, is observed for example during manufacture of semiconductor chips. The error within standard deviation is caused by two components: a white noise component and a signal component (such as systematic errors). The white noise component is, e.g., random noise and therefore is relatively non-controllable. The systematic error component, in contrast, may be controlled by changing the control parameters. A ratio between the two components is calculated autoregressively. Based on the ratio and using the observed or measured error, the actual value of the error caused by the systematic component is calculated utilizing an autoregressive stochastic sequence. The actual value of the error is then used in determining when and how to change the control parameters.Type: GrantFiled: April 6, 2006Date of Patent: May 22, 2007Assignee: Applied Materials, Inc.Inventor: Young J. Paik
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Patent number: 7221987Abstract: Analyzing an event chronology record to permit identification of periods of a production sequence that correspond to a high probability of failure. Systems and methods include receiving an event chronology for a particular machine in the production sequence and for a particular time interval. A reliability analysis system accesses process flow information to determine whether a particular event in the event chronology is related to a subsequent adverse event within a predefined event window.Type: GrantFiled: June 15, 2004Date of Patent: May 22, 2007Assignee: Kimberly-Clark Worldwide, Inc.Inventors: Thomas Arthur Bett, Tanakon Ungpiyakul, Walter Caswell Reade, Michelle Reneé Irwin, Jeremy Brian Cannady, Babe Bedenbaugh
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Patent number: 7212950Abstract: Computer program products, methods, systems, and apparatus for fingerprinting and process matching process tools such as process tools used for processing workpieces are described. One embodiment includes a method to determine process matching of one or more process tools using a first data set and a second data set. The first data set and the second data set include an operating characteristic for a process. The method comprises fingerprinting the one or more process tools using the first data set and the second data set; finding correspondences between transition points in the first data set and the second data set; and comparing the first data set and second data set using the correspondences to determine whether the first data set and the second data set match so as to indicate whether the one or more process tools match.Type: GrantFiled: September 17, 2003Date of Patent: May 1, 2007Assignee: OnWafer Technologies, Inc.Inventor: Kameshwar Poolla
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Patent number: 7209846Abstract: In a quality control system for manufacturing industrial products, the product quality history and the manufacturing process history are collected and collated to calculate the correlation magnitude between the two histories. The candidates for the cause of quality variation hidden in the manufacturing processes are listed, and the correlation magnitude between all combinations of the variates of the manufacturing process history are calculated. Further, by utilizing the manufacturing sequence history used for an input plan, a causation connecting structure model between the manufacturing processes of the manufacturing line is automatically generated and automatically analyzed thereby to automatically extract the fundamental cause of quality variation from the candidates for the cause of quality variation. By doing so, the cause of quality variation of industrial products manufactured through a complicated process can be traced in a complicated connecting structure in the manufacturing history data.Type: GrantFiled: July 1, 2005Date of Patent: April 24, 2007Assignee: Hitachi, Ltd.Inventors: Kenji Tamaki, Youichi Nonaka
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Patent number: 7200455Abstract: The present invention relates to a method of run-to-run control of a manufacturing process. A plurality of runs of the manufacturing process is performed. In each of the runs, a value of a process input is applied to the manufacturing process. A measured value of a process output of the respective run is determined. A process input quantity is calculated based on the measured value, the applied process input, a target value of the process output and at least one value of a sensitivity parameter. The sensitivity parameter describes a variation of the process output caused by a variation of the process input. The process input applied in a subsequent one of the plurality of runs is based on the process input quantity. The sensitivity parameter is modified between at least one pair of the runs of the manufacturing process.Type: GrantFiled: August 29, 2005Date of Patent: April 3, 2007Assignee: Advanced Micro Devices, Inc.Inventor: Uwe Schulze
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Patent number: 7194366Abstract: A system and method for determining the early life reliability of an electronic component, including classifying the electronic component based on an initial determination of a number of fatal defects, and estimating a probability of latent defects present in the electronic component based on that classification with the aim of optimizing test costs and product quality.Type: GrantFiled: October 18, 2002Date of Patent: March 20, 2007Assignee: Auburn UniversityInventors: Adit D. Singh, Thomas S. Barnett
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Patent number: 7194320Abstract: A system and method for implementing an indirect controller for a plant. A plant can be provided with both a direct controller and an indirect controller with a system model or a committee of system models. When the system model has sufficient integrity to satisfy the plant requirements, i.e., when the system model has been sufficiently trained, the indirect controller with the system model is automatically enabled to replace the direct controller. When the performance falls, the direct controller can automatically assume operation of the plant, preferably maintaining operation in a control region suitable for generating additional training data for the system model. Alternatively, the system model incorporates a committee of models. Various types of sources for errors in the committee of models can be detected and used to implement strategies to improve the quality of the committee.Type: GrantFiled: June 5, 2003Date of Patent: March 20, 2007Assignee: NeuCo, Inc.Inventors: Wesley Curt Lefebvre, Daniel W. Kohn
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Patent number: 7181355Abstract: Production condition data and product quality data in a production line are monitored and stored in a production history database. When a quality deterioration event in the production line is detected while checking the product quality data, the improvement contents of the quality deterioration factor and production conditions are extracted. The extracted results and pre-stored quality improvement history data are collated with each other in order to confirm the validity thereof, and a simulation of the phenomenon of the production line is executed in order to verify the correctness. When the validity and correctness are verified, the production condition for the production line are revised to improve the quality deterioration factor.Type: GrantFiled: December 5, 2005Date of Patent: February 20, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Haruhiko Kondo, Tomoaki Kubo
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Patent number: 7177718Abstract: A semiconductor production system has storage devices for storage of all kinds of information including, but not limited to, the information concerning semiconductor design and information as to semiconductor manufacture along with information relating to semiconductor inspection processes, while representing as a class an instance added with meta data indicative of the role of the information in accordance with a logical expressive form. The system has a network for the storage device use, called the storage area network or “SAN”. The SAN is for interconnection between respective ones of the storage devices, semiconductor manufacturing apparatuses and a semiconductor inspection apparatus. The storage devices are seamlessly accessible from any one of the semiconductor manufacture apparatuses and the semiconductor inspection apparatus and also from a semiconductor design environment associated therewith.Type: GrantFiled: July 31, 2006Date of Patent: February 13, 2007Assignee: Hitachi High-Technologies CorporationInventors: Hidemitsu Naya, Rikio Tomiyoshi
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Patent number: 7174233Abstract: This is a system and method for management system. The system and method includes a raw pull indicator database which receives inputs comprising data from participant nodes. A system comprises execution logic which operates on the data from the raw pull indicator. A disposition system feedbacks reliability data of the participants based on the data operated on by the system.Type: GrantFiled: August 29, 2005Date of Patent: February 6, 2007Assignee: International Business Machines CorporationInventors: Edmund Blackshear, Michael W. Bolch, Biao Cai, George M. Hurtis, Eric T. Lambert, Shu Chen Lim, John S. Maresca, Paul A. Zulpa
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Patent number: 7139629Abstract: A computer controlled system provides for configuration-specific recovery of operation in a reconfigurable production system having a plurality of modules with a plurality of alternative capabilities for processing work units. The system includes a system controller having planning, scheduling, and performance failure identification functions. The planning function plans utilization of selected module capabilities in the production of jobs having not less than one work unit and the scheduling function schedules utilization of selected module capabilities in the production of jobs. The failure identification function identifies the failure of module capabilities to perform the work units for a scheduled job.Type: GrantFiled: April 28, 2003Date of Patent: November 21, 2006Assignee: Palo Alto Research Center IncorporatedInventors: Markus P. J. Fromherz, Daniel G. Bobrow
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Patent number: 7137120Abstract: Diagnostic data, such as a time increment corresponding to how long a thread waits to access a shared resource, is stored within a predetermined location in a data structure, such as a hash bucket in a hash table. The location is preferably correlated to the resource such that a display of the diagnostic data may be tailored to reflect a user-specified relationship between the data and resource.Type: GrantFiled: December 17, 2001Date of Patent: November 14, 2006Assignee: International Business Machines CorporationInventors: William Joseph Armstrong, Ryan Harvey Bishop, Michael Brian Brutman, Chris Francois, Richard Karl Kirkman, Jay Paul Kurtz, Henry Joseph May, Naresh Nayar, Dennis A. Towne
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Patent number: 7130708Abstract: Sheet metal forming is a manufacturing process in which flat sheet metal is drawn into a die cavity to form a product shape. Draw-in amount is the single most important stamping index that controls all forming characteristics (strains and stresses), formability failures (splits, wrinkles) and surface quality (distortions) on a panel. Adaptation of a new die set for repetitively stamping sheet metal parts to a part design specification is simplified by using a math-based simulation of the stamping operation under specified engineering stamping conditions for the specified part. The stamping simulations are used to create an engineered draw-in map comparing selected locations on the peripheral edge of the stamped part with corresponding locations on the peripheral edge of its original sheet metal blank.Type: GrantFiled: April 1, 2003Date of Patent: October 31, 2006Assignee: General Motors CorporationInventors: Chuan-Tao Wang, Norman Goan, Jimmy J. Zhang
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Patent number: 7127316Abstract: A computer implemented method for estimating manufacturing target bias for products in manufacturing tools. The method first establishes a first data set according to manufacturing target bias history based on a correlation with tools used. The manufacturing tools comprise a first manufacturing tool and other manufacturing tools. Next, a testing operation is executed for a predicted product in the first manufacturing tool to obtain a first predicted manufacturing target bias. Finally, manufacturing target bias of the predicted product in the other manufacturing tools is calculated according to the first data set and the first predicted manufacturing target bias.Type: GrantFiled: November 19, 2004Date of Patent: October 24, 2006Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yen-Pu Hsu, Cheng Hsien Wei, Mei-Jen Wu
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Patent number: 7127315Abstract: A method is provided for acting on a product in a machine operating in a machine cycle in the tobacco-processing industry in dependence on information about the product. Information about the product is detected synchronously with the machine cycle. The information is associated with the product asynchronously with respect to the machine cycle. An action is effected on the product synchronously with respect to the machine cycle in dependence on the information associated with the product.Type: GrantFiled: April 11, 2003Date of Patent: October 24, 2006Assignee: Hauni Maschinenbau AGInventors: Christian Junge, Karsten Eckert, Frank Grothaus, Bernhard Brinkmann, Michael Straube, Helge Frauen, Torsten Lietzke
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Patent number: 7123979Abstract: A method of intercorporate information-sharing between a product-manufacturing company and a product-inspecting company includes transmitting product quality and manufacturing number information from a product-manufacturing company's database storage device to a product-inspecting company's database storage device, inspecting a product, manufactured by the product-manufacturing company, by the product-inspecting company and storing an inspected result information of the product in the product-inspecting company's database storage device and transmitting the inspected result information from the product-inspecting company's database storage device to the product-manufacturing company's database storage device.Type: GrantFiled: October 21, 2003Date of Patent: October 17, 2006Assignee: Seiko Epson CorporationInventor: Kunihiro Kawahara
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Patent number: 7120513Abstract: An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on IC's at probe to determine whether any further repairs will be conducted later in the manufacturing process includes storing the data in association with a fuse ID of each of the IC's. The ID codes of the IC's are automatically read, for example, at an opens/shorts test during the manufacturing process. The data stored in association with the ID codes of the IC's is then accessed, and additional repair procedures the IC's may undergo are selected in accordance with the accessed data. Thus, for example, the accessed data may indicate that an IC is unrepairable, so the IC can proceed directly to a scrap bin without having to be queried to determine whether it is repairable, as is necessary in traditional IC manufacturing processes.Type: GrantFiled: August 31, 2000Date of Patent: October 10, 2006Assignee: Micron Technology, Inc.Inventors: Salman Akram, Warren M. Farnworth, Derek J. Gochnour, David R. Hembree, Michael E. Hess, John O. Jacobson, James M. Wark, Alan G. Wood
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Patent number: 7117062Abstract: A method and an apparatus for characterizing an uncertainty factor relating to processing workpieces. A first processing step is performed upon a workpiece. A first uncertainty factor associated with the first processing step is calculated. A final uncertainty factor associated with an end-of-line parameter relating to the workpiece is calculated based upon the first uncertainty factor. A process control function based upon the final uncertainty factor is performed.Type: GrantFiled: December 18, 2002Date of Patent: October 3, 2006Assignee: Advanced Micro Devices, Inc.Inventors: Thomas J. Sonderman, Robert J. Chong, Brian K. Cusson, Alexander J. Pasadyn
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Patent number: 7117063Abstract: A method for sorting integrated circuit (IC) devices of the type having a fuse identification (ID) into those devices requiring enhanced reliability testing and those requiring standard testing includes storing fabrication deviation data, probe data, and test data in association with the fuse ID of each of the devices indicating each of the devices requires either enhanced reliability testing or standard testing. The fuse ID of each of the devices is then automatically read before, during, or after standard testing of the devices. The testing process requirement data stored in association with the fuse ID of each of the devices is then accessed, and the devices are sorted in accordance with the accessed data into those devices requiring enhanced reliability testing and those requiring standard testing.Type: GrantFiled: September 29, 2005Date of Patent: October 3, 2006Assignee: Micro Technology, Inc.Inventor: Raymond J. Beffa
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Patent number: 7117057Abstract: A yield patrolling system, which monitors production yield of a manufacturing line, has at least one product measurement and test device. The product measurement and test device measures yield determining parameters of product at completion of process steps executed by equipment within the manufacturing line. The system further has a test database in communication with the product measurement and test device to receive and retain the measured yield determining parameters. A statistical calculator is in communication with the test database to receive the measured yield determining parameters. The statistical calculator then calculates from the measured yield determining parameters production yield statistics indicating an amount of the product being fabricated on the manufacturing line.Type: GrantFiled: September 10, 2002Date of Patent: October 3, 2006Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.Inventors: Woei-Chyi Kuo, Mingchu King, Shih-Tsung Liang
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Patent number: 7117059Abstract: A run-to-run control system and a run-to-run controlling method are proposed. The tool process parameters are real-time collected during the semiconductor process is performed and are regarded as the effective factors in the process for providing an optimal operation variables to the tool for the next process run. After modeling the metrology parameters with a set of the tool process parameters with respect to the semiconductor process for its corresponding process run, a set of optimal operation variables is determined by the controller and output to the tool to modify the process recipe of the process. Hence, the process recipe is real-time changed with the process environment to obtain the optimal process performance.Type: GrantFiled: April 18, 2005Date of Patent: October 3, 2006Assignee: ProMOS Technologies Inc.Inventor: Hung-Wen Chiou
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Patent number: 7117060Abstract: The present invention provides a method for controlling production or manufacturing costs by obtaining yield measurements of unit manufacturing for a multiplicity of products or production lines having a plurality of processes which includes determining a started units number for the plurality of processes. The method further includes determining a cost per unit for each unit of the plurality of processes, and calculating an expected approved units number for the plurality of processes. The expected approved units number is calculated by multiplying the started units number by an expected yield measurement. The method next includes calculating an actual approved units number for each of the plurality of processes by multiplying the started units number by an actual yield measurement, and calculating an unapproved units number for each of the plurality of processes by subtracting the expected approved units number from the actual approved units number.Type: GrantFiled: January 26, 2001Date of Patent: October 3, 2006Assignee: International Business Machines CorporationInventors: Thomas A. McPhee, Michael E. Cropp, Donald Diangelo, Alberto H. Gay, Carmella Pemberton, Joseph Saltarelli, Nicholas L. Volkringer, John J. DeMarco
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Patent number: 7107115Abstract: Occurrence of a process abnormality in a semiconductor processing apparatus is obtained by obtaining an index of a processing size of each of wafers within an X-th lot, in which the X represents an integer, based on data obtained during processing of each of the wafers of the X-th lot, obtaining an index of a processing size of each of wafers within an X+1-th lot, based on data thereof and anticipating an index of a processing sizes of each of wafers within an X+2-th lot, based on the index obtained as to each of the wafers of the X-th lot and the X+1-th lot. A process abnormality occurring during the processing of a wafer of the X+2-th lot is anticipated when the anticipated index of the X+2-th lot exceeds an allowance range.Type: GrantFiled: January 26, 2006Date of Patent: September 12, 2006Assignee: Hitachi High-Technologies CorporationInventors: Junichi Tanaka, Hideyuki Yamamoto, Shoji Ikuhara, Akira Kagoshima
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Patent number: 7107117Abstract: A method for sorting integrated circuit (IC) devices of the type having a fuse identification (ID) into those devices requiring enhanced reliability testing and those requiring standard testing includes storing fabrication deviation data, probe data, and test data in association with the fuse ID of each of the devices indicating each of the devices requires either enhanced reliability testing or standard testing. The fuse ID of each of the devices is then automatically read before, during, or after standard testing of the devices. The testing process requirement data stored in association with the fuse ID of each of the devices is then accessed, and the devices are sorted in accordance with the accessed data into those devices requiring enhanced reliability testing and those requiring standard testing.Type: GrantFiled: March 2, 2004Date of Patent: September 12, 2006Assignee: Micron Technology, Inc.Inventor: Raymond J. Beffa
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Patent number: 7101816Abstract: Methods for adaptive real time control of a system for thermal processing substrates, such as semiconductor wafers and display panels. Generally, the method includes creating a dynamic model of the thermal processing system, incorporating wafer bow in the dynamic model, coupling a diffusion-amplification model into the dynamic thermal model, creating a multivariable controller, parameterizing the nominal setpoints, creating a process sensitivity matrix, creating intelligent setpoints using an efficient optimization method and process data, and establishing recipes that select appropriate models and setpoints during run-time.Type: GrantFiled: December 29, 2003Date of Patent: September 5, 2006Assignee: Tokyo Electron LimitedInventors: Sanjeev Kaushal, Kenji Sugishima, Pradeep Pandey
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Patent number: 7103501Abstract: A computer program apparatus for analyzing design tolerances having a computer readable medium and computer program instructions. The computer program instructions are recorded on the computer readable medium and are executable by a processor. The computer program instructions are capable of performing the steps of facilitating the graphical identification by a user of a first and a second entity, identifying any objects related to the first and second entities, storing the identified dimensions and tolerances relating to the identified objects, and, analyzing the stored dimensions, to, in turn, determine the interfacing of the objects relative to each other.Type: GrantFiled: January 29, 2002Date of Patent: September 5, 2006Assignee: Varatech Engineering ConsultantsInventors: Mahesh Kamatala, Robert Gardner, Debajit Guha, Hwei-Min Lu, Erik Salisbury, Raj Verma, Ashish Gandhi
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Patent number: 7099733Abstract: A semiconductor production system has storage devices for storage of all kinds of information including, but not limited to, the information concerning semiconductor design and information as to semiconductor manufacture along with information relating to semiconductor inspection processes, while representing as a class an instance added with meta data indicative of the role of the information in accordance with a logical expressive form. The system has a network for the storage device use, called the storage area network or “SAN”. The SAN is for interconnection between respective ones of the storage devices, semiconductor manufacturing apparatuses and a semiconductor inspection apparatus. The storage devices are seamlessly accessible from any one of the semiconductor manufacture apparatuses and the semiconductor inspection apparatus and also from a semiconductor design environment associated therewith.Type: GrantFiled: July 12, 2004Date of Patent: August 29, 2006Assignee: Hitachi High-Technologies CorporationInventors: Hidemitsu Naya, Rikio Tomiyoshi
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Patent number: 7099728Abstract: Inspection items of inspection steps performed in processes 40 to 70, namely, in the processes of parts incoming, production, outgoing and market, and quality defect information items generated in connection with these inspections, are registered in advance in a code master database 17 as systematized codes. A part ID unique to a given part and a product ID unique to a given product are correlatively recorded in a part bar code label 81 and in a product bar code label 82 respectively. These bar code labels 81 and 82 are affixed to each part and product. In each of the processes 40 to 70, the part IDs or the product IDs are read, inspection results and quality defect information are input, and information is stored in databases 7, 9, 12, 14 and 16, whereby the quality history of each product is managed.Type: GrantFiled: February 10, 2003Date of Patent: August 29, 2006Assignee: Sharp Kabushiki KaishaInventor: Kazuhisa Urabe
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Patent number: 7099730Abstract: A terminal table unit is associated with an output apparatus such as valves and solenoids and an input apparatus such as switches and includes not only a main body with a control device and a memory device but also a cassette with a memory medium that is detachably attached to the main body. The control device receives input data from the input apparatus for controlling the output apparatus and drives the output apparatus according to the received input data. The received input data are temporarily stored in the memory device in specified units. When the input data are found to include abnormal data, the control device causes data stored in the memory device to be transferred to the memory medium of the cassette such that the memory cassette can be removed and the abnormal data stored on the memory medium can be analyzed elsewhere.Type: GrantFiled: March 12, 2004Date of Patent: August 29, 2006Assignee: OMRON CorporationInventors: Masanori Yamashita, Hiroshi Hashimoto, Masaru Imoto, Hajime Izutani, Fumihiko Okumura, Tomoaki Yoshikawa, Hirofumi Iwanaga
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Patent number: 7099729Abstract: A semiconductor process and yield analysis integrated real-time management method comprises inspecting a plurality of semiconductor products with a plurality of items to generate and record a plurality of inspecting results during semiconductor process, classifying the semiconductor products as a plurality of groups with a default rule to generate and record an initial data in a database, indexing a plurality of semiconductor product groups and the corresponding initial data from the database by a default product rule and parameter to calculate a corresponding analysis result, and displaying the analysis result according to the indexed semiconductor product groups and the initial data.Type: GrantFiled: February 20, 2004Date of Patent: August 29, 2006Assignee: Powerchip Semiconductor Corp.Inventors: Hung-En Tai, Chien-Chung Chen, Sheng-Jen Wang
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Patent number: 7096085Abstract: A method, system and medium is provided for enabling improved control systems. An error, or deviation from a target result, is observed for example during manufacture of semiconductor chips. The error within standard deviation is caused by two components: a white noise component and a signal component (such as systematic errors). The white noise component is, e.g., random noise and therefore is relatively non-controllable. The systematic error component, in contrast, may be controlled by changing the control parameters. A ratio between the two components is calculated autoregressively. Based on the ratio and using the observed or measured error, the actual value of the error caused by the systematic component is calculated utilizing an autoregressive stochastic sequence. The actual value of the error is then used in determining when and how to change the control parameters.Type: GrantFiled: May 28, 2004Date of Patent: August 22, 2006Assignee: Applied MaterialsInventor: Young Jeen Paik
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Patent number: 7096082Abstract: A control document template streamlines the creation of control documents and facilitates consistent entry of data. A multi-page spreadsheet file incorporates the design and process failure mode effects analysis pages, the control plan, tools for forming the process flow diagram, the work instructions, and the packaging specifications. A macro sorts the failure mode effects analysis pages by risk priority number without overwriting the original data.Type: GrantFiled: September 16, 2003Date of Patent: August 22, 2006Assignee: Methode Electronics, Inc.Inventor: David G. Connelly
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Patent number: 7092777Abstract: A data integrity module and method for evaluating data in a process information database. A neural network generates statistical patterns for specifying patterns for the data being evaluated. A fuzzy expert rules base specifies rules for evaluating the data. A processor, responsive to the rules base and the statistical patterns, identifies suspect data in the process information database by evaluating the data according to the rules base and the statistical patterns. A modification system modifies the suspect data in the process information database.Type: GrantFiled: October 28, 2005Date of Patent: August 15, 2006Assignee: Kimberly-Clark Worldwide, Inc.Inventors: Walter Caswell Reade, Douglas Gordon Barron Barber, Paul D. Fuller, Melissa S. Klaips, Charles Earl Markham, Michael Roy Pokorny
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Patent number: 7089075Abstract: Systems and methodologies are disclosed for generating setup information for use measuring process parameters associated with semiconductor devices. A system comprises an off-line measurement instrument to measure an unpatterned wafer and a setup information generator to generate setup information according to the unpatterned wafer measurement. The system then provides the setup information to a process measurement system for use in measuring production wafers in a semiconductor manufacturing process.Type: GrantFiled: April 24, 2002Date of Patent: August 8, 2006Assignee: Tokyo Electron LimitedInventor: Talat Fatima Hasan
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Patent number: 7079911Abstract: A computer-implemented method and system includes capabilities for receiving suspect item definitions (e.g. item serial numbers, lot numbers, operation identifiers, date ranges, etc.) into a computer database, detecting item identifiers in a manufacturing or assembly process, and comparing the item identifiers with the suspect item definitions. If the detected item identifier falls within one of the suspect item definitions, the item is automatically isolated or otherwise rejected from manufacturing or assembly process. Other aspects of the invention include functionality for determining the location of suspect items. Locations may be inferred and off-site. Another aspect includes automatically modifying the manufacturing or assembly process to bypass one or more suspect manufacturing or assembly operations. A plurality of user interfaces are provided for defining, locating and managing suspect items.Type: GrantFiled: November 26, 2003Date of Patent: July 18, 2006Assignee: Ford Motor CompanyInventors: Michael A. Gallu, John Pauli, Richard Maisonville, William C. Brower
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Patent number: 7076318Abstract: A management method capable of making an accurate decision about a malfunction of the semiconductor manufacturing equipment includes sampling a plurality of data of at least one parameter under normal operating conditions of the semiconductor manufacturing equipment; generating a Mahalanobis space A from a group of sampled data; calculating a Mahalanobis distance from measured values of the parameter under ordinary operating conditions of the semiconductor manufacturing equipment; and deciding that a malfunction occurred in the semiconductor manufacturing equipment when the value of the Mahalanobis distance exceeds a predetermined value.Type: GrantFiled: November 14, 2003Date of Patent: July 11, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Shunji Hayashi
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Patent number: 7076320Abstract: Systems and methods that improve process control in semiconductor manufacturing are disclosed. According to an aspect of the invention, conditions in a cluster tool environment and/or a wafer therein can be monitored in-situ via, for example, a scatterometry system, to determine whether parameters associated with wafer production are within control limits. A cluster tool environment can include, for example, a lithography track, a stepper, a plasma etcher, a cleaning tool, a chemical bath, etc. If an out-of-control condition is detected, either associated with a tool in the cluster tool environment or with the wafer itself, compensatory measures can be taken to correct the out-of-control condition. The invention can further employ feedback/feed-forward loop(s) to facilitate compensatory action in order to improve process control.Type: GrantFiled: May 4, 2004Date of Patent: July 11, 2006Assignee: Advanced Micro Devices, Inc.Inventors: Khoi A. Phan, Bhanwar Singh, Ramkumar Subramanian
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Patent number: 7069103Abstract: A method and apparatus provided for controlling cumulative wafer effects. The method comprises processing a workpiece, determining a cumulative effect of the processing on the workpiece and comparing the determined cumulative effect to a reference target value. The method further comprises adjusting a downstream process of the workpiece based on comparing the determined cumulative effect to the reference target value.Type: GrantFiled: June 28, 2002Date of Patent: June 27, 2006Inventors: Christopher A. Bode, Matthew A. Purdy
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Patent number: 7065419Abstract: The present disclosure provides a job flow system for use in a manufacturing environment, such as a semiconductor fab. The job flow system includes a plurality of sequence-related jobs associated with the manufacturing and a computer-controlled Petri Net structure. The Petri Net structure includes a plurality of agents associated with each of the sequence-related jobs. The Petri Net structure also includes a plurality of application processes to be performed by the agents, one or more description files, and a PN Center for loading the one or more description files and activating a first agent to perform one or more of the application processes in response to the one or more description files and in response to process status information from application processes.Type: GrantFiled: April 14, 2004Date of Patent: June 20, 2006Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chuan-Jen Wu, Chyuarn-Yuh Dai, Tien-Hsiang Sun
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Patent number: 7065570Abstract: A management system of a machine equipped with a driving-power source reads out maintenance conditions from a storage means of maintenance management information when data and conditions, concerned about a maintenance management of a machine, the features of the machine, and so on, including the maintenance conditions, are inputted from the input means. Then, information about predicted maintenance management under a certain operation time of the machine is predicted with reference to the maintenance conditions. Subsequently, the information about the predicted maintenance management is represented on a display means. Furthermore, a maintenance predicted value is previously stored in a data base or the like with respect to the maintenance within an operation time under the contract or within a contract term for each of a plurality of contract ranks. A maintenance actual result value of the machine being entered is accumulatively stored.Type: GrantFiled: July 9, 2001Date of Patent: June 20, 2006Assignee: Komatsu Ltd.Inventors: Hidetada Fukushima, Hisashi Moritoki, Tomio Fuchiwaki, Iwaharu Kawada, Nobuyuki Arashima, Masatomo Watanabe, Yuji Kusayanagi, Masaru Kakihara, Osamu Yamazaki
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Patent number: 7065426Abstract: A method of evaluating the efficiency of an automatic machine, whereby, upon completion of a given production lot, a current performance index achieved by the automatic machine during manufacture of the production lot is calculated; and the current performance index is memorized in a nonvolatile memory, together with various characteristic parameters relating to the processing performed. To evaluate the efficiency of the automatic machine, the current performance index is compared with historic performance indexes memorized previously during operation of the automatic machine and having characteristic parameters substantially similar to the characteristic parameters of the current performance index.Type: GrantFiled: May 21, 2002Date of Patent: June 20, 2006Assignee: G. D Societa' per AzioniInventors: Antonio Valentini, Fiorenzo Draghetti
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Patent number: 7065424Abstract: This invention introduces systems and methods that control production process quality, wherein the production process has a plurality of durable items, each durable item is associated with a re-qualification process initiated as a function of a life expectancy associated therewith. The life expectancy associated with each durable item is reset upon completion of the associated re-qualification process. An exemplary method comprises (I) monitoring re-qualification indicia associated with each associated re-qualification process, and (ii) controlling availability of re-qualified durable items of the production process as a function of the re-qualification indicia to thereby control production process quality.Type: GrantFiled: March 4, 2004Date of Patent: June 20, 2006Assignee: National Semiconductor CorporationInventors: William MacDonald, George Logsdon, Darren Lee Rust
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Patent number: 7065460Abstract: An image of the shape of a semiconductor wafer is displayed on a display apparatus for displaying an inspection result of a semiconductor device, and a different color or pattern is displayed for each inspection result as display information indicating the inspection result of a semiconductor device in a region corresponding to the semiconductor device on the image of the semiconductor wafer.Type: GrantFiled: September 16, 2004Date of Patent: June 20, 2006Assignee: Matsushita Electric Industrial Co., Inc.Inventor: Satoru Nishimura
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Patent number: 7050922Abstract: In a test order optimization method, a pass probability and resource requirement are identified for each of a plurality of tests. A pass-weighted resource requirement factor is then generated for each of the tests in accord with the test's pass probability and resource requirement. Thereafter, the tests are ordered to be executed in accord with their pass-weighted resource requirement factors.Type: GrantFiled: January 14, 2005Date of Patent: May 23, 2006Assignee: Agilent Technologies, Inc.Inventor: Zhengrong Zhou
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Patent number: 7050879Abstract: A method and an apparatus are provided for adjusting a sampling protocol in an adaptive control process. The method comprises determining a performance value based on a measurement associated with at least one or more previously processed workpieces, adjusting a sampling protocol for one or more processed workpieces based on the determined performance value, and measuring the one or more processed workpieces according to the sampling protocol to provide one or more measurements. The method further comprises adjusting at least one of a process model and a control parameter based on at least a portion of the one or more measurements.Type: GrantFiled: April 3, 2003Date of Patent: May 23, 2006Assignee: Advanced Micro Devices, Inc.Inventors: Jin Wang, Gregory A. Cherry
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Patent number: 7047093Abstract: A sample processing apparatus having a main unit for processing a sample, a recorder for recording information of an operation in the main unit as predetermined data, which information includes a plurality of data corresponding to outputs of a plurality of sensors installed on the main unit, and a display unit for displaying each of the data corresponding to outputs of the sensors simultaneously.Type: GrantFiled: October 22, 2003Date of Patent: May 16, 2006Assignee: Hitachi High-Technologies CorporationInventors: Shigeru Nakamoto, Hideaki Kondo, Juntaro Arima
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Patent number: 7047090Abstract: A method for the automatic selection of computer system parameter values to improve system performance as workload on the system changes. Methods are disclosed for automatically making minor adjustments to computer system parameters and comparing long-term associated performance changes in order to set parameter values so as to obtain improved system performance. The time frame over which a change in a system parameter and the associated system performance change is averaged is adjustable, thus permitting evaluation over shorter or longer periods of times as deemed appropriate. An objective measure of system performance is defined prior to implementation of the present methods. For transaction based systems, average system response-time for a given demand on the system could be, for example, such a measure. For systems executing batch-type workloads, system throughput may be used as the indicator of how well the system is performing.Type: GrantFiled: June 18, 2003Date of Patent: May 16, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Thomas Edwin Turicchi, Jr., Doug Grumann, Steven R Landherr, Michael Richard Carl
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Patent number: 7043325Abstract: The present invention provides a method and apparatus for determining product-specific model errors. The method includes determining a plurality of product model errors associated with a corresponding one of a plurality of products. The method also includes determining at least one input parameter for a process model to be used in processing a workpiece to form one of the plurality of products based upon the product model error associated with the product to be formed on the workpiece.Type: GrantFiled: March 1, 2005Date of Patent: May 9, 2006Assignee: Advanced Micro Devices, Inc.Inventor: Ernest Adams, III