Emulation Patents (Class 703/23)
  • Publication number: 20140006001
    Abstract: Methods, apparatuses and storage medium associated with engineering perceptual computing systems that includes user intent modeling are disclosed herewith. In embodiments, one or more storage medium may include instructions configured to enable a computing device to receive a usage model having a plurality of user event/behavior statistics, and to generate a plurality of traces of user events/behaviors over a period of time to form a workload. The generation may be based at least in part on the user event/behavior statistics. The workload may be for input into an emulator configured to emulate a perceptual computing system. Other embodiments may be disclosed or claimed.
    Type: Application
    Filed: June 27, 2012
    Publication date: January 2, 2014
    Inventors: Gila Kamhi, Amit Moran, Limor David, Yoni Aizik
  • Patent number: 8619624
    Abstract: A network performance estimating device for estimating network performance of a parallel computing machine for executing plural processes in parallel, includes a communication data obtaining unit that obtains communication data output from plural calculation nodes when the plural processes are executed by using the plural calculation nodes, a design estimating unit for referring to a design information storing unit that stores design information defining a network as an estimation target to execute a simulation on communications when the communication data obtained by the communication data obtaining unit are transmitted through the network as the estimation target, and renews estimation information representing an estimation result of the estimation target network stored by an estimation information storing unit on the basis of the obtained simulation result, and a communication data transmission unit for transmitting the communication data obtained by the communication data obtaining unit to an addressed ca
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: December 31, 2013
    Assignee: Fujitsu Limited
    Inventor: Yoshiro Ikeda
  • Patent number: 8620640
    Abstract: A back-up storage system that emulates a sequential storage medium such as a tape and stores data on a randomly accessible storage medium, such as disk. The back-up storage system includes a randomly accessible storage medium, a front-end interface to emulate the sequential storage medium, to communicate with external devices using a protocol that supports the sequential storage medium, and to receive sequential-format data from the external devices, and a back-end interface to receive the sequential-format data from the front-end interface and to store the sequential-format data on the randomly-accessible storage medium.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: December 31, 2013
    Assignee: Sepaton, Inc.
    Inventors: Miklos Sandorfi, Timmie G. Reiter
  • Publication number: 20130338993
    Abstract: Various embodiments include nested emulation for a source application and source emulator. Duplicate source ISA libraries redirect the source emulator library calls to a target library, thereby forcing the native emulator through proper emulation channels between first and second ISAs. Other embodiments concern accelerating dynamic linking by determining certain function calls that, rather than being processed through emulation of PLT code, are instead directly called without the need for PLT code translation. Some embodiments address both nested emulation and accelerated dynamic linking but other embodiments include one of nested emulation and accelerated dynamic linking. Other embodiments are described herein.
    Type: Application
    Filed: March 22, 2012
    Publication date: December 19, 2013
    Inventors: Xueliang Zhong, Jianhui Li, Jianping Chen, Tingtao Li, Yong Wu, Wen Tan, Xiaodong Lin
  • Patent number: 8612200
    Abstract: Disclosed are a PLC (Programmable Logic Controller) symbol structure for a PLC code for automatically generating an input/output model, and a simulation apparatus and a simulation method for testing the PLC code using the same. In one embodiment, a computer-readable recording medium records a PLC code including a plurality of PLC symbols, wherein each of the PLC symbols includes a plurality of levels identified by an identifier, and a computer automatically generates an input/output model using the structure of each of the PLC symbols, thereby performing a simulation for testing the PLC code. The PLC symbol structure according to one embodiment systematically contains information required for automatically generating the input/output model, making it possible to automatically generate the input/output model for testing the PLC code in an easier manner without knowledge of simulation and modeling, and reducing the time consumed and the labor required for generating the input/output model.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: December 17, 2013
    Assignee: UDMTEK Co., Ltd.
    Inventors: Gi Nam Wang, Sang Chul Park, Hyeong Tae Park
  • Patent number: 8600727
    Abstract: Methods and systems are disclosed, including a method for executing a non-native code stream on a computing system. The method includes forming one or more blocks of emulated mode code for execution on a computing system. Each of the one or more blocks includes a preamble and a plurality of operators ordered for execution in a predetermined sequence, wherein for a specified block the preamble defines one or more conditions required for uninterrupted execution of the operators included in the specified block. The method also includes assessing the one or more conditions associated with the specified block, and, after assessing the one or more conditions, executing each of the operators included in the specified block without assessing any of the one or more conditions between execution of the operators within the specified block.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: December 3, 2013
    Assignee: Unisys Corporation
    Inventors: David Strong, Andrew Ward Beale
  • Patent number: 8594991
    Abstract: A memory mapping system for compactly mapping dissimilar memory systems and methods for manufacturing and using same. The mapping system maps a source memory system into a destination memory system by partitioning the source memory system and disposing memory contents within the partitioned source memory system into the destination memory system. In one embodiment, the mapping system factorizes a source data width of the source memory system in terms of a destination data width of the destination memory system to form at least one data sub-width. A source memory sub-region is defined for each data sub-width. The memory contents associated with each source memory sub-region are disposed within the destination memory system in a side-by-side manner across selected destination memory registers of the destination memory system. The mapping system thereby can compactly map the memory contents into the destination memory system without a loss of valuable memory space.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: November 26, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventor: Alexandre Birguer
  • Patent number: 8589141
    Abstract: A method for controlling a resource sharing apparatus coupling least one input device to a first host is disclosed. A first input signal is acquired from the input device, and whether the first input signal comprises standby indication of a switching command is determined. The input device is disconnected from the first host when the first input signal comprises the standby indication, and the input device is emulated to the first host.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: November 19, 2013
    Assignee: Aten International Co., Ltd.
    Inventors: Fong Lien, Yao-Lung Kuo
  • Patent number: 8582126
    Abstract: A design support method of verifying control on a device of an image forming apparatus registers, in a storage device, trigger information for specifying a content of control to be executed when a start condition for switching the control state of the device is satisfied (S1002). The apparatus then registers, in the storage device, the allowable range of the state change of the device due to control switched when the start condition is satisfied (S1003). The apparatus then verifies whether the state change of the device due to the control switched when the start condition is satisfied falls outside the allowable range, by referring to the operation state of the device which is input through an input unit, and the trigger information registered in the storage device (S1004).
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: November 12, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Ono, Masahiro Serizawa, Hideyuki Ikegami, Akira Morisawa
  • Patent number: 8577666
    Abstract: A modular circuit emulation system includes a global clock generator that generates a plurality of clock signals. A plurality of emulation boards each include at least one programmable circuit and a clock buffer. The clock buffer generates at least one synchronized clock signal for clocking the programmable circuit or circuits, based on at least one of the plurality of global clock signals.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: November 5, 2013
    Assignee: ViXS Systems, Inc.
    Inventors: Hualiang Ni, Ahmad R. Moghaddam, Cecil E. King
  • Publication number: 20130289969
    Abstract: An emulator is disclosed that allows for diagnoses of failures or defects within the emulator. A map of faulty resources is generated to identify which resources should be avoided during compilation. Thus, in a transparent and automated manner, defects found during diagnostics are stored in a database of unusable emulator resources. A compiler has access to the database and compiles the design taking into account unusable resources. In another embodiment, the defects of an emulator board are stored on the emulator board itself. This allows each board to store its own maintenance information that can be used at the manufacturing site for changing defective chips. Defects stored on the board itself allow the defects to be obtained independent of a position of a board within the emulator to simplify identification of the faulty resource.
    Type: Application
    Filed: June 24, 2013
    Publication date: October 31, 2013
    Inventors: Eric Durand, Estelle Reymond, John Fadel
  • Patent number: 8549491
    Abstract: Provided is to an apparatus for application testing of an embedded system which can cross-develop an application program installed in the embedded system regardless of the type of a target system. A virtual environment for testing the application program adopted in the target system is constructed on the basis of information inputted through a user interface and the application program is tested by configuring a virtual target system in the constructed virtual environment. According to the present invention, the application program adopted in the target system can be developed and tested without constructing a cross-development environment for each target system in an environment in which various kinds of embedded systems are developed.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: October 1, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ingeol Chun, Taeho Kim, Chaedeok Lim, Seungmin Park
  • Patent number: 8543371
    Abstract: An emulation apparatus includes a translator, a first memory map, a second memory map, and a rewriting unit. The translator translates an instruction output from the target program to an instruction executable by the emulation apparatus. The first memory map is located in a memory region for use by the target program and is write-protected based on operation environment of the emulation apparatus. The second memory map is write-protected based on at least one of the execution environment of the target program and content of the instruction from the target program. The rewriting unit rewrites a first write instruction output from the translator to a second write instruction to the second memory map when the first write instruction causes a write protection violation to the first memory map.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: September 24, 2013
    Assignee: Fujitsu Limited
    Inventor: Munenori Maeda
  • Patent number: 8544039
    Abstract: A system that incorporates teachings of the present disclosure may include, for example, a set-top box (STB) having a controller to present a plurality of advertisement categories, detect a selection of one of the plurality of advertisement categories, present an advertisement template associated with the selected advertisement category, detect a plurality of entries in the advertisement template for constructing a consumer classified advertisement, generate an advertisement graphical user interface (GUI) corresponding to the entries, detect one or more demographic patterns in the plurality of entries, identify a plurality of users of a media communication system from which the STB operates according to the detected one or more demographic patterns, and provide the plurality of users of the media communication system accessibility to the advertisement GUI. Other embodiments are disclosed.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: September 24, 2013
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: E-Lee Chang, John R. Stefanik, Charles Patrick Bradley, Tuck Seng Tan, Darnell Clayton, Madhur Khandelwal
  • Patent number: 8543990
    Abstract: Methods and apparatus for testing software with real-time source data from a projectile according to various aspects of the present invention operate in conjunction with a real-time data source, a signal processor, a recordable medium, and a testing platform. The signal processor receives real-time data from a real-time data source during a test and saves it to a storage medium before providing the real-time data to the testing platform for permanent storage. During a subsequent test, the testing platform may upload the saved real-time data to the signal processor foregoing the need to generate new real-time data from the real-time data source.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: September 24, 2013
    Assignee: Raytheon Company
    Inventors: Patric M. McGuire, Steven T. Siddens, David A. Lance
  • Patent number: 8538741
    Abstract: A method and apparatus that partitions a single display's viewable area into at least two virtual viewable areas, and emulates the at least two virtual viewable areas as at least two emulated physical displays with an operating system such that the operating system behaves as if interfacing with at least two actual independent physical displays. The method provides the operating system with generated display identification data (such as “EDID”) for each of the emulated physical displays in response to a query from the operating system. The method and apparatus also receive notification of an interrupt (where the interrupt corresponds to the single physical display), and reports to the operating system with at least two sets of interrupt reporting information, corresponding to the at least two emulated physical displays, as if two interrupts were received. The operating system is thereby “faked” into acting as if two physical displays are in operation.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: September 17, 2013
    Assignee: ATI Technologies ULC
    Inventors: Yinan Jiang, Shahriar Pezeshgi, Ming-Wei Chien
  • Patent number: 8539010
    Abstract: A virtual machine monitor for a virtual machine. The virtual machine monitor makes the processor in the virtual machine: receive a timer setting from the guest OS in place of the timer, the timer setting being for making the timer generate a timer interrupt after a lapse of a setting period; change, when the guest OS inputs or outputs data from or to the I/O device via the virtual machine monitor, the setting period set in the timer so that a relation between I/O wait time recognized by the guest OS and I/O process time other than the I/O wait time becomes approximate to a relation between the I/O wait time recognized by the virtual machine monitor and the I/O process time; set the timer setting with the changed setting period in the timer; and notify, when receiving the timer interrupt, the guest OS of occurrence of the timer interrupt.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: September 17, 2013
    Assignee: Fujitsu Limited
    Inventor: Hiroya Inakoshi
  • Patent number: 8532975
    Abstract: A system and method for capturing and delivering emulation data from a hardware emulation system to a simulator running on a host workstation without considerably sacrificing emulation speed or sacrificing the emulation capacity available for a user's logic design. According to one embodiment, a system, comprises a logic software simulator running on a host workstation; a hardware emulation system having a system bus and an emulator chip, the emulator chip includes: an emulation processor cluster, and a capture buffer connected to the system bus; and a high-speed interface connecting the host workstation to the system bus of the hardware emulator, wherein the capture buffer captures a select output of the emulation processor cluster.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: September 10, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Mitchell Poplack, Beshara Elmufdi
  • Patent number: 8515562
    Abstract: A computer based control system including a field network to which field devices equipped with hardware addresses and logical names are to be connected, a control device performing addressing control in relation to the field devices and their logical addresses and a simulation handling device. The simulation handling device has an own logical address, an own hardware address and is capable of obtaining a logical address, as well as possibly a logical name and/or a hardware address of at least one field device involved in the simulation. It notifies the control device that the field device is connected to the field network, detects a control signal directed towards field device addressed using the logical and/or hardware address of this field device and responds to the control signal with simulation results using the same logical and/or hardware address as the source of the response.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: August 20, 2013
    Assignee: ABB Research Ltd.
    Inventor: Kai Hansen
  • Publication number: 20130211813
    Abstract: A smart-store emulation unit is provided for use on-board a weapon platform in place of the physical presence of a smart-store. The emulation unit may be used for operator training on or testing of the smart-store on-board an operational weapon platform such as an aircraft, tank or ship.
    Type: Application
    Filed: February 9, 2012
    Publication date: August 15, 2013
    Inventor: Edward H. CAMPBELL
  • Patent number: 8504344
    Abstract: The present invention allows a verification environment to be used to control and coordinate interaction with a design running on an accelerator or emulator without significant speed penalty. For example, an interface capable of communicating with test software running on an embedded processor is used to control and monitor the flow of data into the external interface of the design. Thus, a connection is made between the verification environment and the design under test running on the accelerator/emulator via a connection formed directly between the verification environment and embedded software running on the emulator for simulation and monitoring purpose at a very low frequency so that high-speed acceleration may still be achieved.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: August 6, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventor: Giles T Hall
  • Patent number: 8504347
    Abstract: A simulation apparatus that performs simulation of design data of a verification target circuit including a logic circuit that operates as a multi-cycle path of N cycles in synchronization with a clock signal, the simulation apparatus includes a design data generation section that generates design data of a multi-cycle verification circuit for selectively providing an undefined value signal in place of a signal in a multi-cycle part in the verification target circuit; a logical simulation section that performs logical simulation, without delay, on the basis of design data of the verification target circuit and the design data of the multi-cycle verification circuit; and a comparison section that compares the signal of the verification target circuit with a signal of an expected value in the verification target circuit in the logical simulation.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: August 6, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Naoto Kosugi
  • Patent number: 8494837
    Abstract: Systems and methods for active learning of statistical machine translation systems through dynamic creation and updating of parallel corpus. The systems and methods provided create accurate parallel corpus entries from a test set of sentences, words, phrases, etc. by calculating confidence scores for particular translations. Translations with high confidence scores are added directly to the corpus and the translations with low confidence scores are presented to human translations for corrections.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Yuqing Gao, Bing Xiang, Bowen Zhou
  • Patent number: 8494833
    Abstract: Emulating a computer run time environment including: storing translated code in blocks of a translated code cache, each block of the translated code cache designated for storage of translated code for a separate one of the target executable processes, including identifying each block in dependence upon an identifier of the process for which the block is designated as storage; executing by the emulation environment a particular one of the target executable processes, using for target code translation the translated code in the block of the translated code cache designated as storage for the particular process; and upon encountering a context switch by the target operating system to execution of a new target executable process, changing from the block designated for the particular process to using for target code translation the translated code in the block of the translated code cache designated as storage for the new target executable process.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Eric O. Mejdrich, Paul E. Schardt, Corey V. Swenson
  • Patent number: 8484626
    Abstract: A method may include creating an Extensible Markup Language (XML) instruction file based on screen shots of a host system, providing the XML instruction file to a screen scraper program, executing screen scraping operations based on the XML instruction file, and outputting a user interface file based on the screen scraping operations that corresponds to extracted data output from the host system.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: July 9, 2013
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Sreeramamurthy Nagulu, Sijo Kuriakose
  • Patent number: 8478629
    Abstract: A method and system for collaboratively managing risk is presented. In one embodiment the method comprises analyzing a node in a risk network when an output of said node violates a control limit, identifying a cause of said violation of said control limit, creating a mitigation action in response to said node violating said control limit, performing said mitigation action, said mitigation action having an influence on said output of said node, and measuring said output of said node to determine effectiveness of said mitigation action on said node, wherein a program using a processor unit executes one or more of said analyzing, identifying, creating, performing and measuring steps.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Chidanand V. Apte, Eric W. Cope, Lea A. Deleris, Shubir Kapoor, Kevin P. McAuliffe, Bonnie K. Ray
  • Publication number: 20130166272
    Abstract: Communications between an application executing in an emulated environment in an operating system and a network stack in the operating system may be improved to allow the application access to additional information. The application may be able to access a network traffic log of the operating system, including contents of packets transmitted and received for the application. The network traffic log may be transmitted to the application by a non-emulated interface executing in the operating system. The application may merge the contents of the network traffic log with an internal application log based on matching similar events between the two logs.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Inventors: Jason Schultz, Robert Bergerson, John Peters
  • Patent number: 8473273
    Abstract: An emulator is disclosed that allows for diagnoses of failures or defects within the emulator. A map of faulty resources is generated to identify which resources should be avoided during compilation. Thus, in a transparent and automated manner, defects found during diagnostics are stored in a database of unusable emulator resources. A compiler has access to the database and compiles the design taking into account unusable resources. In another embodiment, the defects of an emulator board are stored on the emulator board itself. This allows each board to store its own maintenance information that can be used at the manufacturing site for changing defective chips. Defects stored on the board itself allow the defects to be obtained independent of a position of a board within the emulator to simplify identification of the faulty resource.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: June 25, 2013
    Assignee: Mentor Graphics Corporation
    Inventors: Eric Durand, Estelle Reymond, John Fadel
  • Patent number: 8473275
    Abstract: A method for emulating and debugging a microcontroller is described. In one embodiment, an event thread is executed on an emulator that operates in lock-step with the microcontroller. Event information is sampled at selected points. Trace information is also recorded at the selected points. As such, the event information and trace information are effectively pre-filtered. Accordingly, it is not incumbent on a designer to read and understand the event and trace information and sort out the information that is of interest. Instead, this task is essentially done automatically, helping the designer and reducing the probability of error. Furthermore, because only selected event and trace information is recorded, the resources of the in-circuit emulator system are not taxed.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: June 25, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Manfred Bartz, Craig Nemecek, Matt Pleis
  • Patent number: 8468008
    Abstract: The emulation of a data processing I/O protocol employs a process which obviates the need to consider hardware specific functionality for which emulation is not an optimal solution. The particular protocol described in exemplary fashion herein is the OSA protocol as defined by Open System Adapter standards. The use of this emulation is also seen to leave in place all of the software tools otherwise employed.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: June 18, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ping T. Chan, Paul M. Gioquindo, Ying-Yeung Li, Bruce H. Ratcliff, Stephen R. Valley, Mooheng Zee
  • Patent number: 8468009
    Abstract: A hardware emulator having an emulation unit with a shadow processor is described. The shadow processor is capable of performing an extra look up table (LUT) operation in addition to the LUT operation performed by a processor within the emulation unit. The emulation unit comprises a memory for supplying a first amount of data to a shadow processor register, wherein the shadow processor register stores the first amount of data for later retrieval. The data stored in the shadow processor register function as operands for a truth table stored in the memory and are used to select a function bit out from the memory. The selected function bit out represents a Boolean evaluation of the operands.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: June 18, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Mikhail Bershteyn, Beshara G. Elmufdi
  • Patent number: 8468007
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for emulating a mass storage device and a file system of a mass storage device. In a first aspect, a human-portable data processing device that includes one or more data processors that perform operations in accordance with machine-readable instructions, an incoming message classifier configured to classify an incoming read command according to an address of the data requested by the incoming read command, and an emulation data generation component connected to respond to the classification of the incoming read command by the incoming message classifier to generate emulation data emulating that which would have been read by the incoming read command were the human-portable data processing device a mass storage device; and a bus controller configured to respond to the incoming read command with the emulation data generated by the emulation data generation component.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: June 18, 2013
    Assignee: Google Inc.
    Inventors: Jean Baptiste Maurice Queru, Christopher L. Tate
  • Patent number: 8463590
    Abstract: Methods for generating a normalized expression signal for microarray data based on a theoretical distribution at the unit level to produce a normalized expression signal for the single microarray that is independent of other microarrays. The method typically includes receiving microarray data representing a plurality of probe pairs for a single microarray, determining, for each probe pair, differences between intensities of perfect match (PM) probes and intensities of mismatched (MM) probes, determining a difference signal, D, based on the determined differences, and scaling the difference signal, D, to produce an expression signal, DS. The method also typically includes normalizing the expression signal based on a theoretical distribution at the unit level to produce a normalized expression signal for the single microarray that is independent of other microarrays.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: June 11, 2013
    Assignee: Roche Molecular Systems, Inc.
    Inventor: Wei-min Liu
  • Patent number: 8447839
    Abstract: A three-layer management protocol device emulator and method that emulates numerous Web management protocol devices using a single virtual machine. A client on a network believes that there are a large number of Web management protocol devices on the network. Embodiments of the emulator and method use a three-layer multiple-endpoint model. A proxy layer is used to emulate multiple devices by building an endpoint pool containing a large number of endpoint pairs corresponding to the emulated devices. The presentation layer is used to specifically translate and parse the Web management protocol, and the logic layer represents the logic for a specific Web management protocol device being emulated. Embodiments of the emulator and method receive a request from a client on the network, use the proxy layer, presentation layer and logic layer to process the request and obtain a response, and then send the response back to the requesting client.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: May 21, 2013
    Assignee: Microsoft Corporation
    Inventors: XueYin Jiang, Jingcun Wang, Lei Zhao
  • Patent number: 8447583
    Abstract: A plurality of Guest cells of Guest instructions are provided with corresponding Host cells for emulating Guest instructions, each Guest instruction having a Guest cell corresponding to a Host cell. Each of the Host cells are initialized with an initialization routine for discovering a corresponding semantic routine for emulating the Guest instruction. When an instruction is to be emulated for the first time, the initialization routine patches itself with the discovered semantic routine such that subsequent emulation of the Guest instruction can be directly performed.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: May 21, 2013
    Assignee: International Business Machines Corporation
    Inventors: Theodore J. Bohizic, Reid T. Copeland, Marcel Mitran, Ali I. Sheikh
  • Patent number: 8448120
    Abstract: A method includes performing a place and route operation using an electronic design automation tool to generate a preliminary layout for a photomask to be used to form a circuit pattern of a semiconductor device. The place and route operation is constrained by a plurality of single patterning spacer technique (SPST) routing rules. Dummy conductive fill patterns are emulated within the EDA tool using an RC extraction tool to predict locations and sizes of dummy conductive fill patterns to be added to the preliminary layout of the photomask. An RC timing analysis of the circuit pattern is performed within the EDA tool, based on the preliminary layout and the emulated dummy conductive fill patterns.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: May 21, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-I Huang, Hsiao-Shu Chao, Yi-Kan Cheng
  • Patent number: 8448148
    Abstract: A method and system for testing a physical system including a number of input channels for receiving physical inputs, using load testing, comprising: intercepting at least a portion of the input channels; replacing at least a portion of the physical inputs of the intercepted input channels with one or more emulation programs, wherein the emulation programs include parameters which allow to control outputs of the one or more emulation programs to the intercepted input channels; configuring a functional test in a load testing software tool to drive execution of the one or more emulation programs; randomly generating outputs simulating the physical inputs, from the one or more emulation programs, by executing the load testing software tool; collecting data from the execution of the one or more emulation programs as the load testing software tool executes; and analyzing the collected data for presence or absence of deadlocks or race conditions.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: May 21, 2013
    Assignee: Parasoft Corporation
    Inventors: Adam K. Kolawa, Nathan M. Jakubiak, Mark L. Lambert, Wilhelm Haaker, Neel Gandhi
  • Patent number: 8433768
    Abstract: An information system includes a bulletin board-type interface that enables virtual messages propagating through the system, to interface with one another. The virtual messages are created by a virtual system embedded within the information system. The virtual messages may model any of various network services and predict traffic based on the network services. The virtual messages may represent an attack model on the network. Models of system resources are also created and the models interact by posting and/or retrieving information from the bulletin board-type interface. The interface provides for a negotiation process regarding the availability of future system resources and the impact upon the modeled network service.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: April 30, 2013
    Assignee: Lockheed Martin Corporation
    Inventors: Stephen Francis Bush, Amit Bhavanishankar Kulkarni
  • Patent number: 8433555
    Abstract: Emulation of a target system with a host system is disclosed. Two or more target system code instructions may be grouped into one or more fragments. A main translation function may be implemented by translating each fragment into a corresponding set of position-independent instructions executable by the host system. A target processor may be emulated by executing the corresponding set of position-independent executable instructions with the host system.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: April 30, 2013
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Stewart Sargaison
  • Patent number: 8428930
    Abstract: Dynamic creation of a spatially aware emulation environment comprising Host cells of Host pages corresponding to Guest cells of Guest pages of Guest instructions. Each Host cell comprises a semantic routine for emulating a corresponding Guest instruction located at the corresponding Guest cell of the guest page.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: April 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Theodore J. Bohizic, Reid T. Copeland, Marcel Mitran, Ali I. Sheikh
  • Patent number: 8428931
    Abstract: The present invention concerns a mainframe data stream proxy (MDSP) (1) for caching communication of at least one emulator (2) directed to at least one mainframe (3), wherein the MDSP (1) comprises: a. a runtime application server (10), adapted for receiving (101, 201) at least one emulator action from the at least one emulator (2) and for sending (105, 209) at least one corresponding mainframe action to the at least one emulator (2); b. wherein the runtime application server (10) is further adapted for retrieving (102, 103) the at least one corresponding mainframe action to be sent to the at least one emulator (2) from a cache (20) of the MDSP (1).
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: April 23, 2013
    Assignee: Software AG
    Inventor: Lior Yaffe
  • Patent number: 8428929
    Abstract: A method, apparatus, system, and computer program product for secure server system management. A payload containing system software and/or firmware updates is distributed in an on-demand, secure I/O operation. The I/O operation is performed via a secured communication channel inaccessible by the server operating system to an emulated USB drive. The secure communication channel can be established for the I/O operation only after authenticating the recipient of the payload, and the payload can be protected from access by a potentially-infected server operating system. Furthermore, the payload can be delivered on demand rather than relying on a BIOS update schedule, and the payload can be delivered at speeds of a write operation to a USB drive.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: April 23, 2013
    Assignee: Intel Corporation
    Inventors: Palsamy Sakthikumar, Michael A. Rothman, Vincent J. Zimmer, Robert C. Swanson, Mallik Bulusu
  • Publication number: 20130096906
    Abstract: In one or more embodiments, a system can emulate one or more physical mobile devices and can allow respective one or more users to utilize respective one or more emulations via a network. In one example, a first user, utilizing a first web browser, can interact with a first emulated mobile device. In another, a second user, utilizing a second web browser, can interact with a second emulated mobile device. In one or more embodiments, the first and second emulated mobile devices can respectively correspond to two different physical mobile devices, and the first and second users can concurrently interact with the first and second emulated mobile devices, respectively. In one or more embodiments, a user can upload a physical mobile device to an emulated mobile device, interact with the emulated device, and download changes made to the emulated mobile device to the physical mobile device.
    Type: Application
    Filed: March 23, 2012
    Publication date: April 18, 2013
    Applicant: INVODO, INC.
    Inventors: Arthur T. Niemeyer, Bruce A. Mayer, James D. Keeler, Mitchell D. Wilson, Dylan P. Spurgin, Matthew C. Brace
  • Patent number: 8424023
    Abstract: A method, system, and device embodiments for interfacing a program are disclosed. A computing device can include an application layer, an operating system layer, and an interface module. The operating system layer can include a first type of operating system and associated application program interfaces (APIs). The interface module can be coupled between the application layer and the operating system layer. The interface module can receive program instructions from a program in the application layer written for a second type of operating system and can process the instructions by directing the instructions to APIs that correctly execute the instructions.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: April 16, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James A. Lamb, Joseph G. Giebler, Jeffrey M. Cameron
  • Publication number: 20130090912
    Abstract: A method for controlling a server is provided. The method includes controlling a server which communicates with a device producing an application using an application production tool, and includes receiving an operation source which corresponds to an application produced by the device, performing emulation regarding the application using the received operation source, and transmitting the result of the emulation execution to an external device.
    Type: Application
    Filed: October 5, 2012
    Publication date: April 11, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: SAMSUNG ELECTRONICS CO., LTD.
  • Patent number: 8418099
    Abstract: Systems, methods, and other embodiments associated with performance counters are described. In one embodiment, a method includes generating a first register transfer level (RTL) description of an integrated circuit that includes a performance counter. The integrated circuit is emulated in hardware and statistical data is collected with the performance counter. The performance counter is then removed from the integrated circuit.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: April 9, 2013
    Assignee: Oracle International Corporation
    Inventor: Martin Karlsson
  • Publication number: 20130080143
    Abstract: Methods and devices for selectively presenting a user interface or “desktop” across two devices are provided. More particularly, a unified desktop is presented across a device and a computer system that comprise a unified system. The unified desktop acts as a single user interface that presents data and receives user interaction in a seamless environment that emulates a personal computing environment. To function within the personal computing environment, the unified desktop includes a process for docking and undocking the device with the computer system. The unified desktop presents a unified system where the device is the master.
    Type: Application
    Filed: August 3, 2012
    Publication date: March 28, 2013
    Inventors: Paul E. Reeves, Sanjiv Sirpal, Alexander de Paz, Martin Gimpl
  • Patent number: 8396465
    Abstract: System and method for remotely managing mobile devices. A virtual instance mobile device is maintained for each physical mobile device to be managed. Each virtual instance mobile device is executable in a computer runtime environment and includes a hardware emulation component configured to emulate the hardware components of the corresponding physical mobile device and a software emulation component corresponding to the software components of the physical mobile device, which is executable within the context of the hardware emulation component. Synchronization between the virtual instance mobile devices and their corresponding physical mobile devices is maintained, and data obtained from the physical mobile devices is stored. The physical mobile devices are remotely managed by utilizing their corresponding virtual instance mobile devices respectively.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: March 12, 2013
    Assignee: Mobile Iron, Inc.
    Inventors: Timothy E. Danford, Suresh K. Batchu
  • Publication number: 20130060558
    Abstract: Updates to components of an interface may be carried out from a program executed in an emulated environment. For example, an interface that provides communications for the program in the emulated environment to the host operating system may be updated from the program in the emulated environment. Centralizing updates through the program improves the likelihood that components, such as the interface, have compatible versions with the program executing in the emulated environment. Thus, as the program is updated other components are updated by the program.
    Type: Application
    Filed: September 7, 2011
    Publication date: March 7, 2013
    Inventors: Jason Schultz, Robert Bergerson, James Heit, John Peters
  • Patent number: 8392170
    Abstract: An emulation system and emulation method for a no longer available microcontroller, having a supplyable microcontroller and emulation software able to be run thereon, and having an interpreter, the emulation software forming a software layer between the hardware of the available microcontroller and an operating software of the no longer available microcontroller, and the software being adapted in such a way that the hardware of the available microcontroller in conjunction with the additional emulation software behaves like the hardware of the no longer available microcontroller, and the interpreter is adapted in order to represent address, code and data information of the operating software of the no longer available microcontroller to functionally equivalent address, code and data information of the available microcontroller.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: March 5, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Matthias Knauss, Udo Schulz, Heinrich Barth