Emulation Patents (Class 703/23)
  • Patent number: 9171111
    Abstract: A processor-based hardware functional verification system with time shift registers is described. The system includes a processor cluster with a plurality of processors that each have a data inputs and select inputs. Furthermore, a plurality of electronic memories each having a plurality of read ports is associated with the processors, respectively. The time shift registers each have an input in communication with the read ports of the electronic memories and an output in communication with the select inputs of the processors. The system further includes an instruction memory that provides a control signal to each of the time shift registers to store data output from read ports of the electronic memories that can be provided to the processor for evaluation during a subsequent emulation step.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: October 27, 2015
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Beshara Elmufdi, Mitchell G. Poplack, Viktor Salitrennik
  • Patent number: 9147351
    Abstract: The invention relates to a simulation device (110) concerning a ground vehicle comprising a vehicle model (115) comprising a predetermined number of function models (130b; 131b; 132b) for simulation of corresponding physical function elements (130a; 131a; 132a) of said vehicle. Said function models (130a; 131b; 132b) are based on vehicle characteristics determined in connection to development and manufacturing of said vehicle and hereby on real characteristics of the physical vehicle. The invention also relates to a computer program and a computer program product comprising a program code (P) for a computer (110; 300).
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: September 29, 2015
    Assignee: BAE Systems Hägglunds Aktiebolag
    Inventor: Per-Åke Nordlander
  • Patent number: 9143492
    Abstract: Systems and methods for a secure soft token solution applicable to multiple platforms and usage scenarios are provided. According to one embodiment a method is provided for soft token management. A mobile device of a user of a secure network resource receives and installs a soft token application. A unique device ID of the mobile device is programmatically obtained by the soft token application. A seed for generating a soft token for accessing the secure network resource is requested by the soft token application. Responsive to receipt of the seed by the soft token application, the soft token is generated based on the seed and the soft token is bound to the mobile device by encrypting the seed with the unique device ID and a hardcoded pre-shared key.
    Type: Grant
    Filed: March 16, 2014
    Date of Patent: September 22, 2015
    Assignee: Fortinet, Inc.
    Inventors: David A. Redberg, Jun Li
  • Patent number: 9135031
    Abstract: Described herein are systems and methods for determining relationships of storage resources allocated for use to a virtual machine (VM) in a virtual server environment. In some embodiments, a VM storage resource module residing and executing on a server may be configured to determine one or more storage resources (residing on one or more storage systems) of one or more VMs. In these embodiments, the VM storage resource module may determine storage resource information describing the storage resources used by a VM. The storage resource information may then be used to locate and access the storage resources residing on the one or more storage systems for various monitoring, maintenance, or optimizing purposes.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: September 15, 2015
    Assignee: NetApp, Inc.
    Inventor: Clinton D. Knight
  • Patent number: 9135207
    Abstract: An inter-integrated circuit (I2C) communication device, includes an I2C command transmission unit that transmits an expanded command to an optical module with which the I2C command transmission unit communicates together with software data, the expanded command including a command for transmitting the software data to the optical module and a command for collecting alarm monitor information from the optical module for monitoring the occurrence of an abnormality in the optical module, and an I2C command processing unit that, when the expanded command transmitted from the I2C command transmission unit is received, stores the software data transmitted together with the expanded command in a storage unit of the optical module, reads out the alarm monitor information stored in the storage unit, and transmits the read alarm monitor information to the I2C command transmission unit.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: September 15, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Haruka Miyazaki, Yuichiro Sakane
  • Patent number: 9131449
    Abstract: A device may receive, from a browser, a message requesting that a first signal from a first base station of a first wireless network be attenuated in accordance with a first attenuation value. The device may set an attenuation level of the first wireless signal in accordance with the first attenuation value in response to the message. The first signal attenuated by the first attenuation value is wirelessly transmitted to a first user device at a first area shielded from signals wirelessly transmitted to a second user device at a second location.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: September 8, 2015
    Assignee: Cellco Partnership
    Inventors: Gagan Puranik, Edward Michael Jack, Zhou Zheng
  • Patent number: 9116998
    Abstract: One embodiment of a guest browser system, among others, includes a guest browser interface configured to provide an address bar interface for accepting a network address for retrieving a first web page. The guest browser interface is rendered from code of a second web page, where content of the second web page is rendered by an installed web browser. The system further includes a guest browser engine configured to retrieve contents of web pages. The guest browser engine is built from code provided by the second web page and is used to update content of the second web page with content from the first web page. Other systems and methods are also provided.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: August 25, 2015
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Barrett Kreiner, Amy Zwarico
  • Patent number: 9104964
    Abstract: A method is provided for estimating past data by identifying a high frequency data set for a defined time period. A pattern is calculated for the high frequency data set and then the pattern is applied to a low frequency data set in a past time period to estimate a high frequency query point.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: August 11, 2015
    Assignee: Amazon Technologies, Inc.
    Inventors: Muhammad Ali Siddiqui, Charles Graham Haver Crissman, Sanjeev Kewal Verma, Mark Christopher Veronda
  • Patent number: 9104508
    Abstract: A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: August 11, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark S. Farrell, Charles W. Gainey, Jr., Jeffrey P. Kubala, James H. Mulder, Bernard Pierce, Robert R. Rogers, Donald W. Schmidt
  • Patent number: 9104509
    Abstract: A program (e.g., an operating system) is provided a warning that it has a grace period in which to perform a function, such as cleanup (e.g., complete, stop and/or move a dispatchable unit). The program is being warned, in one example, that it is losing access to its shared resources. For instance, in a virtual environment, a guest program is warned that it is about to lose its central processing unit resources, and therefore, it is to perform a function, such as cleanup.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: August 11, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark S. Farrell, Charles W. Gainey, Jr., Jeffrey P. Kubala, James H. Mulder, Bernard Pierce, Robert R. Rogers, Donald W. Schmidt
  • Patent number: 9100811
    Abstract: A system for facilitating communication in an adaptive virtual environment is disclosed. For example, the system creates a virtual image of a communication device running services rendered by one or more telecom service providers, wherein the communication device belongs to a user. The system emulates hardware and software configuration of the communication device in the virtual image, wherein the virtual image is stored in the memory. The system synchronizes the memory, storing the hardware and software configuration in the virtual image, with a device memory of a user device at pre-determined intervals of time. The system further remotely installs the hardware and software configuration in the user device upon executing the virtual image thereby creating a virtual environment in the user device. The system further generates a unique number for the user. The system further facilitates communication using the one or more telecom service providers based upon the unique number.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: August 4, 2015
    Assignee: TATA CONSULTANCY SERVICES LIMITED
    Inventors: Priyanka Chandel, Pankaj Doke, Sylvan Lobo, Kushal Gore, Ramiz Raza, Sujit Devkar, Praveen Sunka, Sanjay Kimbahune
  • Patent number: 9092372
    Abstract: A memory access authority control method and a memory management system utilizing the method. By partitioning and designating permissible memory access intervals to different service programs in one system, it is ensured that each service program cannot access other service programs' confidential data. Thus, the security of confidential data is guaranteed.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: July 28, 2015
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chien-Hsing Huang, Ko-Fang Wang
  • Patent number: 9092627
    Abstract: An apparatus and method of providing security information in a virtual environment that supports a plurality of operating systems. The plurality of operating systems include at least one secure operating system in which applications whose safety has been verified are installed, and at least one normal operating system in which applications whose safety has been not verified are freely installed. The server operating system may provide security information corresponding to an operating system in which an application executed as foreground is installed, to provide information indicating whether an application is operated in a secure operating system, to a user.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: July 28, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-min Lee, Sang-bum Suh, Sang-dok Mo, Bok-deuk Jeong
  • Patent number: 9084292
    Abstract: The invention relates to a communications system (10, 110) for an aircraft comprising a transceiver (22) having at least one transmitter (24), at least one receiver (26, 28) and at least one antenna, at least one data processing device (12) connected to the transceiver (22) by means of a data transfer device (20) and having at least one operating device (14), connected to the at least one data processing device (12), having manually activated switches, buttons and/or rotary knobs (18) for entering data into the at least one data processing device (12). According to the invention, the at least one operating device (14) is mechanically connected to the at least one data processing device (12) to form an assembly (16).
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: July 14, 2015
    Assignee: Becker Avionics GmbH
    Inventors: Otto Bommer, Udo Findeisen
  • Patent number: 9075994
    Abstract: An attestation technique is provided for processing attestation data associated with a plurality of data processing systems. A first data processing system is operable for receiving a request for attestation from a requester. In response to receiving the request, the first data processing system is further operable for retrieving a list of one or more children, wherein the one or more children include the second data processing system; retrieving and storing attestation data associated with each of the one or more children; retrieving and storing attestation data associated with the first data processing system; and sending to the requester a concatenated response containing the attestation data associated with the first data processing system and the child attestation data associated with the one or more children.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: July 7, 2015
    Assignee: International Business Machines Corporation
    Inventors: David Haikney, David N. Mackintosh, Jose J. P. Perez
  • Patent number: 9054964
    Abstract: A network load balancing method in a blade grouping chassis can be provided. The method can include detecting system conditions among blades coupled to a single blade grouping chassis. The method also can include maintaining a rotation of selected ones of the blades among which individual blades are selected for use in network load balancing inbound workloads. Finally, the method can include removing an individual blade from the rotation responsive to detecting a system condition in the individual blade indicative of an inability of the individual blade to support high availability in network load balancing. As such, the method further can include re-adding the individual blade to the rotation responsive to detecting a system condition in the individual blade indicative of an ability of the individual blade to support high availability in network load balancing.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: June 9, 2015
    Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
    Inventors: David B. Rhoades, Tomasz F. Wilk
  • Patent number: 9052361
    Abstract: A scan test architecture facilitates low power testing of semiconductor circuits by selectively dividing the serial scan paths into shorter sections. Multiplexers between the sections control connecting the sections into longer or shorted paths. Select and enable signals control the operation of the scan path sections. The output of each scan path passes through a multiplexer to compare circuits on the semiconductor substrate. The compare circuits also receive expected data and mask data. The compare circuits provide a fail flag output from the semiconductor substrate.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: June 9, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Lee D. Whetsel
  • Patent number: 9046941
    Abstract: Method and system for processing information at a network device connected to a network is provided. The method includes receiving information conforming to a first protocol at a first clock rate at a first sub-port; receiving information conforming to a second protocol at a second clock rate at a second sub-port; storing received information in a temporary storage device at the base-port; reading information out of the temporary storage device at a third clock rate; and processing the information at a MAC module that includes logic that is time-shared among the plurality of sub-ports to process information at the third rate for both the first protocol and the second protocol. The first sub-port is granted access to the logic in a first phase and the second sub-port is granted access to the logic in a second phase for processing the information.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: June 2, 2015
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Ernest G. Kohlwey, Lloyd O. Mielke
  • Patent number: 9043194
    Abstract: A method (and system) of emulation in a multiprocessor system, includes performing an emulation in which a host multiprocessing system of the multiprocessor system supports a weak consistency model, and the target multiprocessing system of the multiprocessor system supports a strong consistency model.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: May 26, 2015
    Assignee: International Business Machines Corporation
    Inventors: Ravi Nair, John Kevin O'Brien, Kathryn Mary O'Brien, Peter Howland Oden, Daniel Arthur Prener
  • Patent number: 9032397
    Abstract: A data processing system facilitates virtual machine migration with direct physical access control. The illustrative data processing system comprises a software-programmable trap control associated with hardware registers of a computer that selectively vectors execution control of a virtual machine (VM) between a host and a guest. The data processing system further comprises a logic which is configured for execution on the computer that programs the trap control to enable the virtual machine to directly access the hardware registers when the virtual machine is not migrated and to revoke direct access of the hardware registers in preparation for virtual machine migration.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: May 12, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Troy Miller, Mark A. Criss, Jerry James Harrow, Jr., Thomas Turicchi, Michael Wisner
  • Patent number: 9026423
    Abstract: An emulator is disclosed that allows for diagnoses of failures or defects within the emulator. A map of faulty resources is generated to identify which resources should be avoided during compilation. Thus, in a transparent and automated manner, defects found during diagnostics are stored in a database of unusable emulator resources. A compiler has access to the database and compiles the design taking into account unusable resources. In another embodiment, the defects of an emulator board are stored on the emulator board itself. This allows each board to store its own maintenance information that can be used at the manufacturing site for changing defective chips. Defects stored on the board itself allow the defects to be obtained independent of a position of a board within the emulator to simplify identification of the faulty resource.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: May 5, 2015
    Assignee: Mentor Graphics Corporation
    Inventors: Eric Durand, Estelle Reymond, John Fadel
  • Patent number: 9020801
    Abstract: According to a disclosed embodiment of the invention, an improved cluster-based collection of computers (nodes) is realized using conventional computer hardware. Software is provided that enables at least one virtual machine to be presented to guest operating systems, wherein each node participating with the virtual machine has its own emulator or virtual machine monitor. VM memory coherency and I/O coherency are provided by hooks, which result in the manipulation of internal processor structures. A private network provides communication among the nodes.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: April 28, 2015
    Assignee: Scalemp Inc.
    Inventors: Shai Fultheim, Herb Zlotogorski, Yaniv Romem
  • Patent number: 9015026
    Abstract: A system and method for verifying logic circuit designs having arithmetic operations and complex logical operations such that the operations may be evaluated at substantially full hardware speed is disclosed. According to one embodiment, a system for verifying the functionalities of an electronic circuit design comprises hardware emulation resources emulating at least a portion of an electronic circuit design; and a first hardware ALU block having an arithmetic logic unit that performs an arithmetic operation or a complex logical operation of the electronic circuit design, and a set of flag registers that contains a conditional value for enabling the arithmetic logic unit.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: April 21, 2015
    Assignee: Cadence Design Systems, Inc.
    Inventor: Mitchell Poplack
  • Patent number: 8997034
    Abstract: Techniques for emulation-based functional qualification are disclosed that use an emulation platform to replace simulation in mutation-based analysis. A method for functional qualification of an integrated circuit design includes receiving an integrated circuit design having one or more mutations. Emulation setup and activation simulation are performed in parallel to maximize computing resources. A prototype board can then be programed according to the integrated circuit design and a verification module. A set of test patterns and response generated by a simulation of the integrated circuit using the set of test patterns are stored in a memory of the prototyping board allowing enumeration of mutants to occur at in-circuit emulation speed.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: March 31, 2015
    Assignee: Synopsys, Inc.
    Inventors: Ying-Tsai Chang, Yu-Chin Hsu
  • Patent number: 8995288
    Abstract: A deployed configurable communication integrated circuit (IC) and/or chipset which may be integrated within a wireless communication and/or multi-media communication device may be operable to monitor its operating conditions, performance and/or utilization characteristics. It may send information via a wireless, optical and/or wired network to a remote analysis and/or development system and/or service, such as an engineering service, that may determine and return configuration parameters. The configuration parameters may be utilized to adjust antenna and/or MIMO, SIMO, MISO and beamforming configuration, power level, interference rejection, equalizer length, dynamic range, modulation, encoding and/or decoding, analog to digital conversion precision, error detection and/or correction parameters, MAC parameters such as timing thresholds, transmit window size and/or buffer space.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: March 31, 2015
    Assignee: Broadcom Corporation
    Inventor: Jeyhan Karaoguz
  • Patent number: 8965749
    Abstract: A method, apparatus, system, and computer program product for secure server system management. A payload containing system software and/or firmware updates is distributed in an on-demand, secure I/O operation. The I/O operation is performed via a secured communication channel inaccessible by the server operating system to an emulated USB drive. The secure communication channel can be established for the I/O operation only after authenticating the recipient of the payload, and the payload can be protected from access by a potentially-infected server operating system. Furthermore, the payload can be delivered on demand rather than relying on a BIOS update schedule, and the payload can be delivered at speeds of a write operation to a USB drive.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: February 24, 2015
    Assignee: Intel Corporation
    Inventors: Palsamy Sakthikumar, Michael A. Rothman, Vincent J. Zimmer, Robert C. Swanson, Mallik Bulusu
  • Patent number: 8966477
    Abstract: A system comprises a guest graphics subsystem with a combined virtual graphics device that combines underlying emulated virtual graphics device and virtual function of a physical graphics device to support virtual machine migration. The VMM in the system may expose to the guest a single combined virtual PCIe graphics device that combines access to the virtual graphics device and the virtual function, and switches between the virtual graphics device and the virtual function for graphics acceleration without triggering a PnP event in the guest OS. In response to the switch, the guest graphics stack and applications may redraw their windows to provide a consistent user experience.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: February 24, 2015
    Assignee: Intel Corporation
    Inventors: Shanwei Cen, Raman Srinivasan, David J. Cowperthwaite
  • Patent number: 8958414
    Abstract: A modular system uses point-to-point communication between field-programmable gate arrays (FPGAs) on a control module and each port module, respectively, to manage basic module functions, such as power, environmental monitoring, and health checks on the modules and their components. This allows a chassis to be managed without fully powering each card first, frees processors on the modules from having to perform health checks, allows dedicated resources to rapidly monitor the health of each card, and prevents one bad card from disabling management of all cards.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: February 17, 2015
    Assignee: Force10 Networks, Inc.
    Inventor: David K. Wong
  • Publication number: 20150046144
    Abstract: Aspects of the invention relate to techniques for dynamic control of design clock generation in emulation. A circuit design for verification is analyzed to determine one or more clock-enabling functions for a specific clock signal. Logic for generating a clock status signal based on the one or more clock-enabling signals is then determined. The clock status signal is employed to control clock generation in an emulation system for emulating the circuit design.
    Type: Application
    Filed: September 30, 2013
    Publication date: February 12, 2015
    Applicant: Mentor Graphics Corporation
    Inventors: Krishnamurthy Suresh, Satish Kumar Agarwal, Amit Jain, Sanjay Gupta
  • Patent number: 8947954
    Abstract: A Random Access Memory (RAM) and method of using the same are disclosed. The RAM includes a plurality of memory cells arranged in columns and in rows with each memory cell coupled to at least one word line and at least one bit line. The RAM includes a plurality of switches with at least one of the switches coupled between two of the memory cells to allow data to be copied from one of the two memory cells to the other of the two memory cells. In another aspect, the two memory cells can be considered a dual bit cell that contains a copying mechanism. There are two interleaved memory planes, assembled from bit cells that contain two bits of information. One bit is the primary bit that corresponds to the normal RAM bit. The second bit is able to receive a copy and hold the primary value. When the copying mechanism is over, the two memory planes may act as two completely independent structures.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: February 3, 2015
    Assignee: Mentor Graphics Corporation
    Inventor: Peer Schmitt
  • Patent number: 8949105
    Abstract: A disclosed interface between an emulator and a network that is readily scalable. In one aspect, a scalable solution is achieved through a hardware interface board positioned between the network and the emulator to allow proper transfer there between. A computer is separated from and coupled to the hardware interface board and provides the necessary control signals. Because it is done in hardware separated from the computer, the interface board is readily scalable through the simple addition of network chip sets. In another aspect, the interface board can be placed in two modes of operation, a live test mode and a direct test mode. In yet another aspect, packet formats may be changed on the interface board so that it appears to the emulator as if the network is operating at a different data transfer speed than is actually the case.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: February 3, 2015
    Assignee: Mentor Graphics Corporation
    Inventors: William Eugene Jacobus, Robert John Bloor
  • Patent number: 8949752
    Abstract: An emulation system integrates multiple custom prototyping boards for emulating a circuit design. A first custom prototyping board including at least one FPGA and an interface connected to a first set of wires coupling to the at least one FPGA. A second custom prototyping board includes at least one second FPGA and an interface connected to a second set of wires coupling to the at least second FPGA. An adaptor board connects to the first custom prototyping board and the second custom prototyping board through the first interface and the second interface. The adapter board controls emulation of the circuit design and controls communication through the partitioned circuit using at least one of the first set of wires and at least one the second set of wires.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: February 3, 2015
    Assignee: Synopsys, Inc.
    Inventors: Ming-Yang Wang, Sweyyan Shei
  • Publication number: 20150032438
    Abstract: A method may include and/or involve collecting readings from a number of mote sensors of a mote network, the mote sensors at a number of mote sensor locations, and emulating, as a source or sources of the readings, a number of sensors at a number of sensor locations.
    Type: Application
    Filed: June 3, 2014
    Publication date: January 29, 2015
    Inventors: Alexander J. Cohen, Edward K.Y. Jung, Royce A. Levien, Robert W. Lord, Mark A. Malamud, John D. Rinaldo, JR.
  • Patent number: 8934887
    Abstract: Systems and methods comprise a network in which a mobile device is configured as an input/output interface for a user such that actual processing, storage and network interfaces are performed or provided by a remote server.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: January 13, 2015
    Assignee: Emblaze Ltd.
    Inventors: Moshe Dgani, Moshe Levy, Zvi Shmilovici
  • Patent number: 8909510
    Abstract: Apparatus for emulating the operation of an LFSR having at least one of one or more inputs and one or more outputs, wherein the state of the LFSR can be described by a state vector having sections describing the input or inputs, if any, of the LFSR, the contents of the LFSR and the output or outputs, if any, of the LFSR, wherein the state vector can be multiplied by a time shift matrix to time shift the state specified by the vector and wherein the apparatus comprises means for multiplying a first instance of the state vector by the matrix to produce a second instance of the state vector that is time shifted relative to the first instance and wherein one or both of the input and output sections of the state vector are dimensioned to accommodate, respectively, inputs that arrive at different times during the time shift specified by the matrix and outputs that are produced at different times during the time shift.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: December 9, 2014
    Assignee: MStar Semiconductor, Inc.
    Inventor: Daniel Edward Alt
  • Patent number: 8903706
    Abstract: The invention is system for emulating a target application comprises a computer, and a capsular including a microcontroller, a programmable non-volatile memory, a numeric display, a transceiver for transmitting and receiving data, a real time clock and at least one input device interacting with a program run on the microcontroller. The capsular is couplable to the computer and adapted to fit in a housing. The input device is operable both when the capsular is inside the housing and when the capsular is outside the housing.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: December 2, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Frank Forster, Markus Pfeiffer
  • Patent number: 8898051
    Abstract: A system and method for selectively capturing and storing emulation data results from a hardware emulation system, which reduces the data bandwidth requirement and the unnecessary consumption of the DRAM memory capacity by uninteresting data. According to one embodiment, a system comprises a trace array for storing one or more frames of data; a first set of hardware control bits that enables the trace array to selectively capture non-continuous windows of data within a frame of data; a data capture card; and a second set of hardware control bits that enables the data capture card to capture a select frame of data from the one or more frames of data stored on the trace array.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: November 25, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Arthur Perry Sarkisian, Jingbo Gao, Tsair-Chin Lin
  • Publication number: 20140343918
    Abstract: Present embodiments include an automation control system including one or more processors and memories with an application stored on the one or more memories and implemented by the one or more processors. The application includes an interface configured to communicate with automation devices via a communication subsystem. Further, the application includes an operation environment, a programming environment, and an emulation environment. The programming environment is configured to generate device elements corresponding to the automation devices within the operation environment in which the device elements are configured to functionally interact with the automation devices. The emulation environment is configured to automatically host an emulation model of the automation devices based on the device elements generated within the operation environment.
    Type: Application
    Filed: May 14, 2013
    Publication date: November 20, 2014
    Applicant: ROCKWELL AUTOMATION TECHNOLOGIES, INC.
    Inventors: Richard Grgic, Charles Rischar, Kenwood Hall, Francisco Maturana
  • Patent number: 8893027
    Abstract: In an example embodiment, a device provides a connection to an endpoint coupled with a first network to a virtual desktop client coupled with a second network. The device obtains data from the virtual desktop client which client which includes at least one link to data available from an external server, such as streaming media. The device obtains the data from the external server and provides the data with data obtained from the virtual desktop client to the endpoint.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: November 18, 2014
    Assignee: Cisco Technology, Inc.
    Inventors: Stephan Edward Friedl, Thomas Martin Wesselman, Steven Chervets
  • Patent number: 8886513
    Abstract: A bus emulation device in accordance with one aspect of the present description includes an embedded microcontroller and a nonvolatile memory carried on a body. The memory contains firmware which includes boot code adapted to boot the microcontroller to operate in one of a plurality of dedicated operating modes in response to a mode switch. These dedicated operating modes include a learning mode in which bus signals generated by other bus devices are recorded in the nonvolatile memory, and an emulation mode in which recorded bus signals are retransmitted over the bus in response to received signals, to emulate a bus device. Other aspects are described and claimed.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: November 11, 2014
    Assignee: Intel Corporation
    Inventors: Zailani Bin Mohd Nordin, Eng Tien Ee
  • Patent number: 8874425
    Abstract: A system, method, computer program product, and carrier are described for obtaining data from a first emulator and from a first emulation environment hosting software; and signaling a decision whether to transfer any of the data to a second emulator at least partly as a result of the first emulation environment hosting the software.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: October 28, 2014
    Assignee: The Invention Science Fund I, LLC
    Inventors: Alexander J. Cohen, Edward K. Y. Jung, Royce A. Levien, Robert W. Lord, Mark A. Malamud, John D. Rinaldo, Jr., Lowell L. Wood, Jr.
  • Publication number: 20140297249
    Abstract: A method and system for managing an emulation of a computer product. The method and system involve receiving emulation parameters associated with the emulation of the computer product, the emulation parameters defining one or more resources required to provide the emulation; identifying one or more capable emulator servers from a plurality of emulator servers based at least on the one or more resources; retrieving emulator server data for each capable emulator server; determining one or more criteria usable for selecting an emulator server from the one or more capable emulator servers to provide the emulation; and selecting the emulator server from the one or more capable emulator servers to provide the emulation, the emulator server being a capable emulator server from the one or more capable emulators associated with emulator server data satisfying at least some of the one or more criteria.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 2, 2014
    Applicant: Sphere 3D Inc.
    Inventors: Giovanni Morelli, JR., Brandon Cowen, Marian Dan, Hussain Damji
  • Patent number: 8843358
    Abstract: Systems and methods are operable to concurrently present images on a small display of a mobile media device and a large display of a media presentation system. An exemplary method receives emulated information from a mobile media device, wherein the emulated information corresponds to at least one image that is being currently presented on a display of the mobile media device; generates at least one image based upon the received emulated information, wherein the at least one image is configured for presentation on a display of a media system; and communicates the at least one image to a display of the media system. The image presented on the display of the media system is substantially the same image presented on the display of the mobile media device. The image presented on the display of the media system is substantially larger than the image presented on the display of the mobile media device.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: September 23, 2014
    Assignee: EchoStar Technologies L.L.C.
    Inventor: Nicholas Newell
  • Patent number: 8843357
    Abstract: An electrical connection defect simulation test method is provided. The electrical connection state simulation test method includes the steps as follows. A device under test is provided, wherein the device under test includes a plurality of pin groups each having a plurality of signal pins. A zero-frequency signal is transmitted from a signal-feeding device to each of the signal pins to simulate an open condition. An open test is performed on each of the signal pins. The signal pins of the device under test are connected to a relay matrix. The relay matrix is controlled to make any two of the signal pins in one of the pin groups electrically connected to simulate a short condition. A short test is performed on any two of the electrically connected signal pins. An electrical connection state simulation test system is disclosed herein as well.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: September 23, 2014
    Assignee: TEST Research, Inc.
    Inventors: Su-Wei Tsai, Ming-Hsien Liu
  • Publication number: 20140278340
    Abstract: Present invention embodiments enable the handling of various index-memory architectures for a virtual supercomputer that would allow for a heterogeneous storage of variable length index words with non-sequential addressing, and also dynamic changes to the index-memory architecture. A computer-implemented system, method, and apparatus allow for different types of node index memory (NIM) architectures for the virtual supercomputer. The first type allows for homogenous NIM segments, and implementing sequential node-number addressing. A second type of architecture allows for heterogeneous IW configurations (variable length and field structure), but sill uses sequential node-number addressing. A third type allows for non-sequential node-number addressing, but still uses homogeneous IW configurations. To implement this, a new virtual hardware element is required, an Index-Word Address Table.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Applicant: Veriscape, Inc.
    Inventors: Gary C. Berkowitz, Charles Wurtz (Deceased)
  • Patent number: 8838819
    Abstract: A method for synchronizing different components of a computer network system using meta-commands embedded in normal network packets. The data communication channel between different components of a computer network system can be used to transport meta-commands piggybacked in normal network packets, without modifying or compromising the validity of the protocol message. Embodiments of the method can be used for embedding test synchronization and control commands into the network packets sent through a device or system under test. The device or system under test can be an edge device, with the data communication channel carrying normal packets containing meta-commands embedded in the packets to synchronize the test control of the test clients and the test servers connected to the edge device.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: September 16, 2014
    Assignee: Empirix Inc.
    Inventors: Sergey Eidelman, Anne-Marie Turgeon, Tibor Ivanyi, David Hsing-Wang Wong, Anuj Nath
  • Patent number: 8812287
    Abstract: A method and device for preserving the wired-OR nature of the clock signal connection between two devices without a direct analog connection between the lines and in an infinitely scalable fashion. The method includes detecting a logic state at a first connector and a second connector and driving an appropriate connector of the device to an active state in response to determining that a connector is driving an active state. The device includes first and second connectors for communicating logic states and driving active states in response to detected logic states.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: August 19, 2014
    Assignee: International Business Machines Corporation
    Inventor: Daniel J Barus
  • Patent number: 8812286
    Abstract: A method for modeling power management in an integrated circuit (IC) includes: specifying a circuit design and a power architecture for the IC, the power architecture including a plurality of power domains for specifying power levels in different portions of the IC; determining an emulation module for the IC by including one or more hardware elements for modeling the power architecture in the emulation module; and using the emulation module to simulate changing power levels in one or more power domains of the IC including a power shutoff in at least one power domain.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: August 19, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Tsair-Chin Lin, Bing Zhu, Platon Beletsky
  • Patent number: 8811970
    Abstract: System and method for remotely managing mobile devices. A virtual instance mobile device is maintained for each physical mobile device to be managed. Each virtual instance mobile device is executable in a computer runtime environment and includes a hardware emulation component configured to emulate the hardware components of the corresponding physical mobile device and a software emulation component corresponding to the software components of the physical mobile device, which is executable within the context of the hardware emulation component. Synchronization between the virtual instance mobile devices and their corresponding physical mobile devices is maintained, and data obtained from the physical mobile devices is stored. The physical mobile devices are remotely managed by utilizing their corresponding virtual instance mobile devices respectively.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: August 19, 2014
    Assignee: Mobile Iron, Inc.
    Inventors: Timothy E. Danford, Suresh Kumar Batchu
  • Publication number: 20140222410
    Abstract: One embodiment pre-builds translations of kernel functions (KFs) and loads them into a translation pool and corresponding indexed table. The KFs are thus quickly loaded and do not necessarily await trapping and emulation via a LIB emulator. This results in faster access to KFs. Other embodiments provide hybrid emulation where some application functions (e.g., those that need quick performance) are translated from a source ISA library while other applications functions are processed via emulation to a target ISA library. Doing so provides faster access to certain functions. Other embodiments are described herein.
    Type: Application
    Filed: March 22, 2012
    Publication date: August 7, 2014
    Inventors: Xiao Dong Lin, Yihua Jin, Yong Wu, Jianhui Li, Ling Lin, Xingdong Shi