Abstract: In various embodiments, a storage device includes a magnetic media, a cache memory, and a drive controller. In embodiments, the drive controller is configured to establish a portion of the cache memory as an archival zone having a cache policy to maximize write hits. The drive controller is further configured to pre-erase the archival zone, direct writes from a host to the archival zone, and flush writes from the archival zone to the magnetic media. In embodiments, the drive controller is configured to establish a portion of the cache memory as a retrieval zone having a cache policy to maximize read hits. The drive controller is further configured to pre-fetch data from the magnetic media to the retrieval zone, transfer data from the retrieval zone to a host upon request by the host, and transfer read ahead data to the retrieval zone to replace data transferred to the host.

Abstract: An apparatus including a memory having an array of blocks addressable using address bits; and a permutation circuit coupled to the memory and configured to permutate the address bits such that during a memory access blocks of data are rearranged virtually.

Abstract: A memory system has a storage unit having two or more parallel read/write processing elements and non-volatile data recording areas for a logical block divided into a plurality of logical pages, and a control unit that generates log information for each unit of data written into the recording areas, determines for each logical page a log information recording area from a group of recording areas of the logical page, and controls the parallel operation elements to write the log information generated for a logical page into the log information recording area of the logical page and the data of the logical page into the other recording areas of the group of recording areas of the logical page.

Abstract: A method of caching data is performed by a respective computer having one or more processors storing one or more storage management programs for execution by the one or more processors, non-volatile secondary storage and non-volatile cache memory. The method includes receiving from the non-volatile cache memory information identifying an amount of available storage in the non-volatile cache memory, and identifying a size of the management units in the non-volatile cache memory. The method further includes identifying write requests to write data to the non-volatile cache memory, sequentially writing to the non-volatile cache memory the write data for the identified write requests, to sequentially arranged locations in an address space of the non-volatile cache memory, and storing in memory metadata that maps the addresses or storage offsets of the write data to respective locations in the address space of the non-volatile cache memory.

Abstract: A computer system mechanism is provided that restricts execution of binaries, such as applications, kernel modules, shared libraries, on the computing system to only those that have been installed by an approved mechanism. The approved mechanism acts as a single entry point on the computing for installing new binaries. Any change in file content or metadata taints an executable file and prevents execution by the kernel. Files copied over and not installed via, the approved mechanism will not be executed.

Abstract: There is provided a storage system capable to maintain a snapshot family comprising a plurality of members having hierarchical relations therebetween, and a method of operating thereof.

Abstract: A technique for managing replication of VSPs (Virtualized Storage Processors) proceeds on a per-VSP basis by (i) identifying the data objects associated with a VSP, (ii) establishing a common set of replication settings across all of the data objects associated with the VSP, and (iii) replicating the VSP by replicating each of the identified data objects associated with the VSP in accordance with the common set of replication settings established across all of the data objects associated with the VSP. The technique avoids the need for administrators to separately configure and manage replication on large numbers of individual data objects and thus reduces administrative burdens.

Abstract: A data processing node has an inter-node messaging module including a plurality of sets of registers each defining an instance of a GET/PUT context and a plurality of data processing cores each coupled to the inter-node messaging module. Each one of the data processing cores includes a mapping function for mapping each one of a plurality of user level processes to a different one of the sets of registers and thereby to a respective GET/PUT context instance. Mapping each one of the user level processes to the different one of the sets of registers enables a particular one of the user level processes to utilize the respective GET/PUT context instance thereof for performing a GET/PUT action to a ring buffer of a different data processing node coupled to the data processing node through a fabric without involvement of an operating system of any one of the data processing cores.

Abstract: A method includes receiving, at a logical partition, a series of messages. Each message in the series of messages includes a respective block of data. The method further includes, in response to receiving the first message of the series of messages, suspending further processing of the series of messages. The method also includes identifying, from a header of the first message, a respective buffer address for each block of data. The method still further includes resuming processing of the series of messages. The method additionally includes, for each respective block of data, storing the respective block of data at the respective buffer address, and transferring the respective block of data from the corresponding buffer address to an open storage disk.

Abstract: A maintenance free storage container includes a container housing, storage servers, and a container controller. The container controller includes a processing module that is operable to maintain virtual storage server to physical storage server mapping information and to maintain storage server failure information. The processing module is further operable to dispersed storage error encode the virtual storage server to physical storage server mapping information to produce encoded mapping slices. The processing module is further operable to send the encoded mapping slices for dispersed storage outside of the maintenance free storage container. The processing module is further operable to dispersed storage error encode the storage server failure information to produce encoded failure data slices. The processing module is further operable to send the encoded failure data slices for dispersed storage outside of the maintenance free storage container.

Abstract: A solid state drive having at least one NAND flash memory component organized in blocks, pages and cells. Each cell is adapted to store at least two bits. Each block of the memory component is adapted to be dynamically configured to store at least one bit per cell using a first mode of operation and dynamically configured to store at least two bits per cell using a second mode of operation while the mass storage device is operating, wherein the first mode of operation entails programming fewer bits of a cell in fewer passes as compared to the second mode of operation.

Abstract: Embodiments relate to tracking cache lines. An aspect of embodiments includes performing an operation by a processor. Another aspect of embodiments includes fetching a cache line based on the operation. Yet another aspect of embodiments includes storing in an instruction address register file at least one of (i) an operation identifier identifying the operation and (ii) a memory location identifier identifying a level of memory from which the cache line is populated.

Abstract: Systems, methods, and computer programs are disclosed for kernel masking dynamic random access memory (DRAM) defects. One such method comprises: detecting and correcting a single-bit error associated with a physical address in a dynamic random access memory (DRAM); receiving error data associated with the physical address from the DRAM; storing the received error data in a failed address table located in a non-volatile memory; and retiring a kernel page corresponding to the physical address if a number of errors associated with the physical address exceeds an error count threshold.

Abstract: A controller is used in a computer system to control access to an NVRAM. The computer system includes a processor coupled to a non-volatile random access memory (NVRAM). The NVRAM is byte-rewritable and byte-erasable. The NVRAM stores data to be used by a set of agents including in-band agents and an out-of-band agent. The in-band agents run on a processor having one or more cores, and the out-of-band agent that runs on a non-host processing element. When the controller receives an access request from the out-of-band agent, the controller determines, based on attributes associated with the out-of-band agent, whether a region in the NVRAM is shareable by the out-of-band agent and at least one of the in-band agents.

Abstract: A method of managing peripherals is performed in a device coupled to a processor in a computer system. For example, the method is performed in an input/output memory management unit (IOMMU) or a peripheral. The method includes recording information associated with I/O activity for one or more peripherals in a log that has a first base address. The method also includes, without pausing the I/O activity, specifying a second base address for the log and setting a head pointer and a tail pointer for the log to indicate that the log is empty. The second base address is distinct from the first base address.

Abstract: One particular implementation may take the form of a system or method for tracking application identification and application context in a context-isolated computing environment. The method may store such application information to reduce redundant information being stored on a stack. More particularly, the embodiment may store the application information in a context-specific marker frame. The context-specific marker frame may be stored once on the stack or it may be stored separately from the stack to maintain a small stack size. In another implementation, an invocation handler method may be called to store the redundant information about the executing application. The invocation handler may store the necessary information in a well-known location for later use by the virtual machine. The invocation handler may also provide further benefits, such as synchronization to ensure thread safety on shareable objects.

Abstract: A method and apparatus is described herein for accessing a physical memory location referenced by a physical address with a processor. The processor fetches/receives instructions with references to virtual memory addresses and/or references to physical addresses. Translation logic translates the virtual memory addresses to physical addresses and provides the physical addresses to a common interface. Physical addressing logic decodes references to physical addresses and provides the physical addresses to a common interface based on a memory type stored by the physical addressing logic.

Abstract: Embodiments of the invention include electronic communications devices having a memory in near field communication device, a memory arbitrator and a host processor. The near field communication (NFC) devices are configured to receive data and drive power from the communication signal. The memory arbitrator is connected to the NFC device and the memory. The memory arbitrator is also configured to access the memory in response to an access request from the NFC device. Additionally, the memory is configurable to be accessed by both the host processor and the NFC device according to embodiments of the present invention.

Abstract: A technique for protecting host data using, for example, snaps, asynchronous replication, and/or synchronous replication, includes storing both block-based objects and file-based objects in a common form—as files. With both block-based objects and file-based objects represented as the same type of underlying objects, data protection of both block-based and file-based objects is accomplished using a single set of data protection technologies, which are configured to perform data protection operations on files.

Abstract: Banks within a dynamic random access memory (DRAM) are managed with virtual bank managers. A DRAM controller receives a new memory access request to DRAM including a plurality of banks. If the request accesses a location in DRAM where no virtual bank manager includes parameters for the corresponding DRAM page, then a virtual bank manager is allocated to the physical bank associated with the DRAM page. The bank manager is initialized to include parameters needed by the DRAM controller to access the DRAM page. The memory access request is then processed using the parameters associated with the virtual bank manager. One advantage of the disclosed technique is that the banks of a DRAM module are controlled with fewer bank managers than in previous DRAM controller designs. As a result, less surface area on the DRAM controller circuit is dedicated to bank managers.

Abstract: An information processing apparatus includes a processor that executes an instruction stored in a fixed address area in a storage part; the storage part that stores a first startup program and a second startup program, contents of the second startup program being different at least partially from those of the first startup program; and an address conversion part that, when the processor carries out a predetermined startup different from an ordinary startup that is carried out at a time of starting power supply to the information processing apparatus, converts an address included in a read instruction issued by the processor indicating a storage area that stores the first startup program into an address indicating an other storage area that stores the second startup program, and sends the converted address to the storage part.

Abstract: According to various embodiments, a storage controller configured to control storage of data in a pre-determined area of a storage medium may be provided. The storage controller may include a memory configured to store a write pointer, a reclaim pointer, and a wrapped around pointer. The write pointer may indicate a location of the storage medium to write incoming data. The reclaim pointer may indicate a location of the storage medium to perform a space reclamation. The wrapped around pointer may indicate a location of the storage medium where writing is to continue if writing of data reaches an end of the pre-determined area.

Abstract: A method is used in displaying data storage system information. A graphical user interface (GUI) is provided that includes a tree structure of GUI components. Each of the GUI components is representative of an object in a data storage system. The tree structure includes lightweight information for the GUI components. At least one of the GUI components is updated by exercising a model view controller architecture. The GUI component is derived from a model chain that includes at least two models.

Abstract: A checkpoint technique associated with an out of order based architecture of a processing device is described. An instruction may be received by its retirement unit and an identification as to whether the instruction is associated with a speculative error is performed. If the instruction is associated with the speculative error, then a first operation may be performed to replace state values of a first checkpoint of the processing device with state values of a second checkpoint. If the instruction is not associated with the speculative error, then the second checkpoint state may be updated based on the instruction.

Abstract: A cluster system includes a plurality of computing nodes connected to a network. Each node is configured to access its own storage device, and to send and receive input/output (I/O) operations associated with its own storage device. Further, each node of the plurality of nodes may be configured to have a function of acting as a first node, which sends a first message to other nodes of the plurality of nodes. The first message may include configuration information indicative of a data placement of data on the plurality of nodes in the cluster system according to an event. Following receipt of the first message from the first node, each of the other nodes may be configured to determine, based at least in part on the configuration information, whether data stored on its own storage device is affected by the event.

Abstract: Provided are a computer program product, system, and method for managing traces to capture data for memory regions in a memory. A trace includes a monitor parameter used by a trace procedure to monitor data in a memory device. A frequency is determined at which the trace procedure monitors the memory device. The trace procedure is invoked at the determined frequency to perform trace procedure operations comprising determining a region in the memory device according to the monitor parameter and copying data in the determined region to trace data in a data space.

Abstract: Reducing virtual memory power consumption during idle states in virtual memory systems comprising tracking the topology of the system memory by the system hypervisor and operating system running on any selected virtual machine hosted by the system hypervisor. The idle states in the system memory are dynamically monitored and then the power consumption states in the system memory are dynamically reduced through the interaction of the hypervisor and the operation system running on the selected virtual machine.

Abstract: The present invention discloses a data accessing method and an apparatus for performing the method. Through a newly-defined host logical unit (HLUN), a unique HLUN number is given to each LUN-to-LD/Partition mapping relationship, and the HLUN is present to external hosts. Therefore, all of the hosts in the same storage system may recognize different logical units (i.e., HLUN). Hence, when processing an Input/Output (IO) request issued from any one host, a storage virtualization controller (SVC) can correctly find the corresponding LD/Partition for accessing data without identifying the identity of the host.

Abstract: Embodiments relate to tracking cache lines. An aspect of embodiments includes performing an operation by a processor. Another aspect of embodiments includes fetching a cache line based on the operation. Yet another aspect of embodiments includes storing in an instruction address register file at least one of (i) an operation identifier identifying the operation and (ii) a memory location identifier identifying a level of memory from which the cache line is populated.

Abstract: A method begins by a dispersed storage (DS) processing module generating a data object identifier for data to be stored in a dispersed storage network (DSN) and partitioning the data into a plurality of data partitions based on a set of retrieval preferences and data boundary information. For a data partition, the method continues with the DS processing module dispersed storage error encoding the data partition to produce a plurality of sets of encoded data slices and generating a plurality of sets of DSN addresses for the plurality of sets of encoded data slices, wherein a DSN address of the plurality of sets of DSN addresses includes a representation of the data object identifier, a representation of one or more retrieval preferences of the set of retrieval preferences, a representation of a corresponding portion of the data boundary information, and dispersed storage addressing information.

Abstract: Dynamic logical mapping (“DLM”) provides a virtual layer interposed between a host and a data storage library. Residing on the library, DLM creates a data storage map that records and manages the relationship between a storage cartridge's physical address and that cartridge's mapping to a logical address. During runtime of the data storage library, DLM manages the physical to logical address mapping of each storage cartridge so as to optimize efficiency and speed of the data storage library.

Abstract: Embodiments of the present invention provide a wear-leveling method, a storage device, and an information system, where a storage region is divided into a plurality of storage sub-regions of the same size. The method includes: recording the accumulated number of write operations of each storage sub-region; and when the accumulated number of write operations of any one storage sub-region of the plurality of storage sub-regions reaches a predetermined remapping rate, mapping a logical address of the storage sub-region to a remapping physical address. With the wear-leveling method, the storage device, and the information system in the embodiments of the present invention, a logical address of a local data block on which too many write operations are performed may be evenly mapped to an overall physical storage region, thereby avoiding that local data is too hot and prolonging a service life of a storage medium.

Abstract: A method for memory management, include allocating an empty page of a physical memory for reference data according to execution of an application program, and mapping the empty page to a virtual memory; checking a physical address of the physical memory to which the reference data has been loaded; mapping the checked physical address to the virtual memory to which the empty page has been mapped, and mapping the reference data; and releasing allocation of the allocated physical memory when the reference data is mapped to the virtual memory.

Abstract: Migration of a virtual machine to a new host is coordinated while data that is mapped into virtual (swap) memory of a source instance of the virtual machine (or guest) is properly handled. Sharing rights for one or more swap devices can be modified to facilitate the use of the swap devices by a new host and a corresponding (target) instance of virtual machine running on the new host.

Abstract: A method for managing an image memory in an embedded device is provided. A node is obtained from a linked list of the image memory. It is judged whether valid data is present in a memory block corresponding to the node. When no valid data is present, it is judged whether valid data is present in a memory block corresponding to a previous node of the node. When valid data is present in the previous node, it is further judged whether the valid data is movable. When the valid data is movable, memory block information described in the two nodes is exchanged, and the valid data previously stored in the memory block corresponding to the previous node is moved to the memory block corresponding to the node.

Abstract: A computer-readable recording medium stores a program causing a computer to execute an association process that includes identifying a second storage location associated with a first storage location by referring to a memory unit configured to store storage location association information indicating relevance between the first storage location and the second storage location where data prepared at a second operation stage associated with a first operation stage is stored. The second storage location is identified when new data is stored to the first storage location where data prepared at the first operation stage among multiple stages for manufacture of a product is stored. The association process further includes creating and recording in the memory unit, data association information indicating the relevance between the new data stored in the first storage location and the latest data among the data that is stored in the second storage location.

Abstract: A solid state drive and a method for providing active recycling for the solid state drive are disclosed. The solid state drive includes a plurality of blocks and each of the plurality of blocks includes a plurality of pages. The method steps include receiving a read request from a data requester; identifying at least one page containing data requested by the read request; determining whether the at least one page belongs to a block identified for active recycling; writing the at least one page to a different block when the at least one page belongs to the block identified for active recycling; and sending the at least one page to the data requester in response to the read request.

Abstract: A method and an apparatus for supporting a self-destruction function in a baseband modem are provided. Aspects of the present disclosure are to address at least the above-mentioned problems and/or disadvantages and to provide at least the advantages described below. Accordingly, an aspect of the present disclosure is to provide a self-destruction method and apparatus in which a self-impossible state is autonomously entered if the baseband modem of a receiving terminal which supports mobile communication is necessary. Another aspect of the present disclosure is to provide a method and apparatus for deleting information stored in memory when a command is received over a mobile communication network in which a baseband modem has been constructed and then entering a self-impossible state so that the terminal is not recovered although it is booted up again.

Abstract: Exemplary embodiments provide a technique to offload storage workload. In one aspect, a computer comprises: a memory; and a controller operable to manage a relationship among port information of an initiator port, information of a logical volume storing data from the initiator port, and port information of a target port to be used for storing data from the initiator port to the logical volume, and to cause another computer to process a storage function of a storage system including the logical volume and the target port by creating a virtual machine for executing the storage function and by configuring the relationship on said another computer, said another computer sending the data to the logical volume of the storage system after executing the storage function. In specific embodiments, by executing the storage function on said another computer, the workload of executing the storage function on the storage system is eliminated.

Abstract: A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable to a reference to host-physical memory of the host machine.

Abstract: A planning and search system are described wherein a graph search and segment matching are used to handle very large searches at a higher speed.

Abstract: This disclosure is directed to software modification that may be used to prevent software piracy and prevent unauthorized modification of applications. In some embodiments, a software vendor may modify software prior to distribution to a user. The software vendor may extract cutouts from an application to create a modified application. The modified application and the cutouts may be downloaded by a user device. The user device may run the application using the modified application and by executing the cutouts in a secure execution environment that conceals the underlying code in the cutouts.

Abstract: An input/output memory management unit (IOMMU) having an “invalidate all” command available to clear the contents of cache memory is presented. The cache memory provides fast access to address translation data that has been previously obtained by a process. A typical cache memory includes device tables, page tables and interrupt remapping entries. Cache memory data can become stale or be compromised from security breaches or malfunctioning devices. In these circumstances, a rapid approach to clearing cache memory content is provided.

Abstract: A computer-implemented method may include assigning an address translation table to a peripheral component interconnect host bridge and determining that an input/output adapter accessible to the peripheral component interconnect host bridge is configured as a virtualized adapter to provide a plurality of virtual functions to a plurality of logical partitions. In response to determining that the input/output adapter is configured as the virtualized adapter, the address translation table may be subdivided to enable the plurality of virtual functions to access the memory of at least one logical partition of the plurality of logical partitions.

Abstract: Various embodiments are described herein for a method and related device for processing a first dataset comprising a second dataset and a third dataset in order to locate the third dataset. The second dataset has a variable data length and terminates with an ending marker and the third dataset starts after the ending marker. The method involves preprocessing a memory element by storing a plurality of locater markers, storing the first dataset in the memory element thereby overwriting a portion of the plurality of locater markers, locating which of the plurality of locater markers is closest to the end of the first dataset; and locating the third dataset by searching for the ending marker of the second dataset based on the position of the closest locater marker.

Abstract: The disclosure includes, in general, among other aspects, an apparatus having multiple programmable units integrated within a processor. The apparatus has circuitry to map addresses in a single address space to resources within the multiple programmable units where the single address space includes addresses for different ones of the resources in different ones of the multiple programmable units and where there is a one-to-one correspondence between respective addresses in the single address space and resources within the multiple programmable units.

Abstract: A method of controlling the capacity of a virtual storage system provided on a physical storage system, the method including: providing a control program on the physical storage system; coupling additional virtual storage to the virtual storage system on the physical storage system; providing control data on the additional virtual storage; with the control program, reading the control data and configuring the virtual storage system accordingly. A corresponding virtual storage system is also provided.

Abstract: A device with an autonomous sleep characteristic, which is in communication with a host, is described. The device includes one or more communication subsystems. Each communication subsystem maintains a sleep activity indicator that indicates whether a corresponding communication subsystem is allowed to go to sleep. Each communication subsystem can autonomously enter a sleep state, when its sleep activity indicator indicates that the corresponding communication subsystem is, in fact, allowed to go to sleep. The device also includes a controller. The controller has a block memory which stores data written to the device from the host. The controller further includes a sleep state indicator that indicates a sleep state of each communication subsystem.

Abstract: Storage devices herein include a non-volatile memory and a controller configured to perform a read operation on a physical page of the non-volatile memory in response to a read request on a logical page of the non-volatile memory from a host. The controller may include a mapping manager configured to manage a plurality of logical blocks by a logical unit. The mapping manager may include a unit map table including a correlation between the logical unit and a physical unit corresponding to the logical unit. Additionally, the mapping manager may be configured to change a mapping method according to whether the unit map table includes a physical unit corresponding to a logical unit including a logical page requested by the host. Related user devices and electronic devices are also provided.

Abstract: In a content address storage system, storage target data or address data is stored in a storage device with respect to each time zone divided in a time-series manner, and a storage region in the storage device storing a piece of data, which is not pointed to by other address data, of the storage target data or the address data stored in the storage device in a past time zone before a current time zone, is released.