Abstract: A data management system or “DMS” provides an automated, continuous, real-time, substantially no downtime data protection service to one or more data sources associated with a set of application host servers. To facilitate the data protection service, a host driver embedded in an application server captures real-time data transactions, preferably in the form of an event journal that is provided to other DMS components. The driver functions to translate traditional file/database/block I/O and the like into a continuous, application-aware, output data stream. The host driver includes an event processor that provides the data protection service, preferably by implementing a finite state machine (FSM). In particular, the data protection is provided to a given data source in the host server by taking advantage of the continuous, real-time data that the host driver is capturing and providing to other DMS components.

Abstract: Data for inclusion in a probable cause field of a telecommunications network alarm indication message is structured to comprise first and second delimited data elements respectively indicating first and second predetermined (ie standardized) probable cause codes, the first and second predetermined probable cause codes relating to one or more characteristics of an event occurring or having occurred in a telecommunications network. Methods, apparatus and computer programs for generating and for processing such data is provided as well as signals representing such data.

Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.

Abstract: A method and system are provided for utilizing a logical failover circuit for rerouting data from a failed network circuit in a first data network to a second data network. The network circuit in the first data network includes a logical circuit for communicating data. When a failure in the network circuit in the first data network is detected, a network failover circuit is selected in the second data network. The network failover circuit in the second data network includes a logical failover circuit for communicating data. The data in the failed logical circuit in the first data network is rerouted over the logical failover circuit in the second data network until the failure in the network circuit in the first data network is resolved. After the failed network circuit in the first data network has been restored, the data is rerouted over the restored logical circuit.

Abstract: A method and system for detecting and managing an error detected in an iSCSI (Internet Small Computer System Interface) PDU (Protocol Data Unit) by using a RDMA (Remote Direct Memory Access) dedicated receive error queue for error recovery.

Abstract: A method and computer program product for error monitoring partitions in a computer system. A global supervisor mapping (GSM) associates each supervised partition with a supervisor partition that monitors the supervised partition. A partition status buffer (PSB) denotes a status (GOOD, BAD, NOCARE) of the partition. The BAD status denotes that the partition has encountered at least one error that is currently unrepaired. The supervisor partition determines its supervised partition from the GSM and ascertains the status of its supervised partition from the PSB. If the status of the supervised partition is BAD then a recovery procedure is performed by the supervisor partition. The recovery procedure: obtains a grant of access to physical and logical resources of the supervised partition which contains error data of the supervised partition; gathers the error data; and sets the status of the supervised partition to the NOCARE status.

Abstract: A transactional management system includes a plurality of functional modules, distributed in a WAN, for receiving and processing transactional information. The functional modules can include a dealer management system that receives transactional information and formats the information into a regular or test message for transmission over the WAN to either a router or a transaction service system which receives the message, performs certain service operations on the information contained in the message, and transmits the message to a provider management system. The transaction service system includes functionality that identifies a message as a test message, compares the test message to a test case, and if the test message is the same as the test case, generates a message to this effect.

Abstract: In general, the invention facilitates diagnosing fault conditions, such as flapping, by permitting users to request information for specific components in a network device such as a router. The invention also facilitates the diagnosis of other fault conditions, including, but not limited to, excessive numbers of dropped packets, hard drive crashes, high temperature readings, and inactive interface cards. A user may obtain a targeted log containing information relating to selected fault conditions or other network device events, rather than a system log containing information relating to all network device events, some of which may not be of interest to the user. The targeted log may be parsed and analyzed with greater ease than the system log.

Abstract: Techniques for error handling are described for errors detected by a computer application that receives and processes application transaction data generated by a different computer application. A determination is made as to whether an error can be corrected through the use of the receiving computer application. If not, an indication of the error is sent to the computer application that generated the application transaction data so that the error may be corrected using that computer application. If the error can be corrected by using the receiving computer application, an error correction component stores information so that the error can be corrected through the use of the receiving computer application.

Abstract: A method, apparatus and article of manufacture, implementing the method, processes an error when a write fails in an application that has been ported from a first platform to a second platform. The second platform has a write-to-operator-with-reply call that is not available in the first operating system. The application issues a file write. The application receives an out-of-space error in response to the file write. The application issues a write-to-operator-with-reply call to send a message indicating the out-of-space error to a console.

Abstract: Techniques are disclosed, for use in a computer system including a plurality of processing units coupled over a system fabric, to identify a lockstep error associated with a first packet to be transmitted over the system fabric; set a viral indicator in the first packet to indicate the lockstep error; and transmit the modified packet over the system fabric.

Abstract: A node representing a network element is provided. A service state for the node is stored in the node. A service state for a first parent node upon which the node is operationally dependent is stored in the node. In response to a triggering occurrence, a second parent node is dynamically associated with the node. A service state for the second parent node is stored in the node. In response to receiving a new service state for one of the parent nodes, the service state for the node is redetermined based on the service states for the parent nodes.

Abstract: A device is provided which includes a first microprocessor core to generate a first output signal; a second microprocessor core to generate a second output signal; a switching fabric having a first input/output port; and lockstep logic, coupled between the first input/output port of the switching fabric and the first and second microprocessor cores, to detect whether the first output signal differs from the second output signal.

Abstract: A programmer to set his own input error handler after examining the context where the error occurs by utilizing a set error handler subroutine. The context may be provided by the system library to the user's handler routine so it can make a better judgment on how to proceed next. The customizable nature of the invention allows programmers to suit the error handling to individual application needs.

Abstract: A Fieldbus device and method for handling errors arising from parameter write messages. A load mode identifier detects if the parameter write messages are operator initiated or program initiated. If program initiated, communication of errors resulting from execution of the parameter writes is suppressed. Also, a rejection of a parameter write operation arising from the errors is suppressed for program initiated program write messages.

Abstract: A method of restoring processes within a process domain begins with a step of restoring a tree of processes in which at least two of the processes share at least a resource. The method continues with a step of restoring a checkpoint state of each resource used by the processes after a time when a possible need for a restoration state of the resource exists. According to an embodiment, the restoration state comprises information used by the method during the step of restoring the tree of processes. According to another embodiment, the restoration state comprises information used by the method during the step of restoring the checkpoint state of one or more particular resources. The method concludes with a step of resuming execution of each process after restoration of the checkpoint state of the resources used by the process.

Abstract: A method for managing remote software code update includes receiving a message from a remote device that includes a first code space having at least one segment and a second code space having one or more segment. The method also includes decoding the message to determine the execution mode of the remote device, indicating code in the first code space is corrupted if the execution mode indicates the remote device is executing in the second code space and indicating the code in the first code space is valid if the execution mode indicates the remote device is executing in the first code space.

Abstract: An error rate select circuit activated in an information sustaining mode is provided, wherein a plurality of pieces of data are read from a dynamic memory circuit and inspection bits which are used to detect an error existing in the pieces of data are generated. If no error is detected, a first predetermined value is added to a total value. If an error is detected, a second predetermined value greater than the first predetermined value is subtracted from the total value. If the total value exceeds a first set value, a refresh period is lengthened by a predetermined time increment. If the total value becomes smaller than a second set value, the refresh period is shortened by the predetermined time increment.

Abstract: A logic analyzer according to the subject invention includes a disassembler for disassembling object code. The disassembler automates the process of locating op-code addresses by utilizing information derived from an object file corresponding to the code whose execution is being disassembled. The object file includes addresses for the starting location of op-codes corresponding to individual source code lines. When the disassembler cannot determine the correct starting location for an op-code, it uses information from the object file to obtain the address of an op-code within a specified range of interest.

Abstract: A system is provided which includes a microprocessor comprising a first processing unit to generate a first output signal and a second processing unit to generate a second output signal, and comparison means, coupled to the microprocessor, to detect whether the first output signal differs from the second output signal.

Abstract: A data initiator device designates an initial data tag set for tagging data transfers to thereby attach data tags from the designated set to commands directed to data transfers between the data initiator device and a data target device subsequent to the designation of the initial data tag set. The data transfer commands are issued with the attached data tags from the designated data tag set until an occurrence of a reset error associated with one of the issued data transfer commands. In response to the reset error, the data initiator device designates a different data tag set for tagging data transfers to thereby attach data tags from the newly designated data tag set to commands directed to data transfers between the data initiator device and the data target device subsequent to the designation of the new data tag set.

Abstract: The present invention provides a method, system and program product for dynamically detecting an errant data sequence transmitted over a network and performing a corresponding action. Specifically, a data sequence is received by a server from a client and compared to a definable data structure. The data structure comprises rules that each correspond to a state of communication between the server and the client. Each rule sets forth a predetermined data sequence, an optional condition and an action. If the received data sequence: (1) matches one of the predetermined data sequences in the data structure; (2) is relevant to (was received during) the state of communication to which the matched predetermined data sequence corresponds; and (3) meets any enumerated conditions, a corresponding action is implemented.

Abstract: A memory controller system is provided, which includes a plurality of system buses, a multi-port memory controller and a plurality of error correcting code (ECC) encoders. The memory controller has a plurality of system bus ports and a memory port. Each ECC encoder is coupled between a respective system bus and a respective system bus port of the memory controller.

Abstract: A device for automatic error detection on booting a motherboard includes a storage device, and an automatic error detection speech unit. The storage device stores BIOS program code and a system status table for the motherboard, the BIOS program code being executed by a processor when the motherboard is booting, the system status table of the motherboard storing at least one motherboard element status, the motherboard status being updated by the processor when the motherboard is turned on in accordance with current conditions of the booting. The automatic error detection speech unit couples to the storage device for reading the system status table of the motherboard after a predetermined time period of the motherboard being turned on, and playing corresponding speech data in accordance with the motherboard status of the system status table for the motherboard.

Abstract: A fault tolerant graphics controller that generates error codes for graphics commands and checks the error codes before the graphics controller executes the command. The error code generator may be configured to detect and correct errors or to just detect errors. If an error is detected or an uncorrectable error occurs, the host computing system can be informed or interrupted, the erroneous command can be flushed from the graphics controller or the commands before and after the possibly erroneous command can be stored to help determine the erroneous command. Error codes can be generated on a block basis and stored in the frame buffer, thereby having minimal impact on system performance.

Abstract: A network appliance for monitoring, diagnosing and documenting problems among a plurality of devices and processes (objects) coupled to a computer network utilizes periodic polling and collection of object-generated trap data to monitor the status of objects on the computer network. The status of a multitude of objects is maintained in memory utilizing virtual state machines which contain a small amount of persistent data but which are modeled after one of a plurality of finite state machines. The memory further maintains dependency data related to each object which identifies parent/child relationships with other objects at the same or different layers of the OSI network protocol model. A decision engine verifies through on-demand polling that a device is down. A root cause analysis module utilizes status and dependency data to locate the highest object in the parent/child relationship tree that is affected to determine the root cause of a problem.

Abstract: An online system monitoring technique quickly and efficiently identifies failures or other system errors arising during operation of an intermediate network node, such as a network switch. The technique comprises Keep Alive Buffer packets/cells (“KABs”) that exercise data and control paths extending from every ingress port to every egress port in the switch. By exercising the data and control paths, the KABs enable testing of, and ensuring against, component failures, missing modules or other types of failure that can be detected as soon as possible, to thereby prevent data flow backup or other performance degradation in the switch.

Abstract: The present invention provides a storage unit for accessing a storage medium according to a direction from a computer, a condition monitoring program product executed in the computer to which the storage unit is connected, and a storage medium thereof, having a configuration advantageously providing information for a user to properly address an abnormal condition in the storage unit. The storage unit includes a date storage module for storing a current date reported from the computer only a first time the storage unit is connected to the computer and maintains subsequently the date. The condition monitoring program receives the date stored in the date storage module from the storage unit connected to the computer and presents a message according to the number of days elapsing between the date and the current date.

Abstract: A method for monitoring a driver output has is provision for actively influencing the driver output in order to perform fault analysis. To avoid a component addressed by the driver being influenced as a result of the active influencing of the driver output although no fault or only a sporadic fault has occurred, provision is made in accordance with the invention for active influencing of the driver output only to occur when a fault state has occurred at the driver output for a specified period of time.

Abstract: A method and apparatus that provides informed prefetching and enhanced memory utilization in a server cluster to improve failover and startup time of a resource group executed by a server cluster. When starting up or failing over a resource group on a given server, the method identifies information for prefetching, informs a file system executed by the server cluster of the identified information, accesses the identified information using the file system, and stores the identified information in main memory for use by the server in the server cluster in advance of when the server actually will need the identified information to failover or initiate resources. To enhance memory utilization the method also identifies pages in cache memory that are not needed for current services provided by a server. Generally these pages contain prefetched information that was already used at start up or failover of a resource group.

Abstract: An electronic control unit includes a serial communication circuit capable of easily confirming presence or absence of communication error while regular transmission/regular report between master station and sub station are performed timely. First and second control circuit sections 200a (master station) and 200b (substation) communicate mutually via series-parallel converters 117, 127. The master station includes regular transmission device 201 and irregular transmission device 211. The substation includes regular report device 221, confirmation reply device 205 and report reply device 215 relative to transmission data from the master station, and unprocessed data table 204. The confirmation reply device 205 and report reply device 215 confirm whether or not downstream communication from the master station to sub station is normal.

Abstract: Each processor in a multi-processor system is periodically interrupted for preempting the current thread for servicing of a watchdog thread during normal operation. Upon failing to service the watchdog thread over a grace period, a system watchdog initiates an orderly shutdown and reboot of the system. In order to prevent spinlocks from causing fake panics, if the current thread is holding one or more spinlocks when the interrupt occurs, then preemption is deferred until the thread releases the spinlocks. For diagnostic purposes, a count is kept of the number of times that preemption is deferred for each processor during each watchdog grace period.

Abstract: A computer processor includes a replay system to replay instructions which have not executed properly and a first event pipeline coupled to the replay system to process instructions including any replayed instructions. A second event pipeline is provided to perform additional processing on an instruction. The second event pipeline has an ability to detect one or more faults occurring therein. The processor also includes a synchronization circuit coupled between the first event pipeline and the second event pipeline to synchronize faults occurring in the second event pipeline to matching instruction entries in the first event pipeline.

Abstract: A system and a method are distinguished by the fact that, if it is determined that the system is not operating properly, a control device is stopped and it is ensured that the control device, when operation is continued, begins with the execution of the operation whose faulty execution may be the cause for the fault registered, or which was being executed when the fault was registered. This makes it possible, with little effort and without noticeable disruption to the operation of the system, to determine whether improper operation of the system is of only a temporary nature or of a permanent nature, and for the system or parts of the same to be deactivated or reset only when the fault that has occurred is not a temporary fault.

Abstract: An IC (integrated circuit) card (or smart card) comprising a plurality of detectors for detecting abnormal operating conditions of the IC card. If an abnormal condition is detected by one of the detectors, the detector will generate a detection signal, which is then stored in a nonvolatile memory. A reset signal is then generated in response to the detection signal to reset a central processor unit. The central processor unit informs a user of a reset status and a cause thereof.

Abstract: As advances continue to be made in the area of semiconductor memory devices, high capacity and low cost will be increasingly important. In particular, it will be necessary to create memory devices for which the testing of the device must be minimized in order to minimize costs. Current memory manufacturing costs are significant and will grow as the capacity of the devices grows—the higher the memory's capacity, the more storage locations that must be tested, and the longer the testing operation will take. The cost of the testing can be calculated by dividing the amortized cost of the test equipment by the number of devices tested. As memory devices enter the Gigabyte range and larger, the number of devices that can be tested by a given piece of test equipment will go down. As a result, the cost per unit attributable to testing will rise.

Abstract: This invention presents a method and system for persistent session and data control across transparently distributed objects. Persistent data control enables a system to reconnect users to the appropriate data areas after a system fault. Persistent session control enables a user to reestablish the state of a previous session with the data, regardless of intervening outages at any one or many parts of the network. The invention uses persistent data objects and persistent data control objects to create persistent sessions and data control across the network.

Abstract: A data processor formed on a single integrated circuit and capable of connection to an external memory, the data processor including: a central processing unit; a local memory including a debug memory area; a plurality of interrupt inputs; an interrupt handler coupled to the interrupt inputs for interrupting the central processing unit in response to interrupt signals received on the interrupt inputs, and being arranged to periodically store in the debug memory area of the local memory data indicative of the status of the interrupt handler; the data processor being adapted to, after having been reset, perform a start-up routine including the step of outputting the contents of the debug memory area to the external memory.

Abstract: Many discovery problems, e.g., subgroup or association rule discovery, can naturally be cast as n-best hypotheses problems where the goal is to find the n hypotheses from a given hypothesis space that score best according to a certain utility function. We present a sampling algorithm that solves this problem by issuing a small number of database queries while guaranteeing precise bounds on confidence and quality of solutions. Known sampling approaches have treated single hypothesis selection problems, assuming that the utility be the average (over the examples) of some function—which is not the case for many frequently used utility functions. We show that our algorithm works for all utilities that can be estimated with bounded error. We provide these error bounds and resulting worst-case sample bounds for some of the most frequently used utilities, and prove that there is no sampling algorithm for a popular class of utility functions that cannot be estimated with bounded error.

Abstract: A method, apparatus and article of manufacture for problem identification and resolution using intelligent agents. In at least one embodiment, an agent is a software element configured to detect a situation (e.g., problem or problems) and take steps to preserve a context in which the situation occurs. The agent may also be configured to identify one or more courses of action (e.g., solutions) to be taken in response to the situation. In one embodiment, a user trains an agent to take a particular action upon detecting a particular problem. The training may be initiated after accessing a log containing details about the problem context and recommended courses of action.

Abstract: In general, the invention facilitates diagnosing fault conditions, such as flapping, by permitting users to request information for specific components in a network device such as a router. The invention also facilitates the diagnosis of other fault conditions, including, but not limited to, excessive numbers of dropped packets, hard drive crashes, high temperature readings, and inactive interface cards. A user may obtain a targeted log containing information relating to selected fault conditions or other network device events, rather than a system log containing information relating to all network device events, some of which may not be of interest to the user. The targeted log may be parsed and analyzed with greater ease than the system log.

Abstract: A multi-processor system in which each processor receives a message from another processor in the system. The message may contain corrupted data that was corrupted during transmission from the preceding processor. Upon receiving the message, the processor detects that a portion of the message contains corrupted data. The processor then replaces the corrupted portion with a predetermined bit pattern known or otherwise programmed into all other processors in the system. The predetermined bit pattern indicates that the associated portion of data was corrupted. The processor that detects the error in the message preferably alerts the system that an error has been detected. The message now containing the predetermined bit pattern in place of the corrupted data is retransmitted to another processor. The predetermined bit pattern will indicate that an error in the message was detected by the previous processor.

Abstract: A data management system or “DMS” provides an automated, continuous, real-time, substantially no downtime data protection service to one or more data sources associated with a set of application host servers. To facilitate the data protection service, a host driver embedded in an application server captures real-time data transactions, preferably in the form of an event journal that is provided to other DMS components. The driver functions to translate traditional file/database/block I/O and the like into a continuous, application-aware, output data stream. The host driver includes an event processor that provides the data protection service, preferably by implementing a finite state machine (FSM). In particular, the data protection is provided to a given data source in the host server by taking advantage of the continuous, real-time data that the host driver is capturing and providing to other DMS components.

Abstract: A computer system comprises, a profile for each software module, a software module monitor which detects a failure as failure occurrence information at an early stage at a time of execution of an application based on execution related information recorded in the profile, and notifies a software module manager of the failure, and the software module manager which identifies a failed software module from the failure occurrence information, determines how to handle the software module on the basis of the execution related information and the failure occurrence information, and directs the execution.

Abstract: A system and method for assessing binary compatibility between software modules permits software end users to register with a system, download software tools for testing binary compatibility between one or more ABIs and binary files resident on the end users' computer system(s). The testing generates a file including the results of the binary compatibility test for each binary file tested. A unique identifier of each binary file, e.g., the MD5 signature of the binary code, may be uploaded with the results of the compatibility test. The results of the compatibility test and the unique identifier may be further analyzed to determine a risk profile that the binary file(s) on the end user's computer system(s) is not binary compatible with a particular ABI. A report may be generated indicating the binary compatibility risk profile of the files resident on the user's computer system.

Abstract: A method and associated system and electronic device for evaluating the reliability of a program (401) stored in a storage memory of an electronic device (1) having a processing memory (3b) for processing programs, wherein the program (401) is loaded into the processing memory (3b) for processing, wherein a first determining step determines data about the loading address of the program (401), a modification step searches for a program corresponding to the program (401) in the storage memory (4, 10), wherein if the searched program is found, the program code of the searched program is modified to correspond to the loading of the program in the loading address determined in the first determining step. An examining step examines the conformity of the program loaded in the processing memory and the modified program, wherein the result of the examining step is used in the evaluation of the reliability of the program (401) to be verified.

Abstract: A method and apparatus for coordinating dynamic memory page deallocation with a redundant bit line steering mechanism are provided. With the method and apparatus, memory scrubbing and redundant bit line steering operations are performed in parallel with handling of notifications of runtime correctable errors. When a correctable error is encountered during runtime, and the correctable error is determined to be persistent, then dynamic memory page deallocation is requested of a hypervisor. The determination of persistence is based on a history CE table that is populated by the operation of the memory scrubbing and redundant bit line steering mechanism of a service processor. Thus, only those correctable errors that persist for longer than one memory scrubbing cycle are subject to memory page deallocation.

Abstract: The present invention provides a computer readable medium containing instructions for generating random jitter test patterns by generating a sequence of maximum-size asynchronous packets according to the P1394b standard and transmitting the sequence to the device under test. The instructions are executed to generate jitter test patterns by disabling the transmitter data scrambler of the second device; clear the port_error register of the device under test; and send a test pattern to said device under test.

Abstract: It is object to provide a memory system for reliably detecting an error, if any, in management information that is read out. The same content of telephone number data is stored in memories 8, 9, 10. When telephone number data is read out of the memories 8, 9, 10, a comparing section 20 judges if all the contents of the telephone number data are the same. If not, a parity error detecting section 22 performs parity check of the telephone number data and excludes the content from which a parity error is detected as an object not to be processed thereafter. After the parity check, an object-to-be-processed determining section 24 determines whether or not there is any telephone number data in the majority on the basis of the criterion that the sum of the pieces of the telephone number data that is read out. If there is not such telephone number data, it judges that there is an error.

Abstract: A method and system for nearly immediately trapping a failure-to-check-a-return-value error in a computer program. Modern processor architectures, such as the Intel® IA-64 processor architecture, provide for control speculation of load instructions, including 1-bit NAT registers, associated with general registers, that indicate occurrences of deferred exceptions arising during execution of control-speculative load instructions targeting the corresponding general registers. One embodiment of the present invention employs the NAT registers associated with general-purpose registers to distinguish special values, often indicating error conditions, stored in general-purpose registers serving to store the return values of functions and routines.