State Error (i.e., Content Of Instruction, Data, Or Message) Patents (Class 714/49)
  • Patent number: 7036050
    Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: April 25, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
  • Patent number: 7028229
    Abstract: An event subscription and publication system for dynamically notifying user level applications of kernel level events. The kernel level events may include hardware and software events as well as system level errors that occur in the kernel. User level applications that need information on these kernel level events subscribe to the event monitoring and publication framework of the present invention and are notified of these kernel level events when they occur. Upon notification of an event, the user application also is provided with specific information classifying the nature and details of the event. The kernel event monitoring and publication system of the present invention allows user level applications to be dynamically notified of kernel level events without requiring the user level application to interrupt the normal processing states to identify these events when the events occur.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: April 11, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Cynthia McGuire, Jerry Gilliam
  • Patent number: 7028227
    Abstract: A program recording medium recording a communication control program to be implemented in a computer including a plurality of control means for controlling data communication in a hierarchical configuration and data transfer control means for controlling data transfer among the plurality of control means. The program causes the data transfer control means to add anomaly information into data to be transferred to the plurality of control means upon detection of the anomaly indication, to send discard indication, that is the data containing the added anomaly information, at substantially the same time to the plurality of control means, and to discard the data containing the anomaly indication and data relating thereto.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: April 11, 2006
    Assignee: Fujitsu Limited
    Inventor: Minoru Kyoya
  • Patent number: 7024593
    Abstract: Described are techniques used in detection of a data corruption in a computer system. A host issues a write request that includes a checksum value determined in accordance with data associated with the write request. The write request is received by a data storage system that performs data validation using the checksum. If the data validation succeeds, the write operation proceeds. Otherwise, it is determined that the data is corrupt and a checksum error is returned to the issuing host. The host issues a vendor-defined write request operation that includes the checksum as a data field in the request packet sent to the data storage system. Filter drivers are used in obtaining the checksum and modifying the write request packet to specify a vendor-defined write operation if checksumming is enabled for the write operation.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: April 4, 2006
    Assignee: EMC Corporation
    Inventors: Robin Budd, Alexandr Veprinsky, Arieh Don
  • Patent number: 7010593
    Abstract: A system and method for dynamically providing information to an administrator of a computing environment such as an administrator of a network system that is relevant to a particular problem event. This information includes contextual instructions and diagnostic data that will assist the network administrator in the analysis of the problem event. Generally, the invention automatically obtains from relevant computing environment entities pertinent information likely to be necessary to troubleshoot the particular problem event. The context-sensitive information is presented dynamically on a display for consideration and interaction by the network administrator. Specifically, the invention includes a database of executable troubleshooting (TS) profiles each specifically designed for a particular type of problem event.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: March 7, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Robert Raymond
  • Patent number: 6996739
    Abstract: An apparatus for performing a block operation includes a functional unit, which performs an operation on one or more block operands, and an accumulator memory. The accumulator memory includes two independently interfaced memory banks. A control unit controls the memory banks in the accumulator memory so that each time the operation is performed, an operand is provided from one of the memory banks and a result is stored in the other memory bank. Since the memory banks are independently interfaced, the operand may be provided at the same time as the result is being stored. Additionally, since the result is stored in a different memory bank than the operand, the operation may be restarted if an error occurs.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: February 7, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Fay Chong, Jr.
  • Patent number: 6988225
    Abstract: A method and an apparatus are provided for verifying a fault detection result in a system. The apparatus includes an interface and a control unit. The interface is adapted to receive data associated with a process operation and adapted to receive information provided by a process controller associated with the process operation. The control unit, which is communicatively coupled to the interface, is adapted to perform a fault detection analysis based on the data associated with the process operation and verify a result of the fault detection analysis based on the information provided by the process controller.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: January 17, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Matthew A. Purdy, Richard J. Markle, Timothy L. Jackson
  • Patent number: 6986079
    Abstract: A method operates a system with a program-controlled unit. The program-controlled unit reads and executes data that are stored in a memory device and that represents instructions. According to the method, a check is made during the reading of data from the memory device to determine whether the relevant data are error-free. When it is ascertained that the relevant data are not error-free, the execution of an interrupt service routine is initiated. The method is distinguished by the fact that, when it is ascertained, during the execution of the interrupt service routine, that the data that are to be read from the memory device for this purpose is not error-free, the execution of the interrupt service routine is interrupted or ended, and the execution of an interrupt service routine stored at a different location is initiated.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: January 10, 2006
    Assignee: Infineon Technologies AG
    Inventor: Wilhard Christophorus Von Wendorff
  • Patent number: 6985726
    Abstract: A method of detecting the format of received information by detecting the format of a guiding channel of a communication system. With the use of a lookup table or other mapping technique, the detected guiding channel format is used to determine the format of the other channels of the communication system. Therefore, the format of received information can be determined without the use of TFCI information.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: January 10, 2006
    Assignee: Lucent Technologies Inc.
    Inventors: Walid Ahmed, Santanu Kumar Das, Lorenz Fred Freiberg, John G Grogan, Si Ming Pan
  • Patent number: 6983268
    Abstract: Even when a user does not know a structure of a computer readable program, a technique capable of analyzing log information is provided. A log analyzing method for analyzing log information outputted when a program is executed by a computer is comprised of: a step for acquiring log information outputted when a program is executed to thereby read the acquired log information; a step for accepting a user designation condition indicative of log information which is extracted; a step for extracting information from the log information based upon the accepted user designation condition, and for judging as to whether or not each of operations while the program is executed can satisfy an initial condition thereof so as to analyze a cause of an error occurred while the program is executed; and a step for providing a result of the error cause analysis to a user.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: January 3, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Yumiko Seki, Shinkichi Ebata
  • Patent number: 6961877
    Abstract: The present invention provides a method and system for performing in-line error correction in a disk storage system. The system includes an error correction (ECC) module; and a first memory storage device, wherein the first memory storage device and the error correction module simultaneously receive data from a storage disk before being buffered for transfer to a host system. The ECC module provides error correction mask before any data is transferred from the first memory storage device to a second memory buffer.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: November 1, 2005
    Assignee: QLogic Corporation
    Inventors: Yujun Si, Theodore Curt White, Stanley Ka Fai Cheong
  • Patent number: 6959261
    Abstract: A system for tracking changes in technical processes, machines or the like having measurement chains for acquiring measured data, having sensors, sensor lines and interpretation electronics, and having governing software. Interdependent measured quantities are combined into measurement groups, the measurement groups are linked with reference quantities, validity conditions are defined for the measured data, and the measured data is utilized only if the validity conditions are fulfilled. The measured data are examined for errors in the instrumentation. For serious, suddenly occurring malfunctions, an alarm is issued, and malfunctions are reported to the operators.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: October 25, 2005
    Inventor: Peter Renner
  • Patent number: 6959403
    Abstract: A node of a network comprises an error message detector arranged to detect error messages transmitted over the network, a counter arranged to count the error messages in order to produce an error message count, and a controller arranged to count valid messages in order to produce a count of valid messages. The controller is arranged to compare the error message count to the valid message count to indicate the health of the network. The node further comprises a transceiver, a controller coupled to the transceiver by a receive line and a transmit line, and error message first logic coupled to the receive and transmit lines. The error message first logic is arranged to detect a first error message from the receive line and a second error message from the transmit line, and to determine whether the node is closest to a fault by comparing timing between the first error message and the second error message.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: October 25, 2005
    Assignee: Honeywell International Inc.
    Inventors: Peter P. Dierauer, Isabelle Dierauer
  • Patent number: 6930605
    Abstract: An operating status indication method and system is proposed for use with an embedded operating system. The indication system is linked with and controlled by the operating system. The indication system includes an indication device, a driving module, and a signal control module. When the operating system is functioning properly, the signal control module sends a control signal to the driving module, for allowing the driving module to drive the indication device to output a particular signal, such that users can be informed of the normal operating status of the operating system by the particular signal.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: August 16, 2005
    Assignee: Inventec Corporation
    Inventor: Chih-Wei Chen
  • Patent number: 6928590
    Abstract: The preferred embodiments described herein provide a memory device and method for storing bits in non-adjacent storage locations in a memory array. In one preferred embodiment, a memory device is provided comprising a register and a memory array. A plurality of bits provided to the memory device are stored in the register in a first direction, read from the register in a second direction, and then stored in the memory array. Bits that are adjacent to one another when provided to the memory device are stored in non-adjacent storage locations in the memory array. When the plurality of bits takes the form of an ECC word, the storage of bits in non-adjacent storage locations in the memory array reduces the likelihood of an uncorrectable multi-bit error. In another preferred embodiment, a memory device is provided comprising a memory array and a register comprising a first set of wordlines and bitlines and a second set of wordlines and bitlines arranged orthogonal to the first set.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: August 9, 2005
    Assignee: Matrix Semiconductor, Inc.
    Inventors: Alper Ilkbahar, Roy E. Scheuerlein, Derek J. Bosch
  • Patent number: 6918064
    Abstract: A method and a device for monitoring data and the transmission of data between at least one first control unit and one second control unit are provided. The at least two control units have a first program level, to which are allocated programs which calculate the control function, as well as a second program level including programs that monitor the functional reliability of the programs of the first program level. The first control unit is connected to at least one component which may be used to acquire data, for example, controlled variables. The data acquired by the component or further data determined with this data may be transmitted from the first control unit to the second control unit over a single connection in a secure manner, and the data and the data transmission are secured separately in the first and second program levels such that errors in the data and the data transmission may be detected.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: July 12, 2005
    Assignee: Robert Bosch GmbH
    Inventors: Margit Mueller, Lilian Kaiser, Stefan Keller
  • Patent number: 6915426
    Abstract: A system and method for generating a plurality of authentication tags using a plurality of authentication mechanisms is disclosed. The plurality of authentication tags can reflect different authentication strength-performance levels. It is a feature of the present invention that a receiver is afforded increased flexibility in adaptively choosing strength-performance levels. It is a further feature of the present invention that multiple authentication tags can be used in multicast environments, where different receivers may have different processor capabilities or security policies.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: July 5, 2005
    Assignee: Networks Associates Technology, Inc.
    Inventors: David W. Carman, Michael D. Heyman, Alan T. Sherman
  • Patent number: 6912708
    Abstract: One embodiment of the present invention provides a system that facilitates debugging a platform-independent virtual machine. The system operates by providing an agent on the platform-independent virtual machine, which provides a set of functions for accessing variables in the platform-independent virtual machine. The platform-independent virtual machine is adapted to call the set of functions within the agent. Next, the agent examines the current state of the variables in the platform-independent virtual machine. The agent communicates the current state of the variables to a host machine. An operator of the host machine can then analyze the current state of the variables.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: June 28, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: David Wallman, Stepan Sokolov
  • Patent number: 6901532
    Abstract: A system and method for recovering from radiation induced memory errors invalidates information stored in a cache memory, upon the detection of the memory error. The cache memory is then reloaded with valid information.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: May 31, 2005
    Assignee: Honeywell International Inc.
    Inventors: John L. DeRuiter, William S. Nelson
  • Patent number: 6898738
    Abstract: Cache memory, and thus computer system, reliability is increased by duplicating cache tag entries. Each cache tag has a primary entry and a duplicate entry. Then, when cache tags are associatively searched, both the primary and the duplicate entry are compared to the search value. At the same time, they are also parity checked and compared against each other. If a match is made on either the primary entry or the duplicate entry, and that entry does not have a parity error, a cache “hit” is indicated. All single bit cache tag parity errors are detected and compensated for. Almost all multiple bit cache tag parity errors are detected.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: May 24, 2005
    Assignee: Bull HN Information Systems Inc.
    Inventors: Charles P. Ryan, William A. Shelly, Stephen A. Schuerich
  • Patent number: 6883121
    Abstract: A system and method for enhancing the integrity of a system which uses a high performance, low assurance, general purpose microprocessor to execute an avionics software application and uses a high assurance, low performance microprocessor to monitor the output of the general purpose microprocessor, without the need for comparison of outputs from parallel processors executing functionally equivalent versions of the avionics software application. The monitoring microprocessor is used to analyze state transitions of the first microprocessor and to analyze the computed values output by said general purpose microprocessor, against predetermined limitations based upon aircraft limitations.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: April 19, 2005
    Assignee: Rockwell Collins
    Inventors: David W. Jensen, Steven E. Koenck
  • Patent number: 6883170
    Abstract: A method of maintaining a hierarchy of application objects commences with the automatic detection of the exit of a process of a child application object in an unexpected manner. Responsive to the detected exit, a grandchild application object, launched by the child application object, is automatically terminated. An attempt is then made to restart the child application object. The outcome of the restart of the child application object is reported to a parent application object that launched the child application object.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: April 19, 2005
    Assignee: Aspect Communication Corporation
    Inventor: Kevin Garcia
  • Patent number: 6868484
    Abstract: A cache includes an error circuit for detecting errors in the replacement data. If an error is detected, the cache may update the replacement data to eliminate the error. For example, a predetermined, fixed value may be used for the update of the replacement data. Each of the cache entries corresponding to the replacement data may be represented in the fixed value. In one embodiment, the error circuit may detect errors in the replacement data using only the replacement data (e.g. no parity or ECC information may be used). In this manner, errors may be detected even in the presence of multiple bit errors which may not be detectable using parity/ECC checking.
    Type: Grant
    Filed: April 10, 2003
    Date of Patent: March 15, 2005
    Assignee: Broadcom Corporation
    Inventor: Erik P. Supnet
  • Patent number: 6832346
    Abstract: System and method for managing and communicating state changes of a complex system. The system includes a plurality of configuration items, wherein each configuration item is a functional component of the system and has an associated state value that is one of a set of state values describing operational characteristics of the configuration item. A data structure that represents transitions between the state values is constructed in each of the configuration items. Each of the configuration items receives notification requests that include a first set of state values, a second set of state values, a requester identifier, and a message value. The requester identifier and message value of each notification request are associated with a transition of the configuration item for a transition from a state in the first set of state values to a state value in the second set of state values.
    Type: Grant
    Filed: April 13, 2001
    Date of Patent: December 14, 2004
    Assignee: Lockheed Martin Corporation
    Inventor: Joseph K. Cross
  • Patent number: 6829767
    Abstract: A method, system and computer readable instructions for executing a file with a file format is provided. An attempt is made to execute the file with a first computer application within a plurality of computer applications. Responsive to the first computer application being unable to recognize the file format of the file, a second computer application within the plurality of computer applications is selected to execute the file. The file is then executed using the selected second computer application.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: December 7, 2004
    Assignee: International Business Machines Corporation
    Inventors: Matthew Slade Cronk, Gerald Francis McBrearty, Johnny Meng-Han Shieh, Michael William Wortman
  • Patent number: 6810020
    Abstract: Disclosed is an apparatus for measuring a bit error rate (BER) in an orthogonal frequency division multiplexing (OFDM) communication system. A transmitter includes a pilot pattern inserter for inserting a first reference pilot pattern in subchannels of input data, and an OFDM modulator for OFDM-modulating the reference pilot pattern-inserted transmission data. A receiver includes a pilot pattern detector for OFDM-demodulating a data symbol received in a frame unit and detecting only a pilot pattern, and a BER operator for comparing the demodulated pilot pattern with a second reference pilot pattern, detecting and accumulating the number of pilot errors, and measuring a bit error rate by dividing the accumulated number of the pilot errors by the number of total received pilot patterns.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: October 26, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Ee Cho, Ho Kim, Jong-Hyeon Park
  • Patent number: 6804798
    Abstract: A method for setting new values for configuration parameters on a device having cache memory and permanent memory, and using a transaction manager having a plurality of error checks selectively designated to respective configuration parameters, including the steps of providing a new value for a configuration parameter, determining an error check designated to each configuration parameter provided with the new value, performing the an error check determined for each the configuration parameter, setting the new value for the configuration parameter in the cache memory of the device, determining whether the new value is being committed to the device, and saving the new value from the cache memory to the permanent memory when the new value is being committed to the device.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: October 12, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Biswaroop Guha, Jim Branen
  • Patent number: 6801937
    Abstract: Various components are provided to manage a clustered environment. These components include a System Registry that provides a global data storage; a Configuration manager that stores data locally on nodes of the clustered environment and globally within the System Registry; a Liveness component to provide status of communications paths of the cluster; a Group Services component that provides services to one or more other components of the clustered environment; and a Resource Management component that communicates with one or more resource controllers of the clustered environment. Each of the components of the clustered environment has one or more data and/or functional dependencies on one or more other components of the environment. However, relationships between the components are created such that the data and functional dependencies form an acyclic graph (i.e., a cycle of dependency relationships is avoided).
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: October 5, 2004
    Assignee: International Business Machines Corporation
    Inventors: Marcos N. Novaes, Gregory D. Laib, Jeffrey S. Lucash, Ronald T. Goering, George Sohos
  • Patent number: 6799285
    Abstract: A method and apparatus for a self-checking multi-threaded processor includes a first thread for generating a first I/O request; a second thread for generating a second I/O request; and a self-checking component for comparing the first I/O request and second I/O request. Processor operation is selectively suspended based on the comparison of the first I/O request and the second I/O request. The self-checking multi-threaded processor may include a third thread for generating a third I/O request; the self-checking component may compare the I/O requests of the first thread, the second thread, and the third thread; and processor operation may selectively continue with issuance if at least two the first I/O request, the second I/O request, and the third I/O request match. The second thread may begin processing to generate the second I/O request upon the generation of the first I/O request by the first thread.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: September 28, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Kenneth A. Okin
  • Patent number: 6792560
    Abstract: A dataflow processor comprising a combiner for combining instructions and data, processing elements for carrying out the instructions, has error checking at the inputs to the processing elements and the combiner, and has self-checking circuitry for these parts. The amount of circuitry which needs to be trusted, (i.e. of proven design, and verified operation) can be advantageously limited. This enables the processor to be constructed more simply and to operate faster. The processing elements may have a series of state machines, each checking the output of the previous. Self checking circuitry may be constructed using combinations of basic configurable verified circuit. This circuit has a reversible Boolean function, and other circuitry to check its output. The other circuitry has a second reversible Boolean function for regenerating the original inputs, and a comparator for verifying if the regenerated values match the original values.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: September 14, 2004
    Assignee: Nortel Networks Limited
    Inventors: Patrick J Francis, Richard Charles John Hicks
  • Patent number: 6785847
    Abstract: Aspects for soft error detection for a superscalar microprocessor are described. The aspects include a first pipeline, the first pipeline including a first arithmetic logic unit, ALU, comparator and a first general purpose register, GPR, for storing first data, and a second pipeline, the second pipeline including a second GPR and a second ALU comparator, the second GPR for storing second data, the second data being a copy of the first data. A detection system utilizes one of the first and second ALU comparators to perform a comparison of the second data with the first data during an idle state of the first and second pipelines.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: August 31, 2004
    Assignee: International Business Machines Corporation
    Inventors: Paul J. Jordan, Peter J. Klim
  • Patent number: 6779138
    Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: August 17, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
  • Patent number: 6763517
    Abstract: A computerized method for automatically analyzing a core file created by a computer system after an unexpected interrupt. The packages installed on the computer system are determined and patch files of descriptive data for previously identified patches are accessed to create a patch search set including patches configured for use with the installed packages. Patches in the patch search set are scored by assigning points to each patch based on scoring rules, e.g., searching the patch descriptive data for matches between portions of the patch descriptive data and portions of the core file, including bug descriptions. For UNIX™-based kernel core files, the scoring rules involve creating search criteria based on panic types and on panic metric data gathered from the core file. A detailed patch search report is created providing recommendations for each of the scored patches based on the assigned score and identifying patches for installation.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: July 13, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: George W. Hines
  • Patent number: 6757845
    Abstract: The present invention pertains to a method of writing test data in a memory space within a memory store and includes: generating a header having an address representing the location of the memory space in the memory store, and a seed value; generating test data using the seed value; and storing the header and the test data in the memory space. Another embodiment of the present invention pertains to a method of testing a memory space within a memory store that includes: generating a header having an address representing the location of the memory space in the memory store, and a seed value; generating a set of values using the seed value; storing the header and the set of values in the memory space; retrieving data from the memory space; generating a new seed value using the set of values; and comparing the new seed value with the seed value.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: June 29, 2004
    Assignee: BiTMICRO Networks, Inc.
    Inventor: Ross H. Bruce
  • Patent number: 6751756
    Abstract: A system and method for selectively injecting parity errors into instructions of a data processing system when the instructions are copied from a read buffer to a first level cache. The parity errors are selectively injected according to programmable indicators, each programmable indicator being associated with one or more instructions stored in the read buffer. The error-injection system also includes programmable operating modes whereby error injection will occur during, for example, every copy back from the read buffer to the first level cache, or alternatively, during only a selected copy back sequence. The system allows for comprehensive testing of error detection and recovery logic in an instruction processor, and further allows for comprehensive testing of the logic associated with performing a data re-fetch from a second level cache or storage device.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: June 15, 2004
    Assignee: Unisys Corporation
    Inventors: Thomas D. Hartnett, John Steven Kuslak, Douglas A. Fuller
  • Patent number: 6745350
    Abstract: A method, apparatus, and article of manufacture for failure recovery in a computer network. The invention provides a system monitor that allows a process to register itself for monitoring and dictate a failure recovery mechanism if the process terminates abnormally. The system monitor according to the present invention continuously monitors the process and detects when the process abnormally terminates. A failure recovery mechanism is then executed. The failure recovery mechanism includes the execution of an executable, a command line script or the starting of a service. These actions allow virtually any failure recovery scenario such as re-starting the failed process, cleaning up after the failed process, notifying other processes of the failure, or sending a notification of the failure.
    Type: Grant
    Filed: January 3, 1997
    Date of Patent: June 1, 2004
    Assignee: NCR Corporation
    Inventors: Owen R. Cline, Craig J. Hubbell, Vinodkumar M. Jessani
  • Publication number: 20040088608
    Abstract: The system and method described herein automatically detect various corruptions in a file system and notify a system administrator of the corruption. Detailed information on the file system is collected by a probe process. If the file system is corrupt or inaccessible, the system and method marks the file system as bad, notifies the system administrator and then ceases to attempt to collect information on that system again until it has been repaired.
    Type: Application
    Filed: October 31, 2002
    Publication date: May 6, 2004
    Inventors: Liem M. Nguyen, Thomas Vachuska, Fengliang Hu
  • Patent number: 6728909
    Abstract: A multiprocessor or clustered system with processing elements communicatively interconnected transmits and receives data in the form of message packets. Certain of the message packets are either responding to earlier requests with the data, or are requests that the data of the packet be written at the destination. Each message packet has an initial portion that includes information about the packet, including what the data is carrying (i.e., data in response to an earlier request, or data to be written), the source and ultimate destination of the message packet. This information prevents errant data being written at the destination by determining if the source has “permission” to send such data to the destination. When a message packet carrying data is received, processing of the packet is started in parallel with continued reception of the data it carries by using the information contained in the initial portion to check the permissions.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: April 27, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: William P. Bunton, David A. Brown, John C. Krause, Charles E. Peet
  • Patent number: 6728949
    Abstract: A method and system for monitoring execution performance of a program is provided. Profiling functionality may be qualified by setting various qualifying flags at the request of a user. These qualifying flags may be used to limit the amount of trace data being generated or processed, thereby providing a more focused picture of an application's execution to the user. One or more trace,qualifying conditions are selectable by a user and are used during a profiling phase of application execution or during a post-processing phase of analyzing the application execution. During a profiling phase, an occurrence of a selected event or a timer interrupt is detected, and a determination is made as to whether a trace qualifying condition has been previously selected. In response to a determination that a trace qualifying condition has been selected, a trace record is then generated.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: April 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Raymond Morris Bryant, Frank Eliot Levine
  • Patent number: 6718497
    Abstract: The present invention provides a method for generating random jitter test patterns by generating a sequence of maximum-size asynchronous packets according to the P1394b standard and transmitting the sequence to the device under test. The present invention provides a method for generating jitter test patterns by disabling the transmitter data scrambler of the second device; clearing the port_error register of the device under test; and sending a test pattern to said device under test. The present invention provides for a method for generating supply noise test patterns comprising: transmitting a test pattern to the DUT comprising a maximum length asynchronous packet containing alternate 0016 and FF16 bytes.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: April 6, 2004
    Assignee: Apple Computer, Inc.
    Inventor: Colin Whitby-Strevens
  • Patent number: 6715104
    Abstract: A system for accessing a memory organized in memorization subsystems or memory blocks, e.g. standard Dual In-line Memory Modules, wherein the words to be stored are split into unitary elements so that several memorization subsystems are used to store one word and its associated Block Error Code (BEC) bits, is disclosed. The system includes a detector to detect a failure within a memorization subsystem. Insulator that are associated to each memorization subsystem insulate the failed memory block, and a new memorization subsystem is accessed in lieu of the failed one thanks to identification device which determine an available unfailed memory block. The user may replace the failed memory block without shutting down the memory device.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: March 30, 2004
    Assignee: International Business Machines Corporation
    Inventors: Ghislain Imbert de Tremiolles, Philippe Klein
  • Patent number: 6665675
    Abstract: A system is disclosed having shared storage nodes and a number of processing nodes coupled to the shared storage nodes. The storage nodes are to store user data and file system meta-data (FSMD) and can be accessed by the processing nodes. Each respective processing node stores a copy of the FSMD, and can update its copy of the FSMD based upon content of a token received from one of the processing nodes. The processing node adds information to the token that describes a change that node makes to the copy of the FSMD, and then sends the token to another one of the processing nodes. Such a scheme may prove to be a more scalable solution for a shared file system as the number of processing nodes are increased, because the overhead associated with managing the meta-data does not significantly diminish the performance of the storage system as a whole.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: December 16, 2003
    Assignee: Omneon Video Networks
    Inventor: Alexandru Mitaru
  • Patent number: 6658501
    Abstract: In a printer that is connected to a host personal computer via an external recording device through parallel interfaces, a signal that has been received from the host personal computer is detected by an ASIC at specified sampling cycles and to allow an interrupt in case it is detected that this signal is a signal for instructing start of communication; in case the interrupt has been made while printing actions are being executed, a CPU notifies the host personal computer of a busy condition; in case no response is given from the host personal computer, the signal for instructing start of communication is invalidated. With this arrangement, it is made possible to accurately detect whether a received signal is correct or not and malfunctions owing to incorrect signals leaking out from the external recording device to the printer can be prevented.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: December 2, 2003
    Assignees: Funai Electronic Co., Ltd., Funai Techno-Systems Co.
    Inventors: Takashi Hirano, Yoshitaka Kataoka
  • Patent number: 6631397
    Abstract: In an information registration method of assigning a code to information and registering the information, information, a predetermined code assigned to the information, the first valid dates of the predetermined code, and the second valid dates of the information which are linked to each other are registered. This information registration method prevents any disadvantage due the valid dates of information having a code.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: October 7, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Satomi, Akihiro Masukawa, Kenji Kasai, Shinji Fukunaga, Atsushi Inoue, Kosuke Ito, Jiro Izumi
  • Patent number: 6629271
    Abstract: A computer processor includes a replay system to replay instructions which have not executed properly and a first event pipeline coupled to the replay system to process instructions including any replayed instructions. A second event pipeline is provided to perform additional processing on an instruction. The second event pipeline has an ability to detect one or more faults occurring therein. The processor also includes a synchronization circuit coupled between the first event pipeline and the second event pipeline to synchronize faults occurring in the second event pipeline to matching instruction entries in the first event pipeline.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: September 30, 2003
    Assignee: Intel Corporation
    Inventors: Yung-Hsiang Lee, Douglas M. Carmean, Rohit A. Vidwans
  • Patent number: 6598078
    Abstract: A method of constructing a record utilizing information contained in an information stream sent from a detection device that monitors a transaction processing system, to a reporting device, commences with the detection of an expiration of a predetermined time interval with respect to the detection device. A time delimiter is then inserted into the information stream propagated from the detection device to the reporting device. The time delimiter indicates the expiration of predetermined time interval with respect to the detection device. Information derived from the instruction stream is assimilated into a record at the reporting entity. Time delimiters in the instruction stream are utilized to measure, at the reporting device, the expiration of the predetermined time interval at the detection device.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: July 22, 2003
    Assignee: Aspect Communications Corporation
    Inventors: Jason Ehrlich, Rajeev D. Pitre, David L. Burns
  • Patent number: 6594686
    Abstract: The invention provides for on-access scanning of archives, such as “ZIP” files, for files containing viruses or other unwanted characteristics. In particular, disclosed are various techniques for beginning a scanning operation, and then monitoring the scanning operation to determine whether it is completing in a reasonable time. If the scanning operation is taking place within a terminal server type of environment, such as the Microsoft Terminal Server, where an application program is run in a virtual execution environment, then provision is made to identify client connections to the server so that error messages (such as denying file access due to a virus) can be presented to a terminal server client's terminal, rather than at the terminal server console.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: July 15, 2003
    Assignee: Network Associates Technology, Inc.
    Inventors: Jonathan Edwards, Edmund White
  • Patent number: 6591380
    Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.
    Type: Grant
    Filed: December 6, 1999
    Date of Patent: July 8, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
  • Publication number: 20030115513
    Abstract: A point-to-point interconnection and communication architecture, protocol and related methods is presented.
    Type: Application
    Filed: September 30, 2001
    Publication date: June 19, 2003
    Inventors: David Harriman, Jasmin Ajanovic, Buck Gremel
  • Patent number: 6581156
    Abstract: A method for recording the data state in a data processing system when an exceptional situation determined by prescribed characteristics is reached for a triggering program in the data processing system. For this purpose, at least one relevant data set which is at least indirectly affected by an access operation by the triggering program and is intended for subsequently deducing the circumstances leading to the exceptional situation is selected on the basis of a prescribed rule, and a recording copy of the content of the at least one relevant data set is then created in a form which permits transfer to another data processing system independently of the triggering program.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: June 17, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventor: Roland Meyer