Within Single Memory Device (e.g., Disk, Etc.) Patents (Class 714/6.11)
  • Patent number: 10558520
    Abstract: Systems and methods are provided for detecting and correcting address errors in a memory system. In the memory system, a memory device generates an error-detection code based on an address transmitted via an address bus and transmits the error-detection code to a memory controller. The memory controller transmits an error indication to the memory device in response to the error-detection code. The error indication causes the memory device to remove the received address and prevent a memory operation.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: February 11, 2020
    Assignee: Rambus Inc.
    Inventors: Ian Shaeffer, Craig E. Hampel
  • Patent number: 10552263
    Abstract: A system running method applied to an intelligent terminal is provided. The intelligent terminal includes a first system and a second system. The second system can implement a call function and/or a short message service function, and a function that can be implemented by the first system includes a function that can be implemented by the second system. The method includes: starting the first system and the second system, where an operation screen of the first system is visible to a user; detecting a running status of the first system; and when it is detected that the first system is faulty, terminating running of the first system, and switching to an operation screen of the second system disclosure.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: February 4, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xun Zhang, Laifa Zhang, Yakun Wang
  • Patent number: 10489248
    Abstract: A snapshot is received at the MDS from a backup storage location at a point-in-time subsequent to taking the snapshot, wherein the MDS comprises a map identifying an object store location for a plurality of data objects and a queue identifying individuals of the plurality of data objects that only reside on the transient object store. Individuals of the plurality of data objects identified in the queue are located on the distributed file system. The map is updated to identify the object store location for the individuals of the plurality of data objects identified in the queue.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: November 26, 2019
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Shrinand Javadekar, Vijay Panghal, Deepti Chheda
  • Patent number: 10452494
    Abstract: Techniques are disclosed for performing storage object recovery. In one embodiment, there is disclosed a technique comprising allocating a scratch space to support recovery of a storage object, wherein the storage object comprises a set of slices and the scratch space is distinct with respect to the set of slices such that a slice allocator for allocating slices to and/or from the storage object is unaware of the existence of the scratch space. The technique also comprises taking offline the storage object for facilitating recovery of the storage object after at least a portion of the set of slices have been allocated. The technique further comprises performing a storage object recovery procedure to recover the storage object while the storage object is offline. The storage object recovery procedure utilizing the scratch space that was allocated to support the storage object recovery.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: October 22, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Samuel L. Mullis, II, Charles Christopher Bailey, Miles Aram DeForest
  • Patent number: 10318379
    Abstract: A decoding method is provided according to an exemplary embodiment. The method includes: reading first data and second data from a rewritable non-volatile memory module according to a read command; generating a re-read data set if a default decoding operation performed for the first data and the second data respectively fails; reading a to-be-decoded data set from the rewritable non-volatile memory module according to the re-read data set, and performing a first decoding operation for the first data based on the to-be-decoded data set; removing identification information corresponding to the second data from the re-read data set and storing the corrected second data if the second data is corrected in the first decode operation; and transmitting the corrected first data and the corrected second data to a host system.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: June 11, 2019
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Luong Khon
  • Patent number: 10289487
    Abstract: A method for accessing a flash memory module is provided. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least a first super block and at least a second super block of the flash memory chips; and allocating the second super block to store a plurality of temporary parities generated when data is written into the first super block.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: May 14, 2019
    Assignee: Silicon Motion Inc.
    Inventors: Tsung-Chieh Yang, Hong-Jung Hsu
  • Patent number: 10255775
    Abstract: Motion or event detection and notification devices and methods are disclosed. Motion or event detection information can be processed and interfaced with in order to facilitate system functionality. In an embodiment, a unique ID can be utilized to identify a recipient of an alert. Unique IDs can correspond to different users or devices of a motion or event detection system. In some embodiments, information relating to the detection can be relayed to a user of the system. That information can take on different forms, including basic information such as a simple notification or other forms such as a live feed of the event. The ability to implement such a system can allow for increased security for an area or increased peace-of-mind for a user or monitor of the system.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: April 9, 2019
    Assignee: BITWAVE PTE LTD.
    Inventors: Siew Kok Hui, Eng Sui Tan, Man Tuck Pang
  • Patent number: 10248502
    Abstract: In an example, a method of correcting an error in a memory device includes determining a temperature profile associated with a region of a memory device. The temperature profile is one of a plurality of temperature profiles each associated with a respective region of a plurality of regions of the memory device. The method includes determining a correction capability based on the thermal profile. The method also includes correcting an error in the memory region using the determined correction capability.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: April 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Diyanesh B. Chinnakkonda Vidyapoornachary, Vijay Anand Mathiyalagan, Gary A. Tressler
  • Patent number: 10248594
    Abstract: The present disclosure is related to programming interruption management. An apparatus can be configured to detect an interruption during a programming operation and modify the programming operation to program a portion of the memory array to an uncorrectable state in response to detecting the interruption.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: April 2, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Preston A. Thomson, Kishore K. Muchherla, Sampath K. Ratnam
  • Patent number: 10229021
    Abstract: Virtual first logical volumes are provided to a host, a virtual second logical volume correlated with any one of the first logical volumes is created in a storage node in correlation with a storage control module disposed in the storage node, a correspondence relationship between the first and second logical volumes is managed as mapping information, a storage node which is an assigning distribution of an I/O request is specified on the basis of the mapping information in a case where the I/O request in which the first logical volume is designated as an I/O destination is given from the host, the I/O request is assigned to the storage control module of its own node in a case where the specified storage node is its own node, and the I/O request is assigned to another storage node in a case where the specified storage node is another storage node.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: March 12, 2019
    Assignee: HITACHI, LTD.
    Inventors: Kouji Iwamitsu, Takuya Ogusu, Keisuke Suzuki, Masayuki Gomyo, Shinri Inoue
  • Patent number: 10191790
    Abstract: A data storage device includes a nonvolatile memory device including a memory block having a plurality of memory regions; and a controller suitable for searching a first memory region for which error correction is passed, by scanning the plurality of memory regions in a reverse order of a write sequence for the memory block, determining a target memory region in the memory block based on data stored in the first memory region, and performing a recovery operation for the target memory region.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: January 29, 2019
    Assignee: SK Hynix Inc.
    Inventor: Ik Joon Son
  • Patent number: 10156997
    Abstract: A data storage device includes a nonvolatile memory device including a memory region, the memory region including a plurality of memory units; and a controller suitable for monitoring an elapsed time and a write count of the memory region, and performing a wear leveling operation for at least one memory unit selected among the plurality of memory units depending on a monitoring result.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: December 18, 2018
    Assignee: SK Hynix Inc.
    Inventor: Soo Hong Ahn
  • Patent number: 10157015
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a service processor. The service processor loads a primary copy of a collection of environment variables from a storage device of the service processor. The service processor determines whether the primary copy is integral. The service processor, in response to a determination that the primary copy is not integral: loads a backup copy of the collection of environment variables from the storage device, determines whether the backup copy is integral, and boots an operating system with the collection of environment variables of the backup copy in response to a determination that the backup copy is integral.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: December 18, 2018
    Assignee: AMERICAN MEGATRENDS, INC.
    Inventors: Venkatesan Balakrishnan, Prakash Shanmugakani, Balasubramanian Chandrasekaran, Manikandan Ganesan Malliga
  • Patent number: 9984731
    Abstract: According to one embodiment, a storage device includes a plurality of nonvolatile semiconductor memories, a sensor and a controller. The sensor is configured to measure a temperature of the nonvolatile semiconductor memories. The controller is configured to receive data from a host, determine a rewriting interval of the data and write the data to, of the nonvolatile semiconductor memories, a nonvolatile semiconductor memory having a temperature corresponding to the rewriting interval.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: May 29, 2018
    Assignee: Toshiba Memory Corporation
    Inventor: Masahiro Kiyooka
  • Patent number: 9983933
    Abstract: Embodiments include accelerating capture of a system dump at system failure in a computer system. A method includes capturing a system snapshot that includes data from real memory frames of the computer system and storing the system snapshot in a storage. The method also includes monitoring periodically a change between the data in the system snapshot and a current state of the real memory frames of the computer system and updating the system snapshot according to the changed real memory frames based on a rate of change of the real memory frames. Further, in response to encountering the system failure, the snapshot is updated based on a delta between the system snapshot and the current state of the real memory frames. The snapshot on the storage is used as the system dump. The present document further describes examples of other aspects such as systems, computer products.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Deborah A. Furman, Andrew C. M. Hicks
  • Patent number: 9983934
    Abstract: Embodiments include accelerating capture of a system dump at system failure in a computer system. A method includes capturing a system snapshot that includes data from real memory frames of the computer system and storing the system snapshot in a storage. The method also includes monitoring periodically a change between the data in the system snapshot and a current state of the real memory frames of the computer system and updating the system snapshot according to the changed real memory frames based on a rate of change of the real memory frames. Further, in response to encountering the system failure, the snapshot is updated based on a delta between the system snapshot and the current state of the real memory frames. The snapshot on the storage is used as the system dump. The present document further describes examples of other aspects such as systems, computer products.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Deborah A. Furman, Andrew C. M. Hicks
  • Patent number: 9973880
    Abstract: A communication device includes a wireless communication unit, a memory and a processor. The wireless communication unit is configured to perform wireless communication with an information display device. The processor is configured to perform operations including: receiving first work data including first setting data from the information display device having the first work data by the wireless communication unit; and registering the first work data as storage data in a case where the memory stores second work data including second setting data and in a case where the first setting data and the second setting data are different from each other.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: May 15, 2018
    Assignee: CASIO COMPUTER CO., LTD.
    Inventor: Toshiaki Tanaka
  • Patent number: 9940208
    Abstract: Embodiments relate to systems and methods for generating a reverse installation file for network restoration. A set of managed machines, such as personal computers or servers, can be managed by a network management engine communicating with the machines via a secure channel. The network management engine can scan the managed network for kickstart, or provisioning answer files, that were used to install software to network nodes at a prior time. The network management engine can access the original kickstart file, and update that file to reflect a current state of the associated machine by inserting user-supplied updates, storage configuration updates, security credentials, and/or other data. Upon a crash or other malfunction of the associated machine, the network management platform can access the reverse kickstart file and generate a restoration of that node to a current state from the reverse kickstart data.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: April 10, 2018
    Assignee: Red Hat, Inc.
    Inventors: Michael Paul DeHaan, Adrian Karstan Likins, Seth Kelby Vidal
  • Patent number: 9921927
    Abstract: A primary system includes a first node and a second node that backs up the first node. A secondary system includes a third node and a fourth node that backs up the third node. The first node transmits data update information generated in response to a data update in the first node, to the second node and the third node. The fourth node determines a degree of progress in transactions indicated by data update information obtained through the second node and a degree of progress in transactions indicated by data update information obtained through the third node, identifies data update information indicating a further progressed transaction, and reflects the data update information in stored data of the fourth node.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: March 20, 2018
    Assignee: Fujitsu Limited
    Inventors: Yasuki Yoshihashi, Tomoaki Mizoo, Toshirou Ono
  • Patent number: 9910735
    Abstract: In one embodiment, a method includes generating a crash-consistent snapshot of a volume at a first point-in-time, mounting the snapshot to a host, running an application to access the snapshot, running an integrity tool to identify and repair a defect with the snapshot to form a modified snapshot and shutting down the application to form an application-consistent snapshot of the volume.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: March 6, 2018
    Assignee: EMC IP Holding Company LLC
    Inventor: Assaf Natanzon
  • Patent number: 9886359
    Abstract: A primary system includes a first node and a second node that backs up the first node. A secondary system includes a third node and a fourth node that backs up the third node. The first node in the primary system inserts, when transmitting data update information generated in response to a data update in the first node to the second node and the third node, one or a plurality of pieces of delimiter information indicating a boundary between update processing units, into both of transmit data. The fourth node in the secondary system specifies, based on the delimiter information, the data update information including update information whose process has progressed further from among the data update information obtained from the second node and the data update information obtained through the third node, and reflects the specified data update information to stored data of the fourth node.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: February 6, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Tomoaki Mizoo, Toshirou Ono
  • Patent number: 9842028
    Abstract: There is disclosed a computer-implemented method, an apparatus, and a computer program product for use in storage object recovery. In one embodiment, the method comprises determining that a storage object requires recovery, wherein the storage object comprises a dedicated recovery area at a fixed location. The method further comprises taking offline the storage object in response to determining that the storage object requires recovery. The method still further comprises performing a recovery procedure to recover the storage object, the recovery procedure utilizing the dedicated recovery area to support storage object recovery.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: December 12, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Samuel L. Mullis, II, Charles Christopher Bailey, Miles Aram DeForest
  • Patent number: 9792071
    Abstract: A memory system or flash card includes a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects can be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements are used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements leads to improved memory management and data management. That action includes calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: October 17, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Sergey Anatolievich Gorobets, Neil Richard Darragh, Liam Michael Parker
  • Patent number: 9778986
    Abstract: The storage system according to the present invention comprises a controller, and multiple storage device constituting a RAID group. When storing write data to multiple discontinuous areas within stripes of a storage device, the storage system transmits a new data transmission command containing information for specifying the multiple discontinuous areas and a write data to the storage device, and thereafter, receives an intermediate parity generated from multiple write data and data before update of the multiple write data from the storage device, and then transmits the received intermediate parity and an intermediate parity transmission command to the storage device storing the parity.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: October 3, 2017
    Assignee: HITACHI, LTD.
    Inventors: Tomohiro Yoshihara, Akira Yamamoto, Shigeo Homma, Junji Ogawa
  • Patent number: 9612893
    Abstract: In some embodiments, a circuit may include a plurality of peripherals and a peripheral watchdog timer circuit coupled to at least one of the plurality of peripherals. The peripheral watchdog timer circuit may be configured to count clock cycles and concurrently to detect activity associated with at least one of the plurality of peripherals. The peripheral watchdog timer circuit may be configured to reset a count in response to detecting the activity. In some embodiments, the peripheral watchdog timer circuit may be configured to generate an alert signal when the count exceeds a threshold count before detecting the activity. In some embodiments, the peripheral watchdog timer circuit is configured to initiate a reset operation when the alert is not serviced within a period of time.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: April 4, 2017
    Assignee: Silicon Laboratories Inc.
    Inventor: Thomas Saroshan David
  • Patent number: 9595343
    Abstract: A storage device includes multiple memory cells and storage circuitry. The storage circuitry is configured to write data to a group of the memory cells by applying to the group of the memory cells up to a maximal number of programming pulses. The storage circuitry is further configured to evaluate, after applying less than the maximal number of programming pulses, a criterion that predicts whether or not the data will be written successfully within the maximal number of programming pulses, and when the criterion predicts that writing the data will fail, to perform a corrective operation.
    Type: Grant
    Filed: June 5, 2016
    Date of Patent: March 14, 2017
    Assignee: APPLE INC.
    Inventors: Charan Srinivasan, Eyal Gurgi
  • Patent number: 9552263
    Abstract: A method for dynamically changing system recovery actions based on system load. The method includes measuring a value of a workload characteristic of a computer system over a period of time, detecting an error in the computer system, determining a workload level of the computer system, and selecting a set of error recovery actions in response to the system workload analysis module determining the workload level of the computer system. A workload characteristic defines a type of work performed by the computer system. A workload level can be based on user defined parameters or a measurement of the value of one or more workload characteristics.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: January 24, 2017
    Assignee: International Business Machines Corporation
    Inventors: Herve G. P. Andre, Mark E. Hack, Larry Juarez, Todd C. Sorenson
  • Patent number: 9501546
    Abstract: Systems and methods are provided for a data management virtualization display. A set of services is stored that includes a set of user interfaces. Each service can communicate with the remaining services using a shared services cache. A request is received to perform a data management virtualization job that, without knowledge of a profile associated with the data management virtualization system, the set of subsystems, or both, would require a user of the data management virtualization system to manually navigate through a sequence of webpages across two or more services in the set of services. A quick link for the data management virtualization job is defined based on the profile associated with the data management virtualization system, the set of subsystems, or both, using the shared services cache, wherein the quick link eliminates one or more of the manual navigations of the data management virtualization job.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: November 22, 2016
    Assignee: Actifio, Inc.
    Inventors: Ankur Bhargava, Sean B. Walter
  • Patent number: 9503436
    Abstract: One embodiment is a system, comprising a first NAS device, a second NAS device. The first and second NAS devices may be configured to be paired with one another to enable an ongoing secure exchange of content (e.g., files, pictures, movies, audio recordings) and NAS settings (e.g., RAID settings, backup schedules, etc.) between the first and second NAS devices across a network. According to one embodiment, through this ongoing secure exchange of content and NAS settings, the second NAS device may become and may be thereafter maintained as a mirror of the first NAS device, such that the second NAS device may be maintained as a drop-in physical and functional replacement for the first NAS device in the event of a failure of the first NAS device.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: November 22, 2016
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: John Murphy, Daniel J. Wade
  • Patent number: 9460796
    Abstract: Disclosed is a memory system and a method of programming a multi-bit flash memory device which includes memory cells configured to store multi-bit data, where the method includes and the system is configured for determining whether data to be stored in a selected memory cell is an LSB data; and if data to be stored in a selected memory cell is not an LSB data, backing up lower data stored in the selected memory cell to a backup memory block of the multi-bit flash memory device.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: October 4, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Ho Jang, In-Hwan Choi, Woon-Jae Chung, Song-Ho Yoon, Kyung-Wook Ye
  • Patent number: 9436405
    Abstract: Systems and methods are described for logical partitioning of library resources (e.g., storage media resources and/or media drive resources in storage libraries) across a complex of multiple, physically distinct, but logically interconnected data storage libraries. For example, a user selects complex-wide resources to add to one or more library partitions via a graphical user interface displayed on a local console of one of the storage library systems. The partitions can be validated and converted into a partition definition. In some implementations, the partition definition is redundantly stored as a predefined short format in local storage of some or all the storage library systems in the complex. This can minimize the resources used to store the partition definition, provide redundancy for added configuration options and/or in case of certain failures, speed up processing of resource queries, and/or provide other features.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: September 6, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Hyoungjin Kim, Alexander Edward Amador, Stephanie Lynn Russell
  • Patent number: 9431055
    Abstract: A method includes a processing module receiving data to store and determining error coding dispersal storage function parameters based on an error profile of one or more hard drives. The method continues with the processing module encoding at least a portion of the data in accordance with the error coding dispersal storage function parameters to produce a set of data slices. The method continues with the processing module defining addressable storage sectors within the one or more hard drives based on a number of data slices within the set of data slices to produce a set of addressable storage sectors. The method continues with the processing module storing data slices of the set of data slices in corresponding addressable storage sectors of the set of addressable storage sectors.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: August 30, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: S. Christopher Gladwin, Gary W. Grube, Timothy W. Markison
  • Patent number: 9420034
    Abstract: A method, system and computer program product for providing a service to multiple tenants of an application. Responsive to receiving from a client of a tenant a request, a tenant context of the tenant is bound to the request. With respect to an access to an isolation point of the application in the request, the access to the isolation point is redirected to a partition based on the tenant context bound to the request. The partition may be pre-established for the tenant with respect to the application. Hence, it is possible to provide a multi-tenant solution in a convenient, fast, and cost-effective way, and, in turn, to achieve resource sharing to a greater extent and enhance the resource efficiency.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: August 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Hong Cai, Jun Jie Cai, Wei Gong, Lin Quan Jiang, Jing Lv, Xin Sheng Mao, Heng Wang, Hai Hong Xu, Ke Zhang, Min Jun Zhou
  • Patent number: 9397106
    Abstract: A method of producing a Macro Read Only Memory (MROM) memory based on a One Time Programmable (OTP) memory is provided. The method includes: removing a floating gate of a second P-type Metal Oxide Semiconductor (PMOS) transistor of an OTP memory cell for storing data “0” in an OTP memory map, such that the OTP memory cell being transferred to a MROM memory cell for storing data “0”, and retaining an original structure of the OTP memory cell for storing data “1” in the OTP memory map, such that the original structure being used as a MROM memory cell for storing data “1”, thus forming a MROM memory map; and producing a MROM memory according to a MROM memory map. The OTP memory map is debugged to determine data which can be changed into the MROM memory map, and an OTP process can be transferred into a MROM process by adjusting only one mask during a producing process.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: July 19, 2016
    Assignee: CSMC TECHNOLOGIES FABI CO., LTD.
    Inventor: Shuming Guo
  • Patent number: 9384409
    Abstract: A word segmentation method uses a recursive technique to segment a text line image into word segments. Spacing segments of the line are obtained; an initial word segmentation is performed to classify the spacing segments based on their lengths into candidate character spacing segments and candidate word spacing segments. The initial segmentation result is evaluated to determine whether the candidate character spacing segments still have a bimodal or multi-modal distribution or a large spread in the distribution, or whether the line contains long words and too few words. If the conditions indicate that the initial segmentation is inadequate, another classification step is performed for the candidate character spacing segments to further classify them into new candidate character spacing segments and new candidate word spacing segments. The process is repeated until the word segmentation is deemed adequate based on the evaluation.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: July 5, 2016
    Assignee: KONICA MINOLTA LABORATORY U.S.A., INC.
    Inventor: Wei Ming
  • Patent number: 9338172
    Abstract: A method for authenticating an Internet Protocol Security (IPsec) packet, wherein the method comprises, receiving the IPsec packet via an input port, performing a Sequence-Integrity Check Value (SEQ-ICV) check that validates a sequence number within the IPsec packet, and performing an Integrity Check Value (ICV) check that validates a checksum within the IPsec packet, wherein the SEQ-ICV check is performed before the ICV check. In yet another example embodiment, an apparatus for transmitting an IPsec packet, comprising a processor, and a transmitter coupled to the processor, wherein the transmitter is configured to transmit an IPsec packet that comprises a header that comprises a sequence number field that provides a sequence number, and a payload that comprises one or more SEQ-ICV segments used to authenticate the sequence number within the IPsec packet.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: May 10, 2016
    Assignee: Futurewei Technologies, Inc.
    Inventors: Jifei Song, Xiaoyong Yi
  • Patent number: 9276987
    Abstract: Techniques are described for managing execution of programs, such as for distributed execution of a program on multiple computing nodes. In some situations, the techniques include selecting a cluster of computing nodes to use for executing a program based at least in part on data to be used during the program execution. For example, the computing node selection for a particular program may be performed so as to attempt to identify and use computing nodes that already locally store some or all of the input data that will be used by those computing nodes as part of the executing of that program on those nodes. Such techniques may provide benefits in a variety of situations, including when the size of input datasets to be used by a program are large, and the transferring of data to and/or from computing nodes may impose large delays and/or monetary costs.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: March 1, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: Peter Sirota, Richendra Khanna
  • Patent number: 9257195
    Abstract: A method of operating a memory controller in a memory system including a nonvolatile memory device includes; erasing memory cells of a target memory block of the non-volatile memory device on a block basis, and then searching for a bad memory cell by a performing an erase verifying operation, comparing a threshold voltage of the bad memory cell to a reference voltage to generate comparison results, and designating as a bad area one of the entire target memory block, and a sub-block of the target memory block in response to the comparison results.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: February 9, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Chu Oh, Eun-Cheol Kim, Jun-Jin Kong, Kwang-Hoon Kim, Hong-Rak Son
  • Patent number: 9141373
    Abstract: A method and apparatus of a device that updates a software image for a network element is described. In an exemplary embodiment, a device receives a signal to update the network element with the new software image, where the network element includes a plurality of hardware forwarding engines and a control plane. The device further boots the control plane with the new software image, where the booting is accomplished without restarting the control plane. In one embodiment, the device boots the control plane by chain booting from a current software image to the new software image. The device additionally restarts and reconfigures the plurality of hardware forwarding engines. In a further embodiment, the device additionally prefills one or more queues in the hardware forwarding engines with keep-alive messages. These keep-alive messages are transmitted during the time that the control plane is being restarted. In a further embodiment, the hardware forwarding engines are reconfigured without restarting them.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: September 22, 2015
    Assignee: Arista Networks, Inc.
    Inventor: Simon Francis Capper
  • Patent number: 9141368
    Abstract: The claimed subject matter provides a system or method for managing software changes. An exemplary method comprises creating a reset boot loader, a last known good (LKG) boot loader, and a current boot loader, then pointing the reset boot loader, LKG boot loader, and current boot loader to a parent virtual hard disk (VHD) containing a default master image. An operation to perform is determined, and a service partition is booted into. The LKG boot loader or current boot loader is pointed to a child VHD loaded with another desired image based on the operation selected, and the system is rebooted into the parent VHD or child VHD pointed to by the current boot loader.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: September 22, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mushegh Malkhasyan, Paul Roberts, Gilbert Wong, Stewart MacLeod
  • Publication number: 20150149817
    Abstract: Apparatuses, systems, and methods are disclosed to manage non-volatile media. A method includes determining a configuration parameter for a set of storage cells of a non-volatile recording medium. A method includes reading data from a set of storage cells using a determined configuration parameter. A method includes adjusting a configuration parameter based on read data.
    Type: Application
    Filed: January 30, 2015
    Publication date: May 28, 2015
    Inventors: John Strasser, David Flynn, Jeremy Fillingim, Robert Wood, Jea Hyun, Hairong Sun
  • Publication number: 20150149816
    Abstract: A multi-stage codeword detector for detecting codewords from read signals received from a multi-level memory device, includes a first detection stage configured for a coarse detection of a first codeword from a received read signal; a second detection stage configured for a fine detection of a second codeword from the received read signal; and a deciding entity configured to decide on using the second detection stage for the received read signal in dependence on a reliability indicator indicating a certain reliability level of the received read signal.
    Type: Application
    Filed: September 25, 2014
    Publication date: May 28, 2015
    Inventors: Theodore Antonakopoulos, Thomas Mittelholzer, Nikolaos Papandreou, Charalampos Pozidis
  • Patent number: 9037930
    Abstract: This disclosure includes a method for preventing errors in a DRAM (dynamic random access memory) due to weak cells that includes determining the location of a weak cell in a DRAM row, receiving data to write to the DRAM, and encoding the data into a bit vector to be written to memory. For each weak cell location, the corresponding bit from the bit vector is equal to the reliable logic state of the weak cell and the bit vector is longer than the data.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: May 19, 2015
    Assignee: International Business Machines Corporation
    Inventors: Michele M. Franceschini, Hillery C. Hunter, Ashish Jagmohan, Charles A. Kilmer, Kyu-hyoun Kim, Luis A. Lastras-Montano, Moinuddin K. Qureshi
  • Patent number: 9037902
    Abstract: Techniques, related to a flash memory device having a non-volatile memory array (NVM), for recovering from a write interrupt resulting from host-supplied memory voltage fault are disclosed. A memory controller is configured to control a response to an occurrence of the write-interrupt, the response including writing to the NVM, after the memory voltage is verified as being within an acceptable range, one or more of a safe copy of a portion of a first sector of upper-page data and a safe copy of a portion of a second sector of lower-page data, and terminating the write interrupt. Terminating the write-interrupt may include receiving new data from the host while avoiding sending an error message to the host.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 19, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Gautam Dusija, Jianmin Huang, Chris N. Avila, Grishma S. Shah, Yi-Chieh Chen, Alexander K. Mak, Farookh Moogat
  • Patent number: 9032243
    Abstract: A system, method, and computer program product for performing a bare-metal restore, the system including a target storage device, and a target computer configured to boot independent of the target storage device, expose the target storage device to a restoring computer after the target computer has booted, and act as a conduit for the restoring computer to perform a bare-metal restore of backup data onto the target storage device, and the method including booting a target computer independent of a target storage device, exposing the target storage device to a restoring computer after the target computer has booted, and causing the target computer to act as a conduit for the restoring computer to perform a bare-metal restore of backup data onto the target storage device.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: May 12, 2015
    Assignee: International Business Machines Corporation
    Inventors: Ami Kleinman, Dudi Lester, Eran Raichstein, Gil Sasson, Michael Sternberg, Uri Wolloch
  • Publication number: 20150120862
    Abstract: A data recovery software program and delivery system is provided that is designed to operate independently of an installed host computer operating system for extracting information from memory storage devices and hard drives of the host computer, and overwriting the information on the host computer, once the information has been extracted from the host computer, so that no others can retrieve the information from the host computer. The data recovery software allows a user to restart a computer that is still mechanically operative, but has experienced an operating system failure. The data recovery software is able to gain control of a host computer even when there are failed sectors on the hard drive of the host computer. The data recovery software system can be loaded universal serial bus (USB) flash drives, compact discs, digital versatile discs, or other external storage devices that are USB or firewire IEEE 1394 interface enabled.
    Type: Application
    Filed: October 27, 2014
    Publication date: April 30, 2015
    Inventor: Hans Erickson
  • Publication number: 20150121128
    Abstract: Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques can be embodied in a device driver of an operating system. Errors are tracked during read operations. If sufficient errors are observed during read operations, the block is then retired when it is requested to be erased or a page of the block is to be written. One embodiment is a technique to recover data from uncorrectable errors. For example, a read mode can be changed to a more reliable read mode to attempt to recover data. One embodiment further returns data from the memory device regardless of whether the data was correctable by decoding of error correction code data or not.
    Type: Application
    Filed: January 2, 2015
    Publication date: April 30, 2015
    Inventor: Tieniu Li
  • Publication number: 20150121127
    Abstract: A functional simulator with watchpoint support includes a CPU having a first-level DMI cache, a watchpoint manager having a second-level DMI cache, an interconnect module, and a memory controller. The simulator is operated by a front-end tool. Watchpoints corresponding to a predetermined memory addresses are set by the front-end tool and stored as a watchpoint address list in the watchpoint manager. When a memory access request is received by the first-level DMI cache, after a failure to complete the memory access request, the CPU transmits the request to the watchpoint manager. The watchpoint manager searches for a memory address associated with the memory access request in the watchpoint address list. If a match is found, the watchpoint manager generates a watchpoint hit signal and notifies the front-end tool.
    Type: Application
    Filed: October 30, 2013
    Publication date: April 30, 2015
    Inventor: Sandeep Jain
  • Patent number: 9021212
    Abstract: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by a reading request. The semiconductor memory computer includes a page status register for detecting one page status allocated to each page, and page statuses to be detected include the at least following four statuses: (1) a latest data storage status, (2) a not latest data storage status, (3) an invalid data storage status, and (4) an unwritten status. By using the address conversion table and the page status register, at least two data s (latest data and past data) can be read for one designated logical address from a host computer.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: April 28, 2015
    Assignee: Hitachi, Ltd.
    Inventor: Nagamasa Mizushima
  • Publication number: 20150113318
    Abstract: Systems and methods relating generally to solid state memory, and more particularly to systems and methods for recovering data from a solid state memory.
    Type: Application
    Filed: November 5, 2013
    Publication date: April 23, 2015
    Applicant: LSI Corporation
    Inventors: Yunxiang Wu, Yu Cai, Erich F. Haratsch