Abstract: Plasma doping is performed using a plasma made of a gas containing an impurity which will serve as a dopant. In this case, at least one of plasma generation high-frequency power and biasing high-frequency power is supplied in the form of pulses.

Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.

Abstract: An organic light emitting display includes data lines and scan lines intersecting each other, a scan driving unit for supplying a scan signal to the scan lines, a data driving unit for supplying a data signal to the data lines, and pixels defined at intersection points of the data and scan lines, each pixel having an organic light emitting diode, a first TFT with an inverted staggered top gate structure and connected to the organic light emitting diode, the first TFT including an oxide semiconductor as an active layer, and a second TFT with an inverted staggered bottom gate structure and configured to receive the scan signal from the scan lines, the second TFT including an oxide semiconductor as an active layer.

Abstract: An object is to manufacture a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (for dehydration or dehydrogenation) is performed to improve the purity of the oxide semiconductor film and reduce impurities including moisture or the like. After that, slow cooling is performed under an oxygen atmosphere. Besides impurities including moisture or the like exiting in the oxide semiconductor film, heat treatment causes reduction of impurities including moisture or the like exiting in a gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor and in contact therewith.

Abstract: Disclosed herein are processes for making quaternary chalcogenide wafers. The process comprises heating a mixture of quaternary chalcogenide crystals and flux and then cooling the mixture to form a solidified mixture comprising ingots of quaternary chalcogenide and flux. The process also comprises isolating one or more ingots of quaternary chalcogenide from the solidified mixture and mounting at least one ingot in a polymer binder to form a quaternary chalcogenide-polymer composite. The process also comprises optionally slicing the quaternary chalcogenide-polymer composite to form one or more quaternary chalcogenide-polymer composite wafers. The quaternary chalcogenide wafers are useful for forming solar cells.

Abstract: A method of forming a crystalline Pr1-xCaxMnO3 (PCMO) material includes forming an amorphous PCMO material, crystallizing the amorphous PCMO material, and removing a portion of the crystalline PCMO material. A semiconductor structure including the crystalline PCMO material is also disclosed where the crystalline PCMO material has a thickness of less than about 50 nm. A method of forming a semiconductor device structure is also disclosed.

Abstract: An oxide sintered compact made of indium (In), gallium (Ga), zinc (Zn) and oxygen (O) and represented by a formula of InxGayZnzOa [wherein x/(x+y) is 0.2 to 0.8, z/(x+y+z) is 0.1 to 0.5, and a=(3/2)x+(3/2)y+z], wherein the concentration of volatile impurities contained in the oxide sintered compact is 20 ppm or less. Provided is technology for application to the production of an IGZO target capable of achieving high densification and low bulk resistance of the sputtering target, preventing swelling and cracks of the target during the production process, minimizing the generation of nodules, inhibiting abnormal discharge, and enabling DC sputtering.

Abstract: It is an object of an embodiment of the present invention to reduce leakage current between a source and a drain in a transistor including an oxide semiconductor. As a first gate film in contact with a gate insulating film, a compound conductor which includes indium and nitrogen and whose band gap is less than 2.8 eV is used. Since this compound conductor has a work function of greater than or equal to 5 eV, preferably greater than or equal to 5.5 eV, the electron concentration in an oxide semiconductor film can be maintained extremely low. As a result, the leakage current between the source and the drain is reduced.

Abstract: An object is to provide a method for manufacturing a semiconductor device without exposing a specific layer to moisture or the like at all. A thin film element is manufactured in such a manner that a first film, a second film, and a third film are stacked in this order; a resist mask is formed over the third film; a mask layer is formed by etching the third film with the use of the resist mask; the resist mask is removed; a second layer and a first layer are formed by performing dry etching on the second film and the first film with the use of the mask layer; a fourth film is formed to cover at least the second layer and the first layer; and sidewall layers are formed to cover at least the entire side surfaces of the first layer by performing etch back on the fourth film.

Abstract: A thin film transistor is manufactured by forming a gate electrode on a substrate, forming a first insulating film on the gate electrode, forming an oxide semiconductor layer on the first insulating film with an amorphous oxide, patterning the first insulating film, patterning the oxide semiconductor layer, forming a second insulating film on the oxide semiconductor layer in an oxidative-gas-containing atmosphere, patterning the second insulating film to expose a pair of contact regions, forming an electrode layer on the pair of contact regions, and patterning the electrode layer to for a source electrode and a drain electrode.

Abstract: An object is to provide a semiconductor device including an oxide semiconductor film, which has stable electrical characteristics and high reliability. A stack of first and second material films is formed by forming the first material film (a film having a hexagonal crystal structure) having a thickness of 1 nm to 10 nm over an insulating surface and forming the second material film having a hexagonal crystal structure (a crystalline oxide semiconductor film) using the first material film as a nucleus. As the first material film, a material film having a wurtzite crystal structure (e.g., gallium nitride or aluminum nitride) or a material film having a corundum crystal structure (?-Al2O3, ?-Ga2O3, In2O3, Ti2O3, V2O3, Cr2O3, or ?-Fe2O3) is used.

Abstract: Electrical characteristics of transistors using an oxide semiconductor are greatly varied in a substrate, between substrates, and between lots, and the electrical characteristics are changed due to heat, bias, light, or the like in some cases. In view of the above, a semiconductor device using an oxide semiconductor with high reliability and small variation in electrical characteristics is manufactured. In a method for manufacturing a semiconductor device, hydrogen in a film and at an interface between films is removed in a transistor using an oxide semiconductor. In order to remove hydrogen at the interface between the films, the substrate is transferred under a vacuum between film formations. Further, as for a substrate having a surface exposed to the air, hydrogen on the surface of the substrate may be removed by heat treatment or plasma treatment.

Abstract: One object is to have stable electrical characteristics and high reliability and to manufacture a semiconductor device including a semi-conductive oxide film. Film formation is performed by a sputtering method using a target in which gallium oxide is added to a material that is easy to volatilize compared to gallium when the material is heated at 400° C. to 700° C. like zinc, and a formed film is heated at 400° C. to 700° C., whereby the added material is segregated in the vicinity of a surface of the film and the oxide is crystallized. Further, a semi-conductive oxide film is deposited thereover, whereby a semi-conductive oxide having a crystal which succeeds a crystal structure of the oxide that is crystallized by heat treatment is formed.

Abstract: Disclosed are embodiments of field effect transistors (FETs) having suppressed sub-threshold corner leakage, as a function of channel material band-edge modulation. Specifically, the FET channel region is formed with different materials at the edges as compared to the center. Different materials with different band structures and specific locations of those materials are selected in order to effectively raise the threshold voltage (Vt) at the edges of the channel region relative to the Vt at the center of the channel region and, thereby to suppress of sub-threshold corner leakage. Also disclosed are design structures for such FETs and method embodiments for forming such FETs.

Abstract: A method for manufacturing a field-effect transistor is provided. The field-effect transistor includes on a substrate a source electrode, a drain electrode, an oxide semiconductor layer, an insulating layer and a gate electrode. The method includes, after forming the insulating layer on the oxide semiconductor layer, an annealing step of increasing the electrical conductivity of the oxide semiconductor layers by annealing in an atmosphere containing moisture. The steam pressure at the annealing step is higher than the saturated vapor pressure in the atmosphere at the annealing temperature.

Abstract: A method for manufacturing a semiconductor device, which enables miniaturization and reduction of defect, is provided. It includes forming an oxide semiconductor layer, and source and drain electrodes in contact with the oxide semiconductor layer, over an insulating surface; forming insulating layers over the source electrode and the drain electrode; forming a gate insulating layer over the oxide semiconductor layer, the source and drain electrodes, and the insulating layer; forming a conductive layer over the gate insulating layer; forming an insulating film covering the conductive layer; processing the insulating film so that at least part of a region of the conductive layer, which overlaps with the source electrode or the drain electrode, is exposed; and etching the exposed region of the conductive layer to form a gate electrode overlapping with at least part of the region sandwiched between the source electrode and the drain electrode, in a self-aligned manner.

Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. The pixel portion and the driver portion are provided over the same substrate, whereby manufacturing cost can be reduced.

Abstract: A method for manufacturing a Group III nitride semiconductor layer according to the present invention includes a sputtering step of disposing a substrate and a target containing a Group III element in a chamber, introducing a gas for formation of a plasma in the chamber and forming a Group III nitride semiconductor layer added with Si as a dopant on the substrate by a reactive sputtering method, wherein a Si hydride is added in the gas for formation of a plasma.

Abstract: A thin film transistor and a manufacturing method thereof are provided. In the manufacturing method of the thin film transistor a semiconductive active layer and a semiconductor passivation layer are sequentially formed such that the semiconductor passivation layer protectively covers the semiconductive active layer. Then the stacked combination of the semiconductive active layer and semiconductor passivation layer are patterned by using a same patterning mask so that formed islands of the semiconductive active layer continue to be protectively covered by formed islands of the semiconductor passivation layer. In one embodiment, the semiconductive active layer is formed of a semiconductive oxide.

Abstract: An IC which includes a first circuit and a plurality of first paired terminals each including a first power supply terminal and a first GND terminal which are connected to the first circuit, and a second circuit and a plurality of second paired terminals each including a second power supply terminal and a second GND terminal which are connected to the second circuit. The first and second paired terminals are isolated inside. A printed board with the IC mounted has an inductor which is provided in a route that guides a wiring line from the first GND terminal to the second GND terminal and the GND of the printed board. The printed board has a portion where each of the first GND terminals is arranged inside the terminal array of the IC. The inductor suppresses a high-frequency potential variation generated by the operation of the first circuit.

Abstract: A thin film transistor array substrate includes a substrate, a gate layer, a gate insulating layer, a source/drain layer, a patterned protective layer, an oxide semiconductor layer, a resin layer and a pixel electrode. The gate layer is disposed on the substrate. The gate insulating layer is disposed on the gate layer and the substrate. The source/drain layer is disposed on the gate insulating layer. The patterned protective layer is disposed on the source/drain layer and exposes a portion of the source/drain layer. The oxide semiconductor layer is disposed on the patterned protective layer and electrically connected to the source/drain layer. The resin layer is disposed on the oxide semiconductor layer and covers the oxide semiconductor layer. The pixel electrode is disposed on the resin layer and connects to the source/drain layer. The present invention also provides a method for making the thin film transistor array substrate. The thin film transistor array substrate can prevent leakage current.

Abstract: Implementations and techniques for semiconductor light-emitting devices including one or more copper blend I-VII compound semiconductor material barrier layers are generally disclosed.

Abstract: A semiconductor device including thin film transistors having high electrical properties and reliability is proposed. Further, a method for manufacturing the semiconductor devices with mass productivity is proposed. The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity.

Abstract: Nanocrystals having an indium-based core and methods for making them and using them to construct core-shell nanocrystals are described. These core-shell nanocrystals are highly stable and provide higher quantum yields than known nanocrystals of similar composition, and they provide special advantages for certain applications because of their small size.

Abstract: A highly purified oxide semiconductor layer is formed in such a manner that a substance that firmly bonds during film formation to an impurity containing a hydrogen atom is introduced into a film formation chamber, the substance is reacted with the impurity containing a hydrogen atom remaining in the film formation chamber, and the substance is changed to a stable substance containing the hydrogen atom. The stable substance containing the hydrogen atom is exhausted without providing a metal atom of an oxide semiconductor layer with the hydrogen atom; therefore, a phenomenon in which a hydrogen atom or the like is taken into the oxide semiconductor layer can be prevented. As the substance that firmly bonds to the impurity containing a hydrogen atom, a substance containing a halogen element is preferable, for example.

Abstract: It is an object to provide a semiconductor device having excellent electric characteristics or high reliability, or a manufacturing method thereof. A semiconductor device including a gate electrode, an oxide semiconductor layer overlapping with the gate electrode, a source electrode and a drain electrode in contact with the oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer is provided. The oxide semiconductor layer is formed by a facing target sputtering method. The carrier concentration of the oxide semiconductor is less than 1×1012/cm3.

Abstract: A method of forming a metal ion transistor comprises forming a first electrode in a first isolation layer; forming a second isolation layer over the first isolation layer; forming a first cell region of a low dielectric constant (low-k) dielectric over the first electrode in the second isolation layer, the first cell region isolated from the second isolation layer; forming a cap layer over the second isolation layer and the first cell region, at least thinning the cap layer over the first cell region; depositing a layer of the low-k dielectric over the second isolation layer and the first cell region; forming metal ions in the low-k dielectric layer; patterning the low-k dielectric layer to form a second cell region; sealing the second cell region using a liner; and forming a second electrode contacting the second cell region and a third electrode contacting the second cell region.

Abstract: Disclosed is a semiconductor thin film which can be formed at a relatively low temperature even on a flexible resin substrate. Since the semiconductor thin film is stable to visible light and has high device characteristics such as transistor characteristics, in the case where the semiconductor thin film is used as a switching device for driving a display, even when overlapped with a pixel part, the luminance of a display panel does not deteriorate. Specifically, a transparent semiconductor thin film 40 is produced by forming an amorphous film containing zinc oxide and indium oxide and then oxidizing the film so that the resulting film has a carrier density of 10+17 cm?3 or less, a Hall mobility of 2 cm2/V·sec or higher, and an energy band gap of 2.4 EV or more.

Abstract: The present invention generally comprises TFTs having semiconductor material comprising oxygen, nitrogen, and one or more element selected from the group consisting of zinc, tin, gallium, cadmium, and indium as the active channel. The semiconductor material may be used in bottom gate TFTs, top gate TFTs, and other types of TFTs. The TFTs may be patterned by etching to create both the channel and the metal electrodes. Then, the source-drain electrodes may be defined by dry etching using the semiconductor material as an etch stop layer. The active layer carrier concentration, mobility, and interface with other layers of the TFT can be tuned to predetermined values. The tuning may be accomplished by changing the nitrogen containing gas to oxygen containing gas flow ratio, annealing and/or plasma treating the deposited semiconductor film, or changing the concentration of aluminum doping.

Abstract: The present disclosure includes GCIB-treated resistive devices, devices utilizing GCIB-treated resistive devices (e.g., as switches, memory cells), and methods for forming the GCIB-treated resistive devices. One method of forming a GCIB-treated resistive device includes forming a lower electrode, and forming an oxide material on the lower electrode. The oxide material is exposed to a gas cluster ion beam (GCIB) until a change in resistance of a first portion of the oxide material relative to the resistance of a second portion of the oxide material. An upper electrode is formed on the first portion.

Abstract: A first opening and a second opening are formed at the same time over a first metal wiring and a second metal wiring, respectively which are provided as the same layer on a substrate on which a transistor for selecting a memory cell is formed. Then, a variable resistor and an upper electrode are deposited on a whole surface so as to completely fill the first opening with the upper electrode but not to completely fill the second opening with it. Thereafter, a variable resistive element is formed in the first opening and a via hole to connect to the third metal wiring (bit line), in the second opening, at the same time, by performing back-etching until a surface of the second metal wiring is exposed at a bottom of the second opening.

Abstract: A method of manufacturing a metal oxide semiconductor comprising the step of: conducting a transformation treatment on a semiconductor precursor layer containing a metal salt to form the metal oxide semiconductor, wherein the metal salt comprises one or more metal salts selected from the group consisting of a nitrate, a sulfate, a phosphate, a carbonate, an acetate and an oxalate of a metal; and the semiconductor precursor layer is formed by coating a solution of the metal salt.

Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3).y(In2O3).z(ZnO)??Formula 1 wherein, about 0.75?x/z?about 3.15, and about 0.55?y/z?about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.

Abstract: An object is to provide a semiconductor device including an oxide semiconductor with stable electric characteristics can be provided. An insulating layer having many defects typified by dangling bonds is formed over an oxide semiconductor layer with an oxygen-excess mixed region or an oxygen-excess oxide insulating layer interposed therebetween, whereby impurities in the oxide semiconductor layer, such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H2O), are moved through the oxygen-excess mixed region or oxygen-excess oxide insulating layer and diffused into the insulating layer. Thus, the impurity concentration of the oxide semiconductor layer is reduced.

Abstract: In a method of treating a semiconductor element which at least includes a semiconductor, a threshold voltage of the semiconductor element is changed by irradiating the semiconductor with light with a wavelength longer than an absorption edge wavelength of the semiconductor. The areal density of in-gap states in the semiconductor is 1013 cm?2eV?1 or less. The band gap may be 2 eV or greater. The semiconductor may include at least one selected from the group consisting of In, Ga, Zn and Sn. The semiconductor may be one selected from the group consisting of amorphous In—Ga—Zn—O (IGZO), amorphous In—Zn—O (IZO) and amorphous Zn—Sn—O (ZTO). The light irradiation may induce the threshold voltage shift in the semiconductor element, the shift being of the opposite sign to the threshold voltage shift caused by manufacturing process history, time-dependent change, electrical stress or thermal stress.

Abstract: An object is to provide a semiconductor device with stable electric characteristics in which an oxide semiconductor is used. An impurity such as hydrogen or moisture (e.g., a hydrogen atom or a compound containing a hydrogen atom such as H2O) is eliminated from an oxide semiconductor layer with use of a halogen element typified by fluorine or chlorine, so that the impurity concentration in the oxide semiconductor layer is reduced. A gate insulating layer and/or an insulating layer provided in contact with the oxide semiconductor layer can be formed to contain a halogen element. In addition, a halogen element may be attached to the oxide semiconductor layer through plasma treatment under an atmosphere of a gas containing a halogen element.

Abstract: An object is to provide a method for manufacturing a highly reliable semiconductor device including thin film transistors which have stable electric characteristics and are formed using an oxide semiconductor. A method for manufacturing a semiconductor device includes the steps of: forming an oxide semiconductor film over a gate electrode with a gate insulating film interposed between the oxide semiconductor film and the gate electrode, over an insulating surface; forming a first conductive film including at least one of titanium, molybdenum, and tungsten, over the oxide semiconductor film; forming a second conductive film including a metal having lower electronegativity than hydrogen, over the first conductive film; forming a source electrode and a drain electrode by etching of the first conductive film and the second conductive film; and forming an insulating film in contact with the oxide semiconductor film, over the oxide semiconductor film, the source electrode, and the drain electrode.

Abstract: A memory, comprising a metal portion, a first metal layer and second metal oxide layer is provided. The first metal oxide layer is on the metal element, and the first metal oxide layer includes N resistance levels. The second metal oxide layer is on the first metal oxide layer, and the second metal oxide layer includes M resistance levels. The memory has X resistance levels and X is less than the summation of M and N, for minimizing a programming disturbance.

Abstract: Provided are a method of manufacturing a transparent N-doped p-type ZnO semiconductor layer using a surface chemical reaction between precursors containing elements constituting thin layers, and a thin film transistor (TFT) including the p-type ZnO semiconductor layer. The method includes the steps of: preparing a substrate and loading the substrate into a chamber; injecting a Zn precursor and an oxygen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the oxygen precursor using an atomic layer deposition (ALD) technique to form a ZnO thin layer on the substrate; and injecting a Zn precursor and an nitrogen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the nitrogen precursor to form a doping layer on the ZnO thin layer.

Abstract: A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3b arranged around the first region 3a and having a larger content of oxygen than the first region 3a, wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3a.

Abstract: A chip structure comprises a substrate, a first built-up layer, a passivation layer and a second built-up layer. The substrate includes many electric devices placed on a surface of the substrate. The first built-up layer is located on the substrate. The first built-up layer is provided with a first dielectric body and a first interconnection scheme, wherein the first interconnection scheme interlaces inside the first dielectric body and is electrically connected to the electric devices. The first interconnection scheme is constructed from first metal layers and plugs, wherein the neighboring first metal layers are electrically connected through the plugs. The passivation layer is disposed on the first built-up layer and is provided with openings exposing the first interconnection scheme. The second built-up layer is formed on the passivation layer.

Abstract: Provided is a heat treatment apparatus in which a large-sized substrate can be rapidly heated and rapidly cooled with high uniformity, and a heat treatment method using the heat treatment apparatus. The heat treatment apparatus includes: a first chamber of which one side is opened; a second chamber of which one side is opened; a device for moving the first and the second chambers; a heating device; a gas introduction port; a gas exhaust port; and a jig for longitudinally fixing a substrate, in which the substrate is rapidly heated while the first and the second chambers are connected, and rapidly cooled by separating the chambers to move the substrate away from a heat storage portion of the heating device or the like. Further, the heat treatment method includes the heat treatment apparatus, and a method for manufacturing a semiconductor device using an oxide semiconductor is included.

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Abstract: The present invention relates to a method for growing a non-polar m-plane epitaxial layer on a single crystal oxide substrate, which comprises the following steps: providing a single crystal oxide with a perovskite structure; using a plane of the single crystal oxide as a substrate; and forming an m-plane epitaxial layer of wurtzite semiconductors on the plane of the single crystal oxide by a vapor deposition process. The present invention also provides an epitaxial layer having an m-plane obtained according to the aforementioned method.

Abstract: It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.

Abstract: Disclosed herein is a manufacturing method of metal oxide nanostructure, including the steps of: (S1) supplying a precursor containing a first metal, a precursor containing a second metal and oxygen onto a substrate; (S2) forming an amorphous second metal oxide layer on the substrate; (S3) forming first nuclei containing the first metal as a main component and second nuclei containing the second metal as a main component on the substrate; (S4) converting the first nuclei into single crystalline seed layers spaced apart from each other and converting the second nuclei into amorphous layers surrounding the first nuclei; and (S5) selectively forming rods on the seed layers and then growing the rods.

Abstract: A semiconductive porcelain composition/electrode assembly which is low in room temperature resistivity of 100 ?·cm or less and is reduced in change with the passage of time due to energization with regard to the semiconductive porcelain composition in which a part of Ba of BaTiO3 is substituted with Bi—Na and which has a P-type semiconductive component at a crystal grain boundary. Also, there is a process for producing a semiconductive porcelain composition/electrode assembly wherein an electrode is joined to a semiconductive porcelain composition in which a part of Ba of BaTiO3 is substituted with Bi—Na and which has a P-type semiconductive component at a crystal grain boundary, the process including joining the electrode to the semiconductive porcelain composition, followed by conducting a heat treatment at a temperature of from 100° C. to 600° C. for 0.5 hour to 24 hours.

Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.

Abstract: A nanoscale three-terminal switching device has a bottom electrode, a top electrode, and a side electrode, each of which may be a nanowire. The top electrode extends at an angle with respect to the bottom electrode and has an end section going over and overlapping the bottom electrode. An active region is disposed between the top electrode and bottom electrode and contains a switching material. The side electrode is disposed opposite from the top electrode and in electrical contact with the active region. A self-aligned fabrication process may be used to automatically align the formation of the top and side electrodes with respect to the bottom electrode.

Abstract: A nanorod is disclosed. It includes a linear body including three or less alternating regions including a first region and a second region, wherein the first region comprises a first material comprising a first ionic material and the second region comprises a second material comprising a second ionic material.