Abstract: An organic light emitting display includes data lines and scan lines intersecting each other, a scan driving unit for supplying a scan signal to the scan lines, a data driving unit for supplying a data signal to the data lines, and pixels defined at intersection points of the data and scan lines, each pixel having an organic light emitting diode, a first TFT with an inverted staggered top gate structure and connected to the organic light emitting diode, the first TFT including an oxide semiconductor as an active layer, and a second TFT with an inverted staggered bottom gate structure and configured to receive the scan signal from the scan lines, the second TFT including an oxide semiconductor as an active layer.

Abstract: It is an object to manufacture and provide a highly reliable display device including a thin film transistor with a high aperture ratio which has stable electric characteristics. In a manufacturing method of a semiconductor device having a thin film transistor in which a semiconductor layer including a channel formation region is formed using an oxide semiconductor film, a heat treatment for reducing moisture and the like which are impurities and for improving the purity of the oxide semiconductor film (a heat treatment for dehydration or dehydrogenation) is performed. Further, an aperture ratio is improved by forming a gate electrode layer, a source electrode layer, and a drain electrode layer using conductive films having light transmitting properties.

Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.

Abstract: The present invention provides metal precursors for low temperature deposition. The metal precursors include a metal ring compound including at least one metal as one of a plurality of elements forming a ring. Methods of forming a metal thin layer and manufacturing a phase change memory device including use of the metal precursors is also provided.

Abstract: Provided is a thin-film transistor (TFT) display panel having improved electrical and reliability properties and a method of fabricating the TFT display panel. The TFT display panel includes gate wiring formed on a substrate; an oxide active layer pattern formed on the gate wiring; data wiring formed on the oxide active layer pattern to cross the gate wiring; a passivation layer formed on the oxide active layer pattern and the data wiring and made of nitrogen oxide; and a pixel electrode disposed on the passivation layer.

Abstract: A method for manufacturing a self-aligned thin-film transistor (TFT) is described. Firstly, an oxide gate, a dielectric layer, and a photoresist layer are deposited on a first surface of a transparent substrate in sequence. Then, an ultraviolet light is irradiated on a second surface of the substrate opposite to the first surface to expose the photoresist layer, in which a gate manufactured by the oxide gate serves as a mask, and absorbs the ultraviolet light irradiated on the photoresist layer corresponding to the oxide gate. Then, the exposed photoresist layer is removed, and a transparent conductive layer is deposited on the unexposed photoresist layer and the dielectric layer. Then, a patterning process is executed on the transparent conductive layer to form a source and a drain, and an active layer is formed to cover the source, the drain, and the dielectric layer, so as to finish a self-aligned TFT structure.

Abstract: Laminated structures having improved optical gain are provided. In one embodiment, a laminated structure includes a first cladding layer having at least two barrier layers which have different energy band gaps, an active layer formed on the first cladding layer and having an active layer energy band gap, and a second cladding layer formed on the active layer and including at least two barrier layers which have different energy band gaps. The first cladding layer and the second cladding layer may be doped with a different type of dopant.

Abstract: The invention provides a thin film transistor comprising an active layer, the active layer comprising an IGZO-based oxide material, the IGZO-based oxide material being represented by a composition formula of In2-xGaxZnO4-?, where 0.75<x<1.10 and 0<??1.29161×exp(?x/0.11802)+0.00153 and being formed from a single phase of IGZO having a crystal structure of YbFe2O4, and a method of producing the thin film transistor.

Abstract: A thin film transistor includes: a substrate; and, on the substrate, an oxide semiconductor film which serves as an active layer and contains In, Ga, and Zn, a gate electrode, a gate insulating film, a source electrode, and a drain electrode, wherein, when a molar ratio of In, Ga, and Zn in the oxide semiconductor film is expressed as In:Ga:Zn=(2.0?x):x:y, wherein 0.0<x<2.0 and 0.0<y, the distribution of y in the thickness direction of the oxide semiconductor film is such that the oxide semiconductor film has a region at which a value of y is larger than that at a surface of the oxide semiconductor film at a side closer to the substrate and that at a surface of the oxide semiconductor film at a side farther from the substrate.

Abstract: An array substrate including a substrate having a pixel region, a gate line and a gate electrode on the substrate, the gate electrode being connected to the gate line, a gate insulating layer on the gate line and the gate electrode, an oxide semiconductor layer on the gate insulating layer, an auxiliary pattern on the oxide semiconductor layer, and source and drain electrodes on the auxiliary pattern, the source and drain electrodes being disposed over the auxiliary pattern and spaced apart from each other to expose a portion of the auxiliary pattern. Further, the exposed portion of the auxiliary pattern exposes a channel region and including a metal oxide over the channel region.

Abstract: A thin-film transistor array panel includes: an insulating substrate; an oxide semiconductor layer that is formed on the insulating substrate and includes a metal inorganic salt and zinc acetate; a gate electrode overlapping with the oxide semiconductor layer; a gate insulating film that is interposed between the oxide semiconductor layer and the gate electrode; and a source electrode and a drain electrode that at least partially overlap the oxide semiconductor layer and are separated from each other.

Abstract: Example embodiments relate to a heterojunction diode, a method of manufacturing the heterojunction diode, and an electronic device including the heterojunction diode. The heterojunction diode may include a first conductive type non-oxide layer and a second conductive type oxide layer bonded to the non-oxide layer. The non-oxide layer may be a Si layer. The Si layer may be a p++ Si layer or an n++ Si layer. A difference in work functions of the non-oxide layer and the oxide layer may be about 0.8-1.2 eV. Accordingly, when a forward voltage is applied to the heterojunction diode, rectification may occur. The heterojunction diode may be applied to an electronic device, e.g., a memory device.

Abstract: According to a method of fabricating an oxide thin-film transistor, when a thin-film transistor is fabricated by using an amorphous zinc oxide (ZnO)-based semiconductor as an active layer, it may be possible to reduce a tact time as well as attain an enhanced element characteristic by depositing an insulation layer having an oxide characteristic in-situ through controlling oxygen (O2) flow subsequent to depositing an oxide semiconductor using a sputter, and the method may include the steps of forming a gate electrode on a substrate; forming a gate insulation layer on the substrate; depositing an amorphous zinc oxide-based semiconductor layer made of an amorphous zinc oxide-based semiconductor and an amorphous zinc oxide-based insulation layer having an oxide characteristic in-situ on the gate insulation layer; forming an active layer made of the amorphous zinc oxide-based semiconductor over the gate electrode while at the same time forming a channel protection layer made of the amorphous zinc oxide-based insu

Abstract: There are provided a method of manufacturing a zinc oxide semiconductor, and a zinc oxide semiconductor manufactured using the method. A metal catalyst layer is formed on a zinc oxide thin film that has an electrical characteristic of a n-type semiconductor, and a heat treatment is performed thereon so that the zinc oxide thin film is modified into a zinc oxide thin film having an electrical characteristic of a p-type semiconductor. Hydrogen atoms existing in the zinc oxide thin film are removed by a metal catalyst during the heat treatment. Accordingly, the hydrogen atoms existing in the zinc oxide thin film are removed by the metal catalyst and the heat treatment, and the concentration of holes serving as carriers is increased. That is, an n-type zinc oxide thin film is modified into a highly-concentrated p-type zinc oxide semiconductor.

Abstract: A process is described for producing silicon carbide crystals having increased minority carrier lifetimes. The process includes the steps of heating and slowly cooling a silicon carbide crystal having a first concentration of minority carrier recombination centers such that the resultant concentration of minority carrier recombination centers is lower than the first concentration.

Abstract: An object is to provide a thin film transistor including an oxide semiconductor layer, in which the contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and whose electric characteristics are stabilized. Another object is to provide a method for manufacturing the thin film transistor. The thin film transistor including an oxide semiconductor layer is formed in such a manner that buffer layers whose conductivity is higher than that of the oxide semiconductor layer are formed and the oxide semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layers. In addition, the buffer layers whose conductivity is higher than that of the oxide semiconductor layer are subjected to reverse sputtering treatment and heat treatment in a nitrogen atmosphere.

Abstract: To reduce adverse effects on actual operation and to reduce adverse effects of noise. A structure including an electrode, a wiring electrically connected to the electrode, an oxide semiconductor layer overlapping with the electrode in a plane view, an insulating layer provided between the electrode and the oxide semiconductor layer in a cross-sectional view, and a functional circuit to which a signal is inputted from the electrode through the wiring and in which operation is controlled in accordance with the signal inputted. A capacitor is formed using an oxide semiconductor layer, an insulating layer, and a wiring or an electrode.

Abstract: An object of an embodiment of the present invention is to provide a semiconductor device provided with a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor layer including silicon oxide, an insulating layer between the gate electrode and the oxide semiconductor layer, and source and drain regions between the oxide semiconductor layer including silicon oxide and source and drain electrode layers. The source and drain regions are formed using a degenerate oxide semiconductor material or a degenerate oxynitride material.

Abstract: A semiconductor device includes a substrate and a semiconductor layer having a channel region, the channel region is made from an oxide semiconductor which satisfies Vc/Va>4 where Vc is a volume ratio of a crystalline component and Va is a volume ratio of a non-crystalline component.

Abstract: Some embodiments include methods of forming capacitors. A first capacitor storage node may be formed within a first opening in a first sacrificial material. A second sacrificial material may be formed over the first capacitor storage node and over the first sacrificial material, and a retaining structure may be formed over the second sacrificial material. A second opening may be formed through the retaining structure and the second sacrificial material, and a second capacitor storage node may be formed within the second opening and against the first storage node. The first and second sacrificial materials may be removed, and then capacitor dielectric material may be formed along the first and second storage nodes. Capacitor electrode material may then be formed along the capacitor dielectric material. Some embodiments include methods of forming DRAM unit cells, and some embodiments include DRAM unit cell constructions.

Abstract: An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced.

Abstract: Rigid semiconductor memory using amorphous metal oxide semiconductor channels are useful in the production of thin-film transistor memory devices. Such devices include single-layer and multi-layer memory arrays of volatile or non-volatile memory cells. The memory cells can be formed to have a gate stack overlying an amorphous metal oxide semiconductor, with amorphous metal oxide semiconductor channels.

Abstract: A thin film transistor and a manufacturing method thereof are provided. In the manufacturing method of the thin film transistor a semiconductive active layer and a semiconductor passivation layer are sequentially formed such that the semiconductor passivation layer protectively covers the semiconductive active layer. Then the stacked combination of the semiconductive active layer and semiconductor passivation layer are patterned by using a same patterning mask so that formed islands of the semiconductive active layer continue to be protectively covered by formed islands of the semiconductor passivation layer. In one embodiment, the semiconductive active layer is formed of a semiconductive oxide.

Abstract: A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3b arranged around the first region 3a and having a larger content of oxygen than the first region 3a, wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3a.

Abstract: A method for manufacturing a field-effect transistor is provided. The field-effect transistor includes on a substrate a source electrode, a drain electrode, an oxide semiconductor layer, an insulating layer and a gate electrode. The method includes, after forming the insulating layer on the oxide semiconductor layer, an annealing step of increasing the electrical conductivity of the oxide semiconductor layers by annealing in an atmosphere containing moisture. The steam pressure at the annealing step is higher than the saturated vapor pressure in the atmosphere at the annealing temperature.

Abstract: An object is to provide a semiconductor device provided with a thin film transistor having excellent electric characteristics using an oxide semiconductor layer. An In—Sn—O-based oxide semiconductor layer including SiOX is used for a channel formation region. In order to reduce contact resistance between the In—Sn—O-based oxide semiconductor layer including SiOX and a wiring layer formed from a metal material having low electric resistance, a source region or drain region is formed between a source electrode layer or drain electrode layer and the In—Sn—O-based oxide semiconductor layer including SiOX. The source region or drain region and a pixel region are formed using an In—Sn—O-based oxide semiconductor layer which does not include SiOX.

Abstract: Disclosed is a semiconductor storage device including a first electrode formed by being embedded in an insulating film formed on a substrate, a second electrode formed to be opposed to the first electrode, a storage layer formed between the first electrode and the second electrode, the storage layer being on a side of the first electrode, an ion source layer formed between the storage layer and the second electrode, and a diffusion prevention layer formed of a manganese oxide layer between the insulating film and the first electrode.

Abstract: A semiconductor device includes a chip. The chip includes a single circuit element formed in a semiconductor substrate, a first metal layer on a first face of the semiconductor substrate, and a second metal layer on a second face of the semiconductor substrate opposite the first face. The first metal layer and the second metal layer are configured for accessing the single circuit element. A smaller of a first width of the first face of the semiconductor substrate and a second width of the first face of the semiconductor substrate perpendicular to the first width is less than or equal to a distance between an exposed face of the first metal layer parallel to the first face of the semiconductor substrate and an exposed face of the second metal layer parallel to the second face of the semiconductor substrate.

Abstract: A TFT includes a substrate, a source electrode and a drain electrode on the substrate, the source and drain electrodes separated from each other, an active layer on the substrate between the source electrode and the drain electrode, a cladding unit on side surfaces of the source electrode and the drain electrode, a gate insulating layer on the substrate, the gate insulating layer overlapping the active layer and the cladding unit, and a gate electrode on the gate insulating layer, the gate electrode overlapping the active layer.

Abstract: The present invention describes a method of and an apparatus for providing a wafer, the wafer including Silicon; etching trenches in the wafer to form Silicon fins; filling Silicon Oxide in the trenches; planarizing the Silicon Oxide; recessing the Silicon Oxide to a first thickness to form exposed Silicon pedestals from the Silicon fins; depositing SiGe over the exposed Silicon pedestal; recessing the Silicon Oxide to a second thickness; undercutting the exposed Silicon pedestals to form necked-in Silicon pedestals; oxidizing thermally and annealing the SiGe; and forming Germanium nanowires.

Abstract: Disclosed is a semiconductor thin film which can be formed at a relatively low temperature even on a flexible resin substrate. Since the semiconductor thin film is stable to visible light and has high device characteristics such as transistor characteristics, in the case where the semiconductor thin film is used as a switching device for driving a display, even when overlapped with a pixel part, the luminance of a display panel does not deteriorate. Specifically, a transparent semiconductor thin film 40 is produced by forming an amorphous film containing zinc oxide and indium oxide and then oxidizing the film so that the resulting film has a carrier density of 10+17 cm?3 or less, a Hall mobility of 2 cm2/V·sec or higher, and an energy band gap of 2.4 EV or more.

Abstract: A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and the electrode layer are included. In the structure, the second wiring is formed using a stack of a low-resistance oxide semiconductor layer and a conductive layer over the low-resistance oxide semiconductor layer, and the electrode layer is formed using a stack of the low-resistance oxide semiconductor layer and the conductive layer which is stacked so that a region functioning as a pixel electrode of the low-resistance oxide semiconductor layer is exposed.

Abstract: A structure and method of fabricating an interconnect structures with bi-layer metal cap is provided. In one embodiment, the method includes forming an interconnect feature in a dielectric material layer; and forming a bi-layer metallic cap on a top surface of the interconnect feature. The method further includes depositing a blanket layer of a dielectric capping layer, wherein the depositing covers an exposed surface of the dielectric material layer and a surface of the bi-layer metallic cap. The bi-layer metallic cap includes a metal capping layer formed on a conductive surface of the interconnect feature; and a metal nitride formed on a top portion of the metal capping layer. An interconnect structure is also described having an interconnect feature formed in a dielectric layer; a bi-layer metallic cap formed on a top portion of the interconnect feature; and a dielectric capping layer formed over the bi-layer metallic cap.

Abstract: An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized.

Abstract: A switching element of the present invention utilizes electro-chemical reactions to operate, and comprises ion conductive layer 54 capable of conducting metal ions, first electrode 49 arranged in contact with the ion conductive layer, and second electrode 58 for supplying metal ions to the ion conductive layer, wherein an oxygen absorption layer 55 which contains a material more prone to oxidization than the second electrode is formed in contact with the second electrode.

Abstract: An object of the invention is to provide a TFT substrate and a method for producing a TFT substrate which is capable of drastically reducing the production cost by decreasing the number of steps in the production process and improving production yield. A TFT substrate includes: a substrate; a gate electrode and a gate wire formed above the substrate; a gate insulating film formed above the gate electrode and the gate wire; a first oxide layer formed above the gate insulating film which is formed at least above the gate electrode; and a second oxide layer formed above the first oxide layer; wherein at least a pixel electrode is formed from the second oxide layer.

Abstract: An amorphous oxide thin film containing amorphous oxide is exposed to an oxygen plasma generated by exciting an oxygen-containing gas in high frequency. The oxygen plasma is preferably generated under the condition that applied frequency is 1 kHz or more and 300 MHz or less and pressure is 5 Pa or more. The amorphous oxide thin film is preferably exposed by a sputtering method, ion-plating method, vacuum deposition method, sol-gel method or fine particle application method.

Abstract: A semiconductor material includes a matrix semiconductor includes constituent atoms bonded to each other into a tetrahedral bond structure, and a heteroatom Z doped to the matrix semiconductor, in which the heteroatom Z is inserted in a bond so as to form a bond-center structure with an stretched bond length, and the bond-center structure is contained in a proportion of 1% or more based on the heteroatom Z.

Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle ?1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle ?2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.

Abstract: In a thin film transistor which uses an oxide semiconductor, buffer layers containing indium, gallium, zinc, oxygen, and nitrogen are provided between the oxide semiconductor layer and the source and drain electrode layers.

Abstract: A method of making a memory cell or magnetic element by double patterning. The method includes providing a starting stack having a first area, masking a portion of the first area of the starting stack resulting in a first masked portion and a first unmasked portion. Then, removing the first unmasked portion of the starting stack to provide a second area. A portion of this second area is masked, resulting in a second masked portion and a second unmasked portion. The method also includes removing the second unmasked portion to provide a third area, with the finished cell or element being the third area.

Abstract: The present invention relates to a thin film transistor and a method of manufacturing the same. More particularly, the present invention relates to a thin film transistor that includes a zinc oxide (ZnO series) electrode having one or more of Si, Mo, and W as a source electrode and a drain electrode, and a method of manufacturing the same.

Abstract: A light-emitting device, such as a light-emitting diode (LED), includes a substrate including a ZnO-based material, and a structure disposed on a first side of the substrate. The structure includes a plurality of semiconductor layers and an active layer disposed between the plurality of semiconductor layers. The device further includes at least one textured light emission surface arranged to extract at least some light generated within the device.

Abstract: In a method of manufacturing a semiconductor device, a passivation film made of a polyimide resin film is formed on a front surface of a semiconductor wafer including a scribe line and an outer circumferential portion. Thereafter, only the passivation film which is formed on the scribe line of the semiconductor wafer and on the outer circumferential portion of the semiconductor wafer is selectively removed. A protective tape is then bonded onto the front surface of the semiconductor wafer, followed by grinding of a rear surface of the semiconductor wafer.

Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. The pixel portion and the driver portion are provided over the same substrate, whereby manufacturing cost can be reduced.

Abstract: The present invention provides multilevel-cell memory structures with multiple memory layer structures where each memory layer structure includes a tungsten oxide region that defines different read current levels for a plurality of logic states. Each memory layer structure can provide two bits of information, which constitutes four logic states, by the use of the tungsten oxide region that provides multilevel-cell function in which the four logic states equate to four different read current levels. A memory structure with two memory layer structures would provide four bits of storage sites and 16 logic states. In one embodiment, each of the first and second memory layer structures includes a tungsten oxide region extending into a principle surface of a tungsten plug member where the outer surface of the tungsten plug is surrounded by a barrier member.

Abstract: In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. The etching step is performed by dry etching in which an etching gas is used.

Abstract: Example embodiments relate to a method of fabricating a memory device and a memory device. The method of fabricating a memory device comprises forming a lower electrode and an oxide layer on a lower structure and radiating an energy beam on a region of the oxide layer. The memory device comprises a lower structure and an oxide layer and a lower structure formed on the lower structure, the oxide layer including an electron beam radiation region that received radiation from an electron beam source creating an artificially formed current path through the oxide layer to the lower electrode. A reset current of the memory device may be decreased and stabilized.

Abstract: A cross point memory array includes a structure in which holes are formed in an insulating layer and a storage node is formed in each of the holes. The storage node may include a memory resistor and a switching structure. The master for an imprint process used to form the cross-point memory array includes various pattern shapes, and the method of manufacturing the master uses various etching methods.

Abstract: A field effect transistor has a gate electrode, gate-insulating layer, a channel and a source and drain electrodes connected electrically to the channel, the channel comprising an oxide semiconductor, the source electrode or the drain electrode comprising an oxynitride.