For Device Having Potential Or Surface Barrier (e.g., Phototransistor) (epo) Patents (Class 257/E31.053)

  • Patent number: 7772598
    Abstract: A display device, comprising an insulating substrate; a data conductor formed on the insulating substrate and comprising a conductive film; a thin film transistor having at least one source electrode electrically connected with the conductive film, and a drain electrode formed along a circumference of the source electrode and spaced therefrom; and a pixel electrode which is electrically connected with the conductive film.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: August 10, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-young Choi, Keun-kyu Song, Seung-hwan Cho
  • Publication number: 20100197066
    Abstract: A method for fabricating CMOS image sensor device, the method includes providing a semiconductor substrate having a P type impurity characteristic. The semiconductor substrate includes a surface region. The method forms a first dielectric layer having a first thickness overlying a first region of the semiconductor substrate. The method includes providing a N type impurity region in a portion of the semiconductor substrate underneath the first dielectric layer to cause formation of a photodiode device region characterized by at least the N type impurity region and the P type substrate. A second dielectric layer having a second thickness is formed in a second region of the surface region. The second dielectric layer is formed within a portion of the first region within the first thickness of the first dielectric layer. The method forms a polysilicon gate layer overlying at least the second region to form a contact member coupled to the second region.
    Type: Application
    Filed: October 27, 2008
    Publication date: August 5, 2010
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jianping Yang, Hong Zhu, Jieguang Huo
  • Publication number: 20100184246
    Abstract: There is provided a method for manufacturing a solid-state image device which includes the steps of: forming a silicon epitaxial growth layer on a silicon substrate; forming photoelectric conversion portions, transfer gates, and a peripheral circuit portion in and/or on the silicon epitaxial growth layer and further forming a wiring layer on the silicon epitaxial growth layer; forming a split layer in the silicon substrate at a side of the silicon epitaxial growth layer; forming a support substrate on the wiring layer; peeling the silicon substrate from the split layer so as to leave a silicon layer formed of a part of the silicon substrate at a side of the support substrate; and planarizing the surface of the silicon layer.
    Type: Application
    Filed: January 12, 2010
    Publication date: July 22, 2010
    Applicant: SONY CORPORATION
    Inventor: Chiaki Sakai
  • Publication number: 20100182596
    Abstract: A photo transistor has an active region spaced from a source by barrier. A drain is laterally spaced from the active region. Light incident on the active region creates electron-hole pairs. Holes accumulate at the barrier and modulate the effective barrier height to electrons. A gate reset voltage then is applied to gate which lower the barrier allowing the holes to escape.
    Type: Application
    Filed: January 15, 2010
    Publication date: July 22, 2010
    Applicant: ST-ERICSSON SA
    Inventors: John M. Shannon, Stanley D. Brotherton
  • Patent number: 7755092
    Abstract: A display includes a thin film transistor, a repair structure for repairing a defect in a signal line coupled to the thin film transistor, the repair structure including a first repair metal layer and a second repair metal layer. The transistor includes a gate electrode, a source electrode, and a drain electrode. A dielectric layer is disposed above the thin film transistor and the repair structure, the dielectric layer defining a repair opening to expose the second repair metal layer, the dielectric layer also defining a contact window that exposes at least one of the source and drain electrodes. A floating electrode is electrically connected to the second repair metal layer through the repair opening, the floating electrode being electrically floated.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: July 13, 2010
    Assignee: Chimei Innolux Corporation
    Inventor: Lih-Nian Lin
  • Publication number: 20100163709
    Abstract: An embodiment relates to a sensor being integrated on a semiconductor substrate and comprising at least a vertical double-junction photodiode, in turn comprising at least one first and one second p-n junction formed in said semiconductor substrate, as well as at least an anti-reflection coating formed on said photodiode. Said at least one anti-reflection coating comprises at least one first and one second different anti-reflection layer being suitable to obtain a responsivity peak in correspondence with a predetermined wavelength of an incident optical signal on said sensor. An embodiment also relates to an integration process of such a sensor, as well as to an ambient light sensor made by means of such a sensor.
    Type: Application
    Filed: December 29, 2009
    Publication date: July 1, 2010
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Salvatore Leonardi, Marie Eloisa Castagna, Anna Muscara
  • Publication number: 20100155867
    Abstract: A semiconductor device (1) includes a plurality of photodiodes (20) on a semiconductor substrate (11). Cathodes (22) and a common anode (21) of the plurality of photodiodes (20 (20a, 20b)) are formed so as to be electrically independent from the semiconductor substrate (11), the plurality of photodiodes (20) have the common anode (21) and the plurality of separate cathodes (22), and an output of the common anode (21) is considered to be equivalent to a sum of outputs of the plurality of separate photodiodes (20). Alternatively, the plurality of photodiodes have a common cathode and a plurality of separate anodes, and an output of the common cathode is considered to be equivalent to a sum of outputs of a plurality of separate photodiodes. By completely electrically isolating the anode and the cathode of the photodiodes from the substrate, the noise characteristic can be reduced, and crosstalk can be reduced.
    Type: Application
    Filed: August 10, 2006
    Publication date: June 24, 2010
    Applicant: SONY CORPORATION
    Inventor: Chihiro Arai
  • Publication number: 20100155874
    Abstract: The present invention is a photodiode detector array for use in computerized tomography (CT) and non-CT applications. Specifically, the present invention is a high-density photodiode arrays, with low dark current, low capacitance, high signal to noise ratio, high speed, and low crosstalk that can be fabricated on relatively large substrate wafers. More specifically the photodiode array of the present invention is fabricated such that the PN-junctions are located on both the front side and back side surfaces of the array, and wherein the front side PN-junction is in electrical communication with the back side PN-junction. Still more specifically, the present invention is a photodiode array awing PN-junctions that are electrically connected from the front to back surfaces and which can be operated in a fully depleted mode at low reverse bias.
    Type: Application
    Filed: December 14, 2009
    Publication date: June 24, 2010
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20100140729
    Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.
    Type: Application
    Filed: October 30, 2009
    Publication date: June 10, 2010
    Inventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
  • Patent number: 7732828
    Abstract: A flat panel display is provided. The flat panel display includes a display panel. A light guide plate is disposed below the display panel. At least one optical film is disposed between the display panel and the light guide plate. At least one illuminating device package is disposed in proximity to the side of the light guide plate. The illuminating device package includes an illuminating semiconductor device and a lens encapsulating the illuminating semiconductor device. The lens includes two reflective surfaces disposed at either side of a central axis. A plurality of diffractive surfaces are disposed between the reflective surfaces. Each of the diffractive surfaces has a tilt angle respective to the central axis. A first portion of light beams incident to each of the reflective surfaces is reflected to at least one diffractive surface and then diffracted and collected into a first convergent angle.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: June 8, 2010
    Assignee: Chimei-InnoLux Corporation
    Inventor: Chen-Pin Hung
  • Publication number: 20100127280
    Abstract: Provided is a photo sensor that can be downsized while suppressing occurrence of noise caused by a dark current, and a display device including the photo sensor. The photo sensor used includes a plurality of photodiodes (9-11) formed in a same silicon layer (8). The photodiodes (9-11) have p-type semiconductor regions (9a, 10a, 11a) and n-type semiconductor regions (9c, 10c, 11c) formed respectively in the silicon layer (8). Further, the photodiodes (9-11) are arranged in series so that the respective forward directions will be aligned with each other. In two photodiodes adjacent to each other, the n-type semiconductor region of one of the photodiodes and the p-type semiconductor region of the other photodiode are formed to overlap each other in the thickness direction of the silicon layer.
    Type: Application
    Filed: April 10, 2008
    Publication date: May 27, 2010
    Inventors: Hiromi Katoh, Masakazu Satoh, Benjamin Hadwen
  • Patent number: 7709868
    Abstract: In a light sensing element having simplified structure, an array substrate having the light sensing element and an LCD apparatus having the light sensing element, the light sensing element includes a first electrode, a control electrode and a second electrode. An alternating bias voltage is applied to the first electrode. An off voltage is applied to the control electrode. The second electrode outputs a light-induced leakage current based on an externally provided light and the bias voltage. Therefore, the array substrate includes one light sensing switching element corresponding to one pixel so that structure of the array substrate is simplified and opening ratio is increased.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jin Pak, Hyung-Guel Kim, Kee-Han Uh, Jong-Whan Cho, Jin Jeon, Young-Bae Jung
  • Patent number: 7696547
    Abstract: A solid-state image sensor having a well of a first conductivity type; a photoelectric conversion region having a second conductivity type formed in the well storing charges obtained from a photoelectric conversion; a drain region having the second conductivity type formed in the well apart from a surface of the well; and a gate electrode formed on the surface of the well via a gate insulator, the gate electrode transferring the charges from the photoelectric conversion region to the drain region.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: April 13, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisanori Ihara, Nagataka Tanaka, Hiroshige Goto
  • Patent number: 7679159
    Abstract: Each of three light receiving sections has a P-type well having a P+-type layer and an N-type layer formed therein. The P+-type layer is diffused from substrate surface to depth d1. A PN junction forming portion of the N-type layer is diffused from depth d1 to depth d2 which is greater than depth d1 so as to form, with the P-type well, a PN junction of a photodiode at depth d2. Depths d1 as well as depths d2 of the three light receiving sections are different from each other. The N-type layer has a charge output portion which is diffused from the PN junction to the substrate surface, and which is coupled by circuit coupling to a MOS transistor for reading out charge. This allows each light receiving section to have spectral characteristics, thereby providing a solid state imaging element and a solid state imaging device without using color filters.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: March 16, 2010
    Assignee: Funal Electric Co., Ltd.
    Inventors: Hiromichi Tanaka, Hideto Yoshimura, Sumio Terakawa, Masafumi Kimata
  • Publication number: 20100044823
    Abstract: In accordance with the invention, a photonic device comprises a semiconductor substrate including at least one circuit component comprising a metal silicide layer and an overlying layer including at least one photoresponsive component. The metal silicide layer is disposed between the circuit component and the photoresponsive component to prevent entry into the circuit component of light that penetrates the photoresponsive component. The silicide layer advantageously reflects the light back into the photoresponsive element. In addition, the overlying layer can include one or more reflective layers to reduce entry of oblique light into the photoresponsive component. In an advantageous embodiment, the substrate comprises single-crystal silicon including one or more insulated gate field effect transistors (IGFETs), and/or capacitors, and the photoresponsive element comprises germanium and/or germanium alloy epitaxially grown from seeds on the silicon.
    Type: Application
    Filed: November 2, 2009
    Publication date: February 25, 2010
    Applicant: Noble Peak Vision Corp.
    Inventors: Conor S. Rafferty, Clifford Alan King
  • Publication number: 20100038678
    Abstract: A photodiode in which a pn junction is formed between the doped region (DG) formed in the surface of a crystalline semiconductor substrate and a semiconductor layer (HS) deposited above said doped region. An additional doping (GD) is provided in the edge region of the doped zone, by means of which additional doping the pn junction is shifted deeper into the substrate (SU). With the greater distance of the pn junction from defects at phase boundaries that is achieved in this way, the dark current within the photodiode is reduced.
    Type: Application
    Filed: April 28, 2006
    Publication date: February 18, 2010
    Inventors: Jochen Kraft, Bernhard Löffler, Gerald Meinhardt
  • Publication number: 20100026192
    Abstract: A method of operating a photosensor comprising: applying a bias voltage to a photosensor (12) comprising n (n>1) photo-sensitive elements (8) connected in series, and determining the photocurrent in the photosensor (12) at a time when the applied bias voltage across the photosensor maintains the photosensor at or close to the point at which it has the greatest signal-to-noise ratio. This may conveniently be done by determining the current in the photosensor at a time when the applied bias voltage across the photosensor is equal or approximately equal to n×Vbi, where Vbi is the bias voltage about which the current in a single one of the photo-sensitive elements (8), in the dark, changes sign. In an embodiment in which the photo-sensitive elements (8) are photodiodes, the bias voltage Vbi is the “built-in” voltage of the photodiodes. The photocurrent generated when n series-connected photodiodes are illuminated is approximately equal to the photocurrent generated when one photodiode is illuminated.
    Type: Application
    Filed: October 4, 2007
    Publication date: February 4, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Benjamin James Hadwen, Christopher James Brown
  • Publication number: 20100025802
    Abstract: An image sensor is provided. The image sensor comprises a readout circuitry, interconnections, a first image sensing device, and a second image sensing device. The readout circuitry is disposed on a first substrate. The interconnections comprise a first interconnection and a second interconnection on the first substrate to be electrically connected to the readout circuitry. The first image sensing device is disposed over the first interconnection. The second image sensing device is disposed over the first image sensing device and electrically connected to the second interconnection.
    Type: Application
    Filed: July 23, 2009
    Publication date: February 4, 2010
    Inventor: Gun Hyuk Lim
  • Patent number: 7615838
    Abstract: A CMOS image sensor and a method for manufacturing the same. In one example embodiment, a CMOS image sensor includes a field region and an active region, a second conductive bottom region, a first conductive well region, a second conductive top region, and a first conductive high concentration region. The field region and the active region are formed in a first conductive semiconductor substrate. The second conductive bottom region has a first depth in part of the active region. The first conductive well region is formed in the active region. The second conductive top region has a depth that is less than the first depth. The first conductive high concentration region has a depth that is less than the depth of the second conductive top region.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: November 10, 2009
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Jong Min Kim
  • Publication number: 20090261394
    Abstract: A method of fabricating a photoactive array having an integrated backplane is provided. The layers of the device may be stamped or deposited on a planar or a curved substrate, such as a semispherical or ellipsoidal substrate. Each metal layer may be stamped using an elastomeric stamp and a vacuum mold. By depositing the patterned and full-surface layers in a single process, a photosensitive array with an integrated transistor backplane may be fabricated, resulting in improved sensitivity and performance.
    Type: Application
    Filed: February 6, 2009
    Publication date: October 22, 2009
    Applicant: The Regents of the University of Michigan
    Inventor: Stephen R. Forrest
  • Publication number: 20090250734
    Abstract: A pixel including a substrate of a first conductivity type and having a surface, a photodetector of a second conductivity type that is opposite the first conductivity type, a floating diffusion region of the second conductivity type, a transfer region between the photodetector and the floating diffusion, a gate positioned above the transfer region and partially overlapping the photodetector, and a pinning layer of the first conductivity type extending at least across the photodetector from the gate.
    Type: Application
    Filed: June 9, 2009
    Publication date: October 8, 2009
    Inventors: CHINTAMANI P. PALSULE, Changhoon Choi, Fredrick P. LaMaster, John H. Stanback, Thomas E. Dungan, Thomas Joy, Homayoon Haddad
  • Publication number: 20090236504
    Abstract: A photo-sensing device is disclosed, comprising a photoelectric conversion semiconductor thin film, thin films for ohmic contacts to be provided to form an incident light window on one face of the photoelectric conversion semiconductor thin film, first and second ohmic electrodes installed on the thin films for the ohmic contacts, a connection wiring for short-circuiting the first and the second ohmic electrodes, an insulating film provided on the other face of the photoelectric conversion semiconductor thin film, and a first electrode provided on the face of the insulating film that does not contact the photoelectric conversion semiconductor thin film.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 24, 2009
    Applicant: CASIO COMPUTER CO., LTD.
    Inventor: Ikuhiro YAMAGUCHI
  • Patent number: 7592682
    Abstract: A semiconductor device having a substrate that contains an insulating layer and a semiconductor layer provided on the insulating layer. The semiconductor also has an optical waveguide that is formed along a predetermined path. This optical waveguide is formed by making the semiconductor layer non-uniformed in thickness thereof. The semiconductor further has a photoreceptor having MISFET containing a floating channel body that is formed on a position of the semiconductor layer in which electric field of light guided inside the optical waveguide exists and a gate for forming channel formed on a front surface side of the channel body.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: September 22, 2009
    Assignee: Sony Corporation
    Inventor: Koichiro Kishima
  • Publication number: 20090224298
    Abstract: Disclosed are a CMOS image sensor and a manufacturing method thereof.
    Type: Application
    Filed: May 7, 2009
    Publication date: September 10, 2009
    Inventor: Chang Hun HAN
  • Publication number: 20090206237
    Abstract: A photo transistor has an active region (24) spaced from a source (28) by barrier (26). A drain (20) is laterally spaced from the active region (24). Light incident on the active region creates electron-hole pairs. Holes accumulate at the barrier and modulate the effective barrier height to electrons. A gate reset voltage then is applied to gate (4) which lower the barrier allowing the holes to escape.
    Type: Application
    Filed: January 21, 2005
    Publication date: August 20, 2009
    Inventors: John M. Shannon, Stanley D. Brotherton
  • Publication number: 20090194151
    Abstract: The present invention is directed to a semiconductor substrate having at least an electrode formed thereon, in which the electrode has a multilayer structure including two or more layers, of the multilayer structure, at least a first electrode layer directly bonded to the semiconductor substrate contains at least silver and a glass frit, and contains, as an additive, at least one of oxides of Ti, Bi, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Fe, Co, Ni, Si, Al, Ge, Sn, Pb, and Zn, and, of an electrode layer formed on the first electrode layer, at least an uppermost electrode layer to be bonded to a wire contains at least silver and a glass frit and does not contain the additive. This makes it possible to form, on a semiconductor substrate, an electrode adhered to the semiconductor substrate with sufficient adhesive strength and adhered to a wire via solder with sufficient adhesive strength by lowering both contact resistance and interconnect resistance.
    Type: Application
    Filed: July 12, 2007
    Publication date: August 6, 2009
    Applicants: Shin-Etsu Handotai Co., Ltd., Shin-Etsu Chemical Co., Ltd.
    Inventors: Naoki Ishikawa, Hiroyuki Ohtsuka, Takenori Watabe, Satoyuki Ojima, Toyohiro Ueguri
  • Publication number: 20090189235
    Abstract: A solid-state imaging device having a light-receiving section that photoelectrically converts incident light includes an insulating film formed on a light-receiving surface of the light-receiving section and a film and having negative fixed charges formed on the insulating film. A hole accumulation layer is formed on a light-receiving surface side of the light-receiving section. A peripheral circuit section in which peripheral circuits are formed is provided on a side of the light-receiving section. The insulating film is formed between a surface of the peripheral circuit section and the film having negative fixed charges such that a distance from the surface of the peripheral circuit section to the film having negative fixed charges is larger than a distance from a surface of the light-receiving section to the film having negative fixed charges.
    Type: Application
    Filed: December 19, 2008
    Publication date: July 30, 2009
    Applicant: SONY CORPORATION
    Inventors: Harumi Ikeda, Susumu Hiyama, Takashi Ando, Kiyotaka Tabuchi, Tetsuji Yamaguchi, Yuko Ohgishi
  • Publication number: 20090179295
    Abstract: Embodiments relate to an image sensor. According to embodiments, an image sensor may include a metal interconnection, readout circuitry, a first substrate, a metal layer, and an image sensing device. The metal interconnection and the readout circuitry may be formed on and/or over the first substrate. The image sensing device may include a first conduction type conduction layer and a second conduction type conduction layer and may be electrically connected to the metal layer. According to embodiments, an electric field may not be generated on and/or over an Si surface. This may contribute to a reduction in a dark current of a 3D integrated CMOS image sensor.
    Type: Application
    Filed: December 28, 2008
    Publication date: July 16, 2009
    Inventor: Joon Hwang
  • Publication number: 20090127597
    Abstract: A photodiode structure including a semiconductor of a first conductivity type, the semiconductor having a main surface, a first well formed in the semiconductor at the main surface thereof, the first well being of a second conductivity type opposite to the first conductivity type. A second well formed in the semiconductor at the main surface thereof laterally outside the first well, the second well being of the second conductivity type, and a first terminal electrically connecting the first well and the second well, and a second terminal connecting the semiconductor such that a depletion region of laterally varying distance to the main surface results from applying a reverse voltage to the first and second terminals.
    Type: Application
    Filed: November 19, 2007
    Publication date: May 21, 2009
    Inventor: Stefan Hermann Groiss
  • Publication number: 20090114919
    Abstract: A semiconductor range-finding element and a solid-state imaging device, which can provide a smaller dark current and a removal of reset noise. With n-type buried charge-generation region, buried charge-transfer regions, buried charge read-out regions buried in a surface of p-type semiconductor layer, an insulating film covering these regions, transfer gate electrodes arranged on the insulating film for transferring the signal charges to the buried charge-transfer regions, read-out gate electrodes arranged on the insulating film for transferring the signal charges to the buried charge read-out regions, after receiving a light pulse by the buried charge-generation region, in the semiconductor layer just under the buried charge-generation region, an optical signal is converted into signal charges, and a distance from a target sample is determined by a distribution ratio of the signal charges accumulated in the buried charge-transfer regions.
    Type: Application
    Filed: March 30, 2007
    Publication date: May 7, 2009
    Applicants: National University Corporation Shizuoka Univ., Sharp Kabushiki Kaisha
    Inventors: Shoji Kawahito, Takashi Watanabe
  • Publication number: 20090078973
    Abstract: Provides is a backside-illuminated sensor including a semiconductor substrate having a front surface and a back surface. A plurality of image sensor elements are formed on the front surface of the semiconductor substrate. At least one of the image sensor elements includes a transfer transistor and a photodetector. The gate of the transfer transistor includes an optically reflective layer. The gate of the transfer transistor, including the optically reflective layer, overlies the photodetector. In one embodiment, the gate overlies the photodetector by at least 5%.
    Type: Application
    Filed: September 24, 2007
    Publication date: March 26, 2009
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung, Ching-Chun Wang
  • Patent number: 7479686
    Abstract: Backthinning in an area selective manner is applied to CMOS imaging sensors 12 for use in electron bombarded active pixel array devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels of an active pixel array providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: January 20, 2009
    Assignee: Intevac, Inc.
    Inventors: Kenneth A Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Publication number: 20080302949
    Abstract: A sensor includes a substrate, a floating diffusion node in the substrate, a photodiode in the substrate laterally spaced apart from the floating diffusion region and a transfer transistor coupling the photodiode and the floating diffusion region. The sensor further includes a photodiode control electrode disposed on the photodiode and configured to control a carrier distribution of the photodiode responsive to a control signal applied thereto. The floating diffusion region may have a first conductivity type, the photodiode may include a first semiconductor region of a second conductivity type disposed on a second semiconductor region of the first conductivity type, and the photodiode control electrode may be disposed on the first semiconductor region. The photodiode may be configured to receive incident light from a side of the substrate opposite the photodiode control electrode.
    Type: Application
    Filed: June 4, 2008
    Publication date: December 11, 2008
    Inventors: Yi-tae Kim, Jung-chak Ahn
  • Patent number: 7459328
    Abstract: An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: December 2, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang-Il Jung
  • Publication number: 20080268582
    Abstract: A disclosed technology is a method for exposing a photo-sensitive SAM film, wherein a self-assembled-monolayer (photo-sensitive SAM film) having photo-sensitivity, exhibiting hydrophobicity before exposure, and exhibiting hydrophilicity after exposure is formed on a substrate, exposure is performed to the substrate in a state in which a surface of the substrate on which the film has been formed is dipped in liquid or in a state in which a light-sensitive surface of the substrate faces downward to be in contact with liquid, exposure light is ultraviolet light, visible light, or light with an exposure-wavelength of 350 nm or more to 800 nm or less, and the liquid is at least one of organic solvent containing an aromatic group and organic solvent of alcohols, ethers, or ketones.
    Type: Application
    Filed: February 15, 2008
    Publication date: October 30, 2008
    Inventors: Tadashi Arai, Takeo Shiba, Masahiko Ando
  • Publication number: 20080237446
    Abstract: A solid-state image pickup device and method are provided. The device can not only operate with a wide dynamic range but it also allows the user to switch the dynamic range corresponding to the photographic scene, and its operating method. Plural pixels, each of which has a photodiode, a transfer transistor, a floating diffusion region, an additional capacitance element, a capacitance coupling transistor, and a reset transistor, are integrated in an array on a semiconductor substrate. The capacitance of such floating diffusion region is less than that of such photodiode. A first signal S1 obtained by transferring part or all of the photoelectric charge accumulated in such photodiode PD to such floating diffusion region FD or a second signal S1+S2 obtained by transferring all of the photoelectric charge accumulated in such photodiodes to the potential obtained by coupling such floating diffusion region and such additional capacitance element CS is output to all of the pixels.
    Type: Application
    Filed: February 18, 2008
    Publication date: October 2, 2008
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hiromichi Oshikubo, Satoru Adachi, Shunji Kashima
  • Publication number: 20080237765
    Abstract: An image sensor with the ability to detect a different light wavelength at each pixel, due to a change of physical characteristics of material under light with different wavelength illumination.
    Type: Application
    Filed: June 7, 2008
    Publication date: October 2, 2008
    Inventor: Victor Chepettchouk
  • Publication number: 20080203397
    Abstract: A high voltage diamond based switching device capable of sustaining high currents in the on state with a relatively low impedance and a relatively low optical switching flux, and capable of being switched off in the presence of the high voltage being switched. The device includes a diamond body having a Schottky barrier contact, held in reverse bias by the applied voltage to be switched, to an essentially intrinsic diamond layer or portion in the diamond body, a second metal contact, and an optical source or other illuminating or irradiating device such that when the depletion region formed by the Schottky contact to the intrinsic diamond layer is exposed to its radiation charge carriers are generated. Cain in the total number of charge carriers then occurs as a result of these charge carriers accelerating under the field within the intrinsic diamond layer and generating further carriers by assisted avalanche breakdown.
    Type: Application
    Filed: September 8, 2005
    Publication date: August 28, 2008
    Inventors: Gehan Anil Joseph Amaratunga, Mihai Brezeau, Jeremy Suhail Rashid, Nalin Lalith Rupesinghe, Antonella Tajani
  • Patent number: 7397100
    Abstract: An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: July 8, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang-Il Jung
  • Publication number: 20080150060
    Abstract: A method for manufacturing a sensor image may include forming a pixel array including a photodiode structure and an insulating film structure in an active area of a semiconductor substrate; forming a metal pad on the insulating film structure; forming a dielectric and/or etch stop film on the metal pad (and optionally over the pixel array); forming a protective layer on the dielectric and/or etch stop film; and forming a pad opening and a pixel opening by etching the protective layer.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 26, 2008
    Inventors: Ki Sik Im, Woo Seok Hyun
  • Publication number: 20080150051
    Abstract: An image sensor and method of manufacturing thereof are provided. In an embodiment, an image sensor can include a photodiode on a substrate, an interlayer dielectric formed on the substrate, an insulating layer micro-lens on the interlayer dielectric, and an organic micro-lens on the insulating layer micro-lens.
    Type: Application
    Filed: August 21, 2007
    Publication date: June 26, 2008
    Inventor: SANG WOOK RYU
  • Publication number: 20080111204
    Abstract: A method for manufacturing an image sensor includes forming first to third photodiodes and first to third color filters corresponding thereto; forming a photoresist film including photosensitive materials on the upper surfaces of the first to third color filters; forming a first exposed part by exposing the photoresist film with a first exposure energy using a first pattern mask with a first light transmitting part having a first width at boundaries between the individual color filters; forming a second exposed part overlapping a portion of the first exposed part by exposing the photoresist film with a second exposure energy smaller than the first exposure energy using a second pattern mask with a second light transmitting part having a second width wider than the first width; and forming microlenses by developing the photoresist film.
    Type: Application
    Filed: October 29, 2007
    Publication date: May 15, 2008
    Inventor: Young Je Yun
  • Publication number: 20080079108
    Abstract: A method for improving sensitivity of backside illuminated image sensor. A substrate having a first conductivity type and a first potential. A depletion region having a second conductivity type is formed within the substrate. The depletion region is extended. The thickness of the substrate is reduced. First type conductivity ions having a second potential are implanted at backside surface of the substrate to form a doping layer. Laser annealing on the doping layer is performed to activate the first type conductivity ions.
    Type: Application
    Filed: July 9, 2007
    Publication date: April 3, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Hsuan HSU, Dun-Nian YAUNG
  • Publication number: 20080073735
    Abstract: An image sensor comprises a lower structure having at least one photodiode and interconnection, a passivation layer on the lower structure, a color filter array on the passivation layer, and a micro-lens array comprising an oxide layer on the color filter array.
    Type: Application
    Filed: August 31, 2007
    Publication date: March 27, 2008
    Inventor: Joon Hwang
  • Publication number: 20080054389
    Abstract: An image sensor formed using a method for manufacturing a planar layer in a process for forming microlenses may be used in a complementary metal oxide semiconductor (CMOS) image sensor. Embodiments provide a planar layer that can improve the operation performance of an image sensor, a manufacturing method thereof, and the image sensor including the planar layer. Embodiments relate to a planar layer located under microlenses, the planar layer including valleys of patterns having a predetermined size, which may eliminate optical cross talk between adjacent pixels.
    Type: Application
    Filed: August 30, 2007
    Publication date: March 6, 2008
    Inventor: Young-Je Yun
  • Publication number: 20080054299
    Abstract: An image sensor includes a photo diode formed over a semiconductor substrate. At least one IMD layer is formed on the semiconductor substrate. A dielectric medium fills a through-hole formed in the IMD layer over the photo diode. The dielectric medium may be made with materials with a higher refractive index than the materials forming the IMD layer.
    Type: Application
    Filed: August 24, 2007
    Publication date: March 6, 2008
    Inventor: Cheon-Man Shim
  • Publication number: 20080048282
    Abstract: A semiconductor device for a system in a package (SiP) type device can include a semiconductor substrate; a pre-metal-dielectric (PMD) layer on the semiconductor substrate; at least one metal layer on the PMD layer; a first through-electrode extending through the semiconductor substrate and the PMD layer; and a second through-electrode connected to the first through-electrode through the metal layer.
    Type: Application
    Filed: July 31, 2007
    Publication date: February 28, 2008
    Inventor: JAE WON HAN
  • Publication number: 20080023735
    Abstract: In a light sensing element having simplified structure, an array substrate having the light sensing element and an LCD apparatus having the light sensing element, the light sensing element includes a first electrode, a control electrode and a second electrode. An alternating bias voltage is applied to the first electrode. An off voltage is applied to the control electrode. The second electrode outputs a light-induced leakage current based on an externally provided light and the bias voltage. Therefore, the array substrate includes one light sensing switching element corresponding to one pixel so that structure of the array substrate is simplified and opening ratio is increased.
    Type: Application
    Filed: October 4, 2007
    Publication date: January 31, 2008
    Inventors: Jin Jeon, Young-Bae Jung
  • Patent number: 7323730
    Abstract: The invention relates to a semiconductor device comprising at least two electrodes and at least one nanotube or nanowire, in particular a carbon nanotube or nanowire, the device including at least one semiconductive nanotube or nanowire having at least one region that is covered at least in part by at least one layer of molecules or nanocrystals of at least one photosensitive material, an electrical connection between said two electrodes being made by at least one nanotube, namely said semiconductive nanotube or nanowire and optionally by at least one other nanotube or nanowire.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: January 29, 2008
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Julien Borghetti, Jean-Philippe Bourgoin, Pascale Mordant, Vincent Derycke, Arianna Filoramo, Marcelo Goffman
  • Publication number: 20070290288
    Abstract: A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a first surface of the Si substrate; forming an epitaxial Ge layer overlying the insulator layer; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers; forming source/drain (S/D) regions in the Ge layer; and, forming a photo absorption threshold bias region in the Ge layer, adjacent the channel region. In one aspect, the second S/D region has a length, longer than the first S/D length. The photo absorption threshold bias region underlies the second S/D region. Alternately, the second S/D region is separated from the channel by an offset, and the photo absorption threshold bias region is the offset in the Ge layer, after a light p-doping.
    Type: Application
    Filed: August 22, 2007
    Publication date: December 20, 2007
    Inventors: Sheng Hsu, Jong-Jan Lee, Jer-Shen Maa, Douglas Tweet