For Device Having Potential Or Surface Barrier (e.g., Phototransistor) (epo) Patents (Class 257/E31.053)

  • Patent number: 7291873
    Abstract: A compound semiconductor epitaxial substrate for use in a strain channel high electron mobility field effect transistor, comprising an InGaAs layer as a strain channel layer 6 and AlGaAs layers containing n-type impurities as back side and front side electron supplying layers 3 and 9, wherein an emission peak wavelength from the strain channel layer 6 at 77 K is set to 1030 nm or more by optimizing the In composition and the thickness of the strain channel layer 6.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: November 6, 2007
    Assignees: Sumitomo Chemical Company, Limited, Sumika Epi Solution Company, Ltd.
    Inventors: Takenori Osada, Takayuki Inoue, Noboru Fukuhara
  • Publication number: 20070205447
    Abstract: An imaging device formed as a CMOS semiconductor integrated circuit having two adjacent pixels in a row connected to a common column line. By having adjacent pixels of a row share column lines, the CMOS imager circuit eliminates half the column lines of a traditional imager allowing the fabrication of a smaller imager. The imaging device also may be fabricated to have a diagonal active area to facilitate contact of two adjacent pixels with the single column line and allow linear row select lines, reset lines and column lines.
    Type: Application
    Filed: May 7, 2007
    Publication date: September 6, 2007
    Inventor: Howard Rhodes
  • Publication number: 20070170462
    Abstract: A novel structure of photo sensor is disclosed. The equivalent circuit of the invented photo sensor comprises a photo transistor integrated with a surface photo sensor. The structure of the surface photo sensor is substantially identical to the base-emitter junction of the photo transistor and may be prepared in the same process. The junction depletion region of the surface photo sensor locates adjacent to the light incident surface, whereby decay of incident light is minimal and more electron-hole pairs are generated. The present invention also discloses semiconductor material containing the invented photo sensor assembly of the invented photo sensor and method for preparation of the photo sensor, the semiconductor material and their assemblies.
    Type: Application
    Filed: January 26, 2006
    Publication date: July 26, 2007
    Applicant: Fronted Analog and Digital Technology Corporation
    Inventors: Yung-Jane Hsu, Kuang-Sheng Lai
  • Patent number: 7247899
    Abstract: In a photoelectric conversion device having a buried layer in a part of an anode and a cathode of a photodiode, such as a CCD having a sensor structure and a CMOS sensor, well of the same conduction type as the conduction type of the buried layer can be disposed in a peripheral circuit and the potential of each well is independently controlled.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: July 24, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideshi Kuwabara, Hiroshi Yuzurihara, Takayuki Kimura, Mahito Shinohara
  • Publication number: 20060244090
    Abstract: An integrated circuit includes a photodiode produced from the formation of a stack of three semiconductor layers. An overdoped storage zone is formed in a second (middle) layer of the stack. A read transistor connected to the photodiode includes a gate formed above the stack and source/drain regions formed in a third (upper) layer of the stack. A first (bottom) layer of the stack forms a floating substrate. During integrated circuit fabrication, an implantation mask is placed above the gate and the stack having an opening which exposes a part of the gate and a part of the upper surface of the stack lying beside the exposed part of the gate. An oblique implantation of dopants is then made through the opening in the mask to form the storage zone such that it is at least partially located underneath the gate area of the read transistor.
    Type: Application
    Filed: April 7, 2006
    Publication date: November 2, 2006
    Applicant: STMicroelectronics S.A.
    Inventors: Francois Roy, Arnaud Tournier, Yann Marcellier
  • Patent number: 7095060
    Abstract: A unit according to the present invention includes a substrate and an IC chip used for driving a light-emitting device. A relay terminal is provided at a region spaced from peripheral areas of the substrate so as to connect the light-emitting device with the IC chip. The relay terminal is connected with a corresponding terminal of the IC chip via a connecting channel such as wire-bonding. The light-emitting device is supported by the substrate such that a terminal of the light-emitting device is electrically connected with the relay terminal. A length of a wiring line between the light-emitting device for an optical pick-up and the unit used for driving the light-emitting device is decreased.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: August 22, 2006
    Assignee: Pioneer Corporation
    Inventor: Kiyoshi Tateishi
  • Patent number: 7091536
    Abstract: A barrier implanted region of a first conductivity type located below an isolation region of a pixel sensor cell and spaced from a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The barrier implanted region is formed by conducting a plurality of deep implants at different energies and doping levels below the isolation region. The deep implants reduce surface leakage and dark current and increase the capacitance of the photodiode by acting as a reflective barrier to electrons generated by light in the doped region of the second conductivity type of the photodiode.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Howard Rhodes, Chandra Mouli
  • Publication number: 20060163575
    Abstract: A thin film transistor with a microlens. A metal gate is formed on a substrate. A gate dielectric covers the metal gate. A semiconductor layer is formed on the gate dielectric. Source/drain metal layers respectively overlap ends of the top surface of the semiconductor layer such that the semiconductor layer between the source/drain metal layers is exposed. The microlens is formed on the exposed top surface of the semiconductor layer.
    Type: Application
    Filed: July 26, 2005
    Publication date: July 27, 2006
    Inventor: Ming-Sung Shih