Autonomous Integrated Circuit
An autonomous integrated circuit (IC) includes a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate as a handle substrate; an insulating layer of the SOI substrate located on top of the solar cell; and a device layer formed on a top semiconductor layer of the SOI substrate located on top of the insulating layer, wherein a top contact of the device layer is electrically connected to a bottom contact of the solar cell such that the solar cell is enabled to power the device layer.
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This disclosure relates generally to the field of integrated circuits (ICs), and more specifically to integration of solar cells with ICs.
DESCRIPTION OF RELATED ARTIntegrated circuits include various types of devices, including complementary metal-oxide-semiconductor (CMOS) devices. An important factor in IC design is device density and speed. The more densely packed the CMOS devices in a given IC are, the more complex the IC is for a given chip area. High density gives a smaller chip the resources to perform more complex tasks, increasing yield and reducing costs. The higher the speed of the IC, the more computational power and throughput can be achieved with the IC.
One of the limiting factors on IC speed is the parasitic capacitance between individual CMOS devices in the IC, and between the CMOS devices and the IC substrate. A silicon-on-insulator (SOI) substrate may be used to fabricate an IC with reduced parasitic capacitance. An SOI substrate may include a relatively thin top semiconductor layer and a relatively thick bottom substrate separated by an insulating layer. The thickness of the bottom, or handle, substrate may vary from a few microns to hundreds of microns. CMOS devices may be fabricated using the top semiconductor layer. The insulating layer acts to reduce parasitic capacitance between the CMOS devices in the top semiconductor layer and the bottom substrate, which reduces power consumption and increases the speed of the IC.
SUMMARYIn one aspect, a method for forming an autonomous integrated circuit (IC) on a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a top semiconductor layer on top of an insulating layer on top of a bottom substrate, includes forming a solar cell on the bottom substrate of the SOI substrate as a handle substrate; forming a device layer, the device layer comprising a top contact, on the top semiconductor layer; and electrically connecting a bottom contact of the solar cell to the top contact of the device layer so as to enable the solar cell to power the device layer.
In another aspect, an autonomous integrated circuit (IC) includes a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate as a handle substrate; an insulating layer of the SOI substrate located on top of the solar cell; and a device layer formed on a top semiconductor layer of the SOI substrate located on top of the insulating layer, wherein a top contact of the device layer is electrically connected to a bottom contact of the solar cell such that the solar cell is enabled to power the device layer.
Additional features are realized through the techniques of the present exemplary embodiment. Other embodiments are described in detail herein and are considered a part of what is claimed. For a better understanding of the features of the exemplary embodiment, refer to the description and to the drawings.
Referring now to the drawings wherein like elements are numbered alike in the several FIGURES:
Embodiments of autonomous ICs and methods of forming autonomous ICs are provided, with exemplary embodiments being discussed below in detail. An IC may be autonomous (i.e., self-powering, or operable without an external power supply), through integration of a solar cell into the IC; the solar cell may power the CMOS device layer of the IC. Autonomous ICs may be used for many applications in order to eliminate the need for a power supply to power the IC. However, forming an autonomous IC by monolithic integration of a solar cell with the CMOS device layer on the top semiconductor layer of an SOI substrate may entail epitaxial growth of a relatively thick silicon (Si) layer on the top semiconductor layer in order to enable sufficient light absorption by the solar cell. Additionally, placing the solar cell on the top semiconductor layer of the SOI substrate may limit the area of the semiconductor material available for CMOS device fabrication. However, the thicker bottom substrate of the SOI substrate may be used as a handle substrate for formation of a solar cell, and CMOS devices may be formed on the top semiconductor layer of the SOI substrate, allowing formation of a relatively compact autonomous IC and efficient use of the SOI substrate.
In block 101, a solar cell 301 is formed using bottom substrate 203 as a handle substrate. Solar cell 301 may be any appropriate type of solar cell; the type of solar cell formed for solar cell 301 may be selected based on the power requirements of the finished autonomous IC. In various embodiments, solar cell may include but is not limited to a single junction (single or double-emitter) solar cell, a heterojunction solar cell, or tandem solar cell, or a multijunction solar cell.
After formation of solar cell 301 in block 101, a protective coating 302 is formed on the solar cell 301 in block 102. The protective coating 302 may include an oxide, such as transparent conducting oxide (TCO) or plasma enhanced oxide deposited using chemical vapor deposition (CVD), or a nitride in some embodiments.
In an autonomous IC that includes a single heterojunction solar cell 500 for solar cell 301, crystalline layers 501 and 502 may first be formed using bottom substrate 203, and protective coating 302 may be formed over crystalline layer 502. Then, a CMOS layer (discussed below with respect to
Returning to
In some embodiments, some or all of the steps of CMOS fabrication may occur before or during the formation of the SOI substrate that comprises the autonomous circuit. For example, a CMOS layer 701 may be formed separately in a semiconductor layer (which acts as top semiconductor layer 201), and then bonded to a solar cell 301 formed in a bottom substrate (which acts as bottom substrate 203) using a dielectric glue layer (which acts as insulating layer 202). Contact hole(s), such as for via 703, may be formed in the dielectric glue layer between the bonded CMOS layer 701 and solar cell 301.
After formation of CMOS device layer 701, including CMOS contact 702 and via 703, in block 103, in block 104, one or more contacts to solar cell 301 are formed, and the contacts to solar cell 301 are connected to CMOS contact 702, allowing solar cell 301 to power CMOS device layer 701, resulting in autonomous ICs 900A-B such as are shown in
The technical effects and benefits of exemplary embodiments include a relatively compact autonomous IC that makes efficient use of an SOI substrate.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an”, and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the invention. The embodiment was chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.
Claims
1. A method for forming an autonomous integrated circuit (IC) on a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a top semiconductor layer on top of an insulating layer on top of a bottom substrate, the method comprising:
- forming a solar cell on the bottom substrate of the SOI substrate as a handle substrate;
- forming a device layer, the device layer comprising a top contact, on the top semiconductor layer; and
- electrically connecting a bottom contact of the solar cell to the top contact of the device layer so as to enable the solar cell to power the device layer.
2. The method of claim 1, wherein the top semiconductor layer and bottom substrate comprise silicon, and wherein the insulating layer comprises silicon oxide.
3. The method of claim 1, further comprising forming a via through the insulating layer from the device layer to the solar cell.
4. The method of claim 1, further comprising forming a protective layer on the solar cell before forming the device layer.
5. The method of claim 4, wherein the protective layer comprises one of transparent conducting oxide and a nitride.
6. The method of claim 4, further comprising forming the bottom contact of the solar cell on the protective layer.
7. The method of claim 4, further comprising recessing the protective layer and forming the bottom contact of the solar cell on the solar cell.
8. The method of claim 4, further comprising removing the protective layer after forming the device layer and performing additional solar cell processing before forming a second protective layer on the solar cell, forming a bottom contact to the solar cell, and electrically connecting the bottom contact of the solar cell to the top contact of the device layer.
9. The method of claim 1, wherein the solar cell comprises one of a single junction solar cell, a single heterojunction solar cell, a multijunction solar cell, an interdigitated solar cell, and a tandem solar cell.
10. The method of claim 1, wherein the device layer comprises a complementary metal-oxide-semiconductor (CMOS) device layer.
11. The method of claim 1, wherein at least a portion of forming the solar cell using the bottom substrate of the SOI substrate as a handle substrate is performed before formation of the SOI substrate.
12. The method of claim 1, further comprising gluing the device layer to the solar cell using a dielectric glue, wherein the dielectric glue comprises the insulating layer, to form the SOI substrate.
13. An autonomous integrated circuit (IC), comprising;
- a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate as a handle substrate;
- an insulating layer of the SOI substrate located on top of the solar cell; and
- a device layer formed on a top semiconductor layer of the SOI substrate located on top of the insulating layer, wherein a top contact of the device layer is electrically connected to a bottom contact of the solar cell such that the solar cell is enabled to power the device layer.
14. The autonomous IC of claim 13, wherein the top semiconductor layer and bottom substrate comprise silicon, and wherein the insulating layer comprises silicon oxide.
15. The autonomous IC of claim 13, further comprising a via located in the insulating layer connecting the device layer to the solar cell.
16. The autonomous IC of claim 13, further comprising a protective layer located under the solar cell.
17. The autonomous IC of claim 16, wherein the protective layer comprises one of transparent conducting oxide and a nitride.
18. The autonomous IC of claim 16, wherein the bottom contact of the solar cell is formed on the protective layer.
19. The autonomous IC of claim 16, wherein the bottom contact of the solar cell is formed in a recess in the protective layer and on the solar cell.
20. The autonomous IC of claim 13, wherein the solar cell comprises one of a single junction solar cell, a single heterojunction solar cell, an interdigitated solar cell, and a tandem solar cell.
Type: Application
Filed: Nov 15, 2010
Publication Date: May 17, 2012
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION (Armonk, NY)
Inventors: Stephen W. Bedell (Wappingers Falls, NY), Norma E. Sosa Cortes (New York, NY), Wilfried E. Haensch (Somers, NY), Steven J. Koester (Edina, MN), Devendra K. Sadana (Pleasantville, NY), Katherine L. Saenger (Ossining, NY), Ghavam Shahidi (Round Ridge, NY), Davood Shahrjerdi (Ossining, NY)
Application Number: 12/946,216
International Classification: H01L 31/0264 (20060101); H01L 31/18 (20060101);