Elastic membrane for semiconductor wafer polishing apparatus
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The broken lines shown in the drawings represent portions of the elastic membrane for semiconductor wafer polishing apparatus that form no part of the claimed design. The dashed-dot-dashed lines represent the boundary lines of the claimed design.
All surfaces not shown form no part of the claimed design.
Claims
The ornamental design for an elastic membrane for semiconductor wafer polishing apparatus, as shown and described.
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Type: Grant
Filed: Apr 30, 2014
Date of Patent: Nov 8, 2016
Assignee: EBARA CORPORATION (Tokyo)
Inventors: Makoto Fukushima (Tokyo), Hozumi Yasuda (Tokyo), Keisuke Namiki (Tokyo), Osamu Nabeya (Tokyo), Shingo Togashi (Tokyo), Satoru Yamaki (Tokyo)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/489,477