Substrate for an electronic circuit
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Description
The broken lines shown in the drawings represent portions of the substrate for an electronic circuit that form no part of the claimed design.
Claims
The ornamental design for a substrate for an electronic circuit, as shown and described.
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Patent History
Patent number: D778850
Type: Grant
Filed: May 13, 2016
Date of Patent: Feb 14, 2017
Assignee: Kabushiki Kaisha Toshiba (Minato-ku, Tokyo)
Inventors: Manabu Matsumoto (Yokohami), Isao Ozawa (Chigasaki)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/564,493
Type: Grant
Filed: May 13, 2016
Date of Patent: Feb 14, 2017
Assignee: Kabushiki Kaisha Toshiba (Minato-ku, Tokyo)
Inventors: Manabu Matsumoto (Yokohami), Isao Ozawa (Chigasaki)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/564,493
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)