Abstract: The disclosed subject matter pertains to deposition of thin film or thin foil materials in general, but more specifically to deposition of epitaxial monocrystalline or quasi-monocrystalline silicon film (epi film) for use in manufacturing of high efficiency solar cells. In operation, methods are disclosed which extend the reusable life and to reduce the amortized cost of a substrate or template used in the manufacturing process of silicon solar cells. Further, methods are disclosed which provide for the conversion of a low quality starting surface into an improved quality starting surface of a silicon wafer.

Abstract: A method for growing a semi-polar nitride semiconductor thin film via metalorganic chemical vapor deposition (MOCVD) on a substrate, wherein a nitride nucleation or buffer layer is grown on the substrate prior to the growth of the semi-polar nitride semiconductor thin film.

Abstract: A polarizer is provided comprising: a transparent substrate, on a main surface of which a plurality of grooves in parallel with each other are provided at an interval; a birefringence crystal layer with a single orientation formed on the main surface of the transparent substrate where the grooves are provided, wherein the birefringence crystal layer is at least filled in the grooves so that linearly polarized light incident on a location corresponding to the grooves and passing through the polarizer is converted into first polarized light, and linearly polarized light incident on a location between the grooves and passing through the polarizer is converted into second polarized light, the polarization directions of the first and the second polarized light are different from each other.

Abstract: Disclosed is a method of manufacturing a silicon thin film, a method of manufacturing a silicon thin-film photovoltaic cell, and a silicon thin film. There is provided a method of manufacturing a silicon thin film in a form in which an inert face formed by an exposed face of a silicon substrate and an inert layer is formed by selectively forming the inert layer on the silicon substrate in which growth of a silicon crystal is inactive for a raw material gas of the silicon crystal, and the silicon crystal is grown from the exposed face such that the silicon crystal covers the silicon substrate by supplying a raw material gas, of which a surface decomposition reaction on the silicon substrate is dominant, out of the raw material gas to the silicon substrate. By forming a width of the exposed face in a range of 0.001 ?m to 1 ?m, the silicon thin film is formed in a state that the silicon thin film can be peeled off from the silicon substrate.

Abstract: An epitaxial substrate for electronic devices, in which current flows in a lateral direction and of which warpage configuration is properly controlled, and a method of producing the same. The epitaxial substrate for electronic devices is produced by forming a bonded substrate by bonding a low-resistance Si single crystal substrate and a high-resistance Si single crystal substrate together; forming a buffer as an insulating layer on a surface of the bonded substrate on the high-resistance Si single crystal substrate side; and producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate. The resistivity of the low-resistance Si single crystal substrate is 100 ?·cm or less, and the resistivity of the high-resistance Si single crystal substrate is 1000 ?·cm or more.

Abstract: A manufacturing method of an SiC single crystal includes preparing an SiC substrate, implanting ions into a surface portion of the SiC substrate to form an ion implantation layer, activating the ions implanted into the surface portion of the SiC substrate by annealing, chemically etching the surface portion of the SiC substrate to form an etch pit that is caused by a threading screw dislocation included in the SiC substrate and performing an epitaxial growth of SiC to form an SiC growth layer on a surface of the SiC substrate including an inner wall of the etch pit in such a manner that portions of the SiC growth layer grown on the inner wall of the etch pit join with each other.

Abstract: Mechanisms are disclosed by which a semiconductor wafer, silicon in some embodiments, is repeatedly used to serve as a template and carrier for fabricating high efficiency capable thin semiconductor solar cells substrates. Mechanisms that enable such repeated use of these templates at consistent quality and with high yield are disclosed.

Abstract: A method of fabricating a III-nitride power semiconductor device which includes selective prevention of the growth of III-nitride semiconductor bodies to selected areas on a substrate in order to reduce stresses and prevent cracking.

Abstract: A device includes an epitaxially grown crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by creating process parameters which result in the dominant growth component of the crystal to be supplied laterally from side walls of the insulator. In a preferred embodiment, the area confined by the insulator is an opening in the insulator having an aspect ratio sufficient to trap defects using an ART technique.

Abstract: A semiconductor device is provided in which the contact resistance of the interface between an electrode and the semiconductor substrate is reduced. The semiconductor device includes a 4H polytype SiC substrate, and an electrode formed on a surface of the substrate. A 3C polytype layer, which extends obliquely relative to the surface of the substrate and whose end portion at the substrate surface is in contact with the electrode, is formed at the surface of the substrate. The 3C polytype layer has a lower bandgap than 4H polytype. Hence, electrons present in the 4H polytype region pass through the 3C polytype layer and reach the electrode. More precisely, the width of the passageway of the electrons is determined by the thickness of the 3C polytype layer. Consequently, with this semiconductor device, in which the passageway of the electrons is narrow, the electrons are able to reach the electrode at a speed close to the theoretical value, by the quantum wire effect.

Abstract: A mask for crystallizing a semiconductor layer includes a plurality of first main-slit portions, a plurality of second main-slit portions, upper slit portion and lower slit portion. The first main-slit portions extend along an inclined direction with respect to a first direction. The second main-slit portions are spaced apart from the first main-slit portions. The upper slit portion is disposed on the first main-slit portions along a second direction to be parallel to the first main-slit portions, and extends partway over the second main-slit portions to be longer than the first main-slit portions. The lower slit portion is disposed under the second main-slit portions along the second direction to be parallel to the second main-slit portions, and extends partway under the first main-slit portions to be longer than the second main-slit portions.

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.

Abstract: Methods of cleaning substrates and growing epitaxial silicon thereon are provided. Wafers are exposed to a plasma for a sufficient time prior to epitaxial silicon growth, in order to clean the wafers. The methods exhibit enhanced selectivity and reduced lateral growth of epitaxial silicon. The wafers may have dielectric areas that are passivated by the exposure of the wafer to a plasma.

Abstract: A process for producing a silicon carbide single crystal in which a silicon carbide single crystal layer is homo-epitaxially or hetero-epitaxially grown on a surface of a single crystal substrate, wherein a plurality of substantially parallel undulation ridges that extend in a first direction on the single crystal substrate surface is formed on said single crystal substrate surface; each of the undulation ridges on said single crystal substrate surface has a height that undulates as each of the undulation ridges extends in the first direction; and the undulation ridges are disposed so that planar defects composed of anti-phase boundaries and/or twin bands that propagate together with the epitaxial growth of the silicon carbide single crystal merge with each other.

Abstract: A laser has a laser material in thermal contact with a diamond, such that the diamond is operable to carry heat away from the laser material. In further embodiments, the diamond has a reduced nitrogen content, is a reduced carbon-13 content, is a monocrystalline or multilayer low-strain diamond, or has a thermal conductivity of greater than 2200 W/mK.

Abstract: Methods of depositing a III-V semiconductor material on a substrate include sequentially introducing a gaseous precursor of a group III element and a gaseous precursor of a group V element to the substrate by altering spatial positioning of the substrate with respect to a plurality of gas columns. For example, the substrate may be moved relative to a plurality of substantially aligned gas columns, each disposing a different precursor. Thermalizing gas injectors for generating the precursors may include an inlet, a thermalizing conduit, a liquid container configured to hold a liquid reagent therein, and an outlet. Deposition systems for forming one or more III-V semiconductor materials on a surface of the substrate may include one or more such thermalizing gas injectors configured to direct the precursor to the substrate via the plurality of gas columns.

Abstract: An SOI substrate has a gettering layer of silicon-germanium (SiGe) with 5-10% Ge, and a thickness of approximately 50-1000 nm. Carbon (C) may be added to SiGe to stabilize the dislocation network. The SOI substrate may be a SIMOX SOI substrate, or a bonded SOI substrate, or a seeded SOI substrate. The gettering layer may disposed under a buried oxide (BOX) layer. The gettering layer may be disposed on a backside of the substrate.

Abstract: To provide a manufacturing method of a semiconductor device, comprising: loading a substrate, with a silicon surface exposed at a part of the substrate, into a processing chamber; heating an inside of said processing chamber; performing pre-processing of supplying at least silane-based gas, halogen-based gas, and hydrogen gas into said processing chamber, removing at least a natural oxide film or a contaminated matter that exist on a surface of said silicon surface, and growing an epitaxial film on said silicon surface; and supplying gas containing at least silicon into said processing chamber after said pre-processing, and further growing the epitaxial film on said epitaxial film.

Abstract: A method of making a group III nitride-based compound semiconductor includes providing a semiconductor substrate comprising group III nitride-based compound semiconductor, polishing a surface of said semiconductor substrate such that said polished surface includes an inclined surface that has an off-angle ? of 0.15 degrees or more and 0.6 degrees or less to one of an a-face, a c-face and an m-face of the semiconductor substrate, providing a stripe-shaped specific region on the polished surface, the specific region comprising a material that prevents the growth of the group III nitride-based compound semiconductor on its surface, and growing a semiconductor epitaxial growth layer of group III nitride-based compound semiconductor on the polished surface of the semiconductor substrate.

Abstract: Embodiments of the present invention generally relate to apparatus and methods for uniformly heating substrates. The apparatus include a transferable puck having at least one electrode and a dielectric coating. The transferable puck can be biased with a biasing assembly relative to a substrate, and transferred independently of the biasing assembly during a fabrication process while maintaining the bias relative to the substrate. The puck absorbs radiant heat from a heat source and uniformly conducts the heat to a substrate coupled to the puck. The puck has high emissivity and high thermal conductivity for absorbing and transferring the radiant heat to the substrate. The high thermal conductivity allows for a uniform temperature profile across the substrate, thereby increasing deposition uniformity. The method includes disposing a light-absorbing material on an optically transparent substrate, and radiating the light-absorbing material with a radiant heat source to heat the optically transparent substrate.

Abstract: A nanocomposite article that includes a single-crystal or single-crystal-like substrate and heteroepitaxial, phase-separated layer supported by a surface of the substrate and a method of making the same are described. The heteroepitaxial layer can include a continuous, non-magnetic, crystalline, matrix phase, and an ordered, magnetic magnetic phase disposed within the matrix phase. The ordered magnetic phase can include a plurality of self-assembled crystalline nanostructures of a magnetic material. The phase-separated layer and the single crystal substrate can be separated by a buffer layer. An electronic storage device that includes a read-write head and a nanocomposite article with a data storage density of 0.75 Tb/in2 is also described.

Abstract: In a base material with a single-crystal silicon carbide film according to an embodiment of the invention, a plurality of recessed portions is formed on the surface of a silicon substrate, an insulating film including silicon oxide is formed across the surface of the silicon substrate including the inner surfaces of the recessed portions, the top surfaces of side wall portions of recessed portions of the insulating film form flat surfaces, a single-crystal silicon carbide film is joined on the flat surfaces, and the recessed portions below the single-crystal silicon carbide film form holes.

Abstract: The invention relates to methods for fabricating a semiconductor substrate. In one embodiment, the method includes providing an support that includes a barrier layer thereon for preventing loss by diffusion of elements derived from dissociation of the support at epitaxial growth temperatures; providing a seed layer on the barrier layer, wherein the seed layer facilitates epitaxial growth of a single crystal III-nitride semiconductor layer thereon; epitaxially growing a nitride working layer on the thin seed layer; and removing the support to form the substrate.

Abstract: Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

Abstract: An object is to provide a single-crystal diamond growth base material and a method for manufacturing a single-crystal diamond substrate that enable growing single-crystal diamond having a large area and excellent crystallinity and inexpensively manufacturing a high-quality single-crystal diamond substrate. A single-crystal diamond growth base material on which single-crystal diamond is grown comprises at least: a base substrate consisting of a material having a linear expansion coefficient smaller than that of MgO and not smaller than 0.5×10?6/K; a single-crystal MgO layer formed on a face of the base substrate where the single-crystal diamond is grown by a bonding method; and a film constituted of any one of an iridium film, a rhodium film, and a platinum film heteroepitaxially grown on the single-crystal MgO layer.

Abstract: Crystal silicon processes and products (100) are disclosed. In any exemplary embodiment, a biaxially textured metal substrate (110) was fabricated by the Rolling-Assisted Biaxially Textured Substrate (RABiTS) process. Electron beam evaporation was used to grow buffer layers (120) heteroepitaxially on the metal substrate (110) as a buffer layer (120). After growth of the buffer layer (120), a silicon layer was grown using hot wire chemical vapor deposition (HWCVD). The silicon film had the same grain size as the underlying metal substrate (110). In addition, the orientation of these grains matched the orientations of the underlying metal substrate (110).

Abstract: A relaxed InGaN template is formed by growing a GaN or InGaN nucleation layer at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures on the nucleation layer. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention.

Abstract: Epitaxy is carried out by immersing a single crystal substrate having a first principal surface, a second principal surface and a dislocation exposed on the first principal surface into an electrolytic solution including a cation of a metal having a melting point; carrying out electrolytic plating on the first principal surface to deposit the metal on the dislocation so as to cover the dislocation with the metal but leave a portion of the first principal surface where the dislocation is exposed uncovered with the metal; and causing epitaxy of a semiconductor layer on both the portion of the first principal surface and the metal covering the dislocation at a temperature below the melting point.

Abstract: A method for forming a graphene layer is disclosed herein. The method includes establishing an insulating layer on a substrate such that at least one seed region, which exposes a surface of the substrate, is formed. A seed material in the seed region is exposed to a carbon-containing precursor gas, thereby initiating nucleation of the graphene layer on the seed material and enabling lateral growth of the graphene layer along at least a portion of a surface of the insulating layer.

Abstract: The present invention relates to a method for fabricating a filament type high-temperature superconducting wire in which a thin film type high-temperature superconducting wire is fabricated into a filament shape suitable for use with alternating current.

Abstract: The invention provides an epitaxial growth method which is a single wafer processing epitaxial growth method by which at least a single crystal substrate is placed in a reaction chamber with an upper wall having a downward convexity and an epitaxial layer is deposited on the single crystal substrate by introducing raw material gas and carrier gas into the reaction chamber through a gas feed port, in which, after any one of the radius of curvature of the upper wall of the reaction chamber and a difference between an upper end of the gas feed port and a lower end of the upper wall of the reaction chamber in the height direction or both are adjusted in accordance with the flow rate of the carrier gas which is introduced into the reaction chamber through the gas feed port, an epitaxial layer is deposited on the single crystal substrate.

Abstract: A GaN nanorod and formation method. Formation includes providing a substrate having a GaN film, depositing SiNx on the GaN film, etching a growth opening through the SiNx and into the GaN film, growing a GaN nanorod through the growth opening, the nanorod having a nanopore running substantially through its centerline. Focused ion beam etching can be used. The growing can be done using organometallic vapor phase epitaxy. The nanopore diameter can be controlled using the growth opening diameter or the growing step duration. The GaN nanorods can be removed from the substrate. The SiNx layer can be removed after the growing step. A SiOx template can be formed on the GaN film and the GaN can be grown to cover the SiOx template before depositing SiNx on the GaN film. The SiOx template can be removed after growing the nanorods.

Abstract: In a first aspect, a method is provided for forming an epitaxial layer stack on a substrate. The method includes (1) selecting a target carbon concentration for the epitaxial layer stack; (2) forming a carbon-containing silicon layer on the substrate, the carbon-containing silicon layer having at least one of an initial carbon concentration, a thickness and a deposition time selected based on the selected target carbon concentration; and (3) forming a non-carbon-containing silicon layer on the carbon-containing silicon layer prior to etching. Numerous other aspects are provided.

Abstract: In a method of growing GaN crystal in one aspect, the following steps are performed. An underlying substrate is prepared. Then, a mask layer having an opening portion and composed of SiO2 is formed on the underlying substrate. Then, GaN crystal is grown on the underlying substrate and the mask layer. The mask layer has surface roughness Rms not greater than 2 nm or a radius of curvature not smaller than 8 m. In a method of growing GaN crystal in one aspect, the following steps are performed. An underlying substrate is prepared. Then, using a resist, a mask layer having an opening portion is formed on the underlying substrate. Then, the underlying substrate and the mask layer are cleaned with an acid solution. Then, after of cleaning with an acid solution, the underlying substrate and the mask layer are cleaned with an organic solvent. Then, GaN crystal is grown on the underlying substrate and the mask layer.

Abstract: A device for heat treating (annealing) a III-V semiconductor wafer comprises at least one wafer support unit which is dimensioned such that a cover provided above the wafer surface is either spaced without any distance or with a distance of maximally about 2 mm to the wafer surface. A process for heat treating III-V semiconductor wafers having diameters larger than 100 mm and a dislocation density below 1×104 cm?2 is carried out in the device of the invention. SI GaAs wafers produced have an at least 25% increased characteristic fracture strength (Weibull distribution), an improved radial macroscopic and mesoscopic homogeneity and an improved quality of the mechano-chemically polished surface. The characteristic fracture strength is higher than 1900 MPa.

Abstract: An epitaxial growth process for producing a thick III-N layer, wherein III denotes at least one element of group III of the periodic table of elements, is disclosed, wherein a thick III-N layer is deposited above a foreign substrate. The epitaxial growth process preferably is carried out by HVPE. The substrate can also be a template comprising the foreign substrate and at least one thin III-N intermediate layer. The surface quality is improved by providing a slight intentional misorientation of the substrate, and/or a reduction of the N/III ratio and/or the reactor pressure towards the end of the epitaxial growth process. Substrates and semiconductor devices with such improved III-N layers are also disclosed.

Abstract: To provide a group III nitride crystal having sufficient conductivity and capable of growing in a short time, for growing the group III nitride crystal on a base substrate by vapor deposition at a growth rate of greater than 450 ?m/hour and 2 mm/hour or less, by using a group III halogenated gas and NH3 gas, wherein Ge is doped into the group III nitride crystal by suing GeCl4 as a doping source, so that resistivity of the group III nitride crystal is 1×10?3 ?cm or more and 1×10?2 ?cm or less.

Abstract: A manufacturing method of a group III nitride semiconductor crystal is provided, comprising: the step of preparing a seed crystal; and the convex surface growing step of growing the group III nitride semiconductor crystal, with a growth surface of the group III nitride semiconductor crystal constituted only by a plurality of surfaces not vertical to a growth direction, and the growth surface constituted of the plurality of surfaces formed into a convex shape as a whole.

Abstract: Embodiments of the invention include a selective deposition method that allows for coating of selective portions of an object, such as an electronic device, and inhibits coating of other selective portions of the object, such as the electric contacts. The selective deposition method includes providing a web to transport the object through a deposition chamber. The web may include and reference mechanisms to register the object relative to the web. The method further includes providing deposition material and a shadow mask that has open spaces in it to inhibit coating selective portions of the object. The deposition material serves as the coating material.

Abstract: A system (10) for monitoring and controlling a fabrication process includes at least a first subsystem (12), a crystallographic analysis subsystem (14), and a second subsystem (16), wherein the first subsystem and second subsystem perform respective fabrication steps on a workpiece. The crystallographic analysis subsystem may be coupled to both the first subsystem and second subsystem. The analysis subsystem acquires crystallographic information from the workpiece after the workpiece undergoes a fabrication step by the first subsystem and then provides information, based on the crystallographic information acquired, for modifying parameters associated with the respective fabrication steps. The system may also include neural networks (24, 28) to adaptively modify, based on historical process data (32), parameters provided to the respective fabrication steps. The analysis subsystem may include a electromagnetic source (61), a detector (66), a processor (67), a controller (68) and a scanning actuator (65).

Abstract: A method of producing a grown single crystal diamond substrate comprising: (a) providing a first diamond substrate which presents a (001) major surface, which major surface is bounded by at least one <100> edge, the length of the said at least one <100> edge exceeding any dimension of the surface that is orthogonal to the said at least one <100> edge by a ratio of at least 1.3:1; and (b) growing diamond material homoepitaxially on the (001) major surface of the diamond material surface under chemical vapour deposition (CVD) synthesis conditions, the diamond material growing both normal to the major (001) surface, and laterally therefrom.

Abstract: There is provided a zinc oxide based compound semiconductor device which, even when a semiconductor device is formed by forming a lamination portion having a hetero junction of ZnO based compound semiconductor layers, does not cause any rise in a drive voltage while ensuring p-type doping, and, at the same time, can realize good crystallinity and excellent device characteristics. ZnO based compound semiconductor layers (2) to (6) are epitaxially grown on the principal plane of a substrate (1) made of MgxZn1-xO (0?x<1). The principal plane of the substrate is a plane in which an A plane {11-20} or an M plane {10-10} is inclined in a direction of ?c axis.

Abstract: A diamond single crystal substrate obtained by a vapor-phase growth method, wherein the diamond intrinsic Raman shift of the diamond single crystal substrate surface measured by microscopic Raman spectroscopy with a focused beam spot diameter of excitation light of 2 ?m is deviated by +0.5 cm?1 or more to +3.0 cm?1 or less from the standard Raman shift quantity of strain-free diamond, in a region (region A) which is more than 0% to not more than 25% of the surface, and is deviated by ?1.0 cm?1 or more to less than +0.5 cm?1 from the standard Raman shift quantity of strain-free diamond, in a region (region B) of the surface other than the region A. The diamond single crystal substrate can be obtained with a large size and high-quality without cracking and is suitable for semiconductor materials, electronic components, and optical components or the like.

Abstract: A method of growing high quality crystalline films on lattice-mismatched or amorphous layers is presented allowing semiconductor materials that would normally be subject to high stress and cracking to be employed allowing cost reductions and/or performance improvements in devices to be obtained. Catalysis of the growth of these films is based upon utilizing particular combinations of metals, materials, and structures to establish growth of the crystalline film from a predetermined location. The subsequent film growth occurring in one or two dimensions to cover a predetermined area of the amorphous or lattice-mismatched substrate. Accordingly the technique can be used to either cover a large area or provide tiles of crystalline material with or without crystalline film interconnections.

Abstract: In order to provide a method for manufacturing a single crystal SiC substrate that can obtain an SiC layer with good crystallinity, an Si substrate 1 having a surface Si layer 3 of a predetermined thickness and an embedded insulating layer 4 is prepared, and when the Si substrate 1 is heated in a carbon-series gas atmosphere to convert the surface Si layer 3 into a single crystal SiC layer 6, surface Si layer 3 into a single crystal SIC layer 6, the Si layer in the vicinity of an interface 8 with the embedded insulating layer 4 is left as a residual Si layer 5.

Abstract: Epitaxially coated silicon wafers, are produced by epitaxially coating a multiplicity of wafers polished at least on their front sides, successively and individually in an epitaxy reactor, by placing a silicon wafer on a susceptor, pretreating under a hydrogen atmosphere followed by addition of an etching medium to the hydrogen atmosphere, coating epitaxially on the polished front side and removing the water from the epitaxy reactor. The susceptor is then heated, in each case, to a temperature of at least 1000° C. under a hydrogen atmosphere, and furthermore an etching treatment of the susceptor and a momentary coating of the susceptor with silicon are effected after a specific number of epitaxial coatings. Silicon wafers characterized by a parameter R30-1 mm of ?10 nm to +10 nm, determined at a distance of 1 mm from the edge of the silicon wafer are produced.

Abstract: The present invention is a base material for growing a single crystal diamond comprising a single crystal silicon substrate, a MgO film heteroepitaxially grown on a side of the single crystal silicon substrate where the single crystal diamond is to be grown, and an iridium film or a rhodium film heteroepitaxially grown on the MgO film. As a result, there is provided a base material for growing a single crystal diamond and a method for producing a single crystal diamond substrate which can grow the single crystal diamond having a large area and good crystallinity and produce a high quality single crystal diamond substrate at low cost.

Abstract: A semiconductor substrate includes: a substrate having a single crystal silicon on at least one surface thereof; a buffer layer that is provided on the single crystal silicon and has at least one cobalt silicide layer primarily containing cobalt silicide; and a silicon carbide single crystal film provided on the buffer layer.

Abstract: The invention provides a high temperature (about 1150° C. or greater) annealing process for converting thick polycrystalline Si layers on the order of 1 ?m to 40 ?m on a single crystal seed layer into thick single crystal Si layers having the orientation of the seed layer, thus allowing production of thick Si films having the quality of single crystal silicon at high rates and low cost of processing. Methods of integrating such high temperature processing into solar cell fabrication are described, with particular attention to process flows in which the seed layer is disposed on a porous silicon release layer. Another aspect pertains to the use of similar high temperature anneals for poly-Si grain growth and grain boundary passivation. A further aspect relates to structures in which these thick single crystal Si films and passivated poly-Si films are incorporated.

Abstract: A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having a major surface and made of a material different from a nitride semiconductor, the first selective growth mask having a plurality of first windows for selectively exposing the upper surface of the support member, and the step of growing nitride semiconductor portions from the upper surface, of the support member, which is exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on the upper surface of the selective growth mask.