Abstract: A printed wiring board includes a core insulation layer having via conductors through the core layer, a first structure including an interlayer insulation layer on first surface of the core layer and having via conductors through the interlayer layer in the first structure, and a second structure including an interlayer insulation layer on second surface of the core layer and having via conductors through the interlayer layer in the second structure. The interlayer layers have dielectric constants set to be 4.0 or lower for signal transmission at frequency of 1 GHz, the core layer has thermal expansion coefficient at or below Tg set lower than thermal expansion coefficients of the interlayer layers at or below Tg, the coefficient of the core layer at or below Tg is set to be 75 ppm/° C. or lower, and the conductors in the interlayer layers are stacked on the conductors in the core layer.

Abstract: A patterned transparent conductor includes a substrate and additives at least partially embedded into at least one surface of the substrate and localized adjacent to the surface according to a pattern to form higher sheet conductance portions. The higher sheet conductance portions are laterally adjacent to lower sheet conductance portions.

Abstract: In a multilayer board, a stacked body includes thermoplastic resin films and low-fluidity resin films with conductive patterns, which are alternately stacked. The stacked body and a resin base film are integrated by hot pressing. The base film has a terminal-connecting through hole for receiving an electrode terminal of an electronic component to be connected to a conductive pattern of the low-fluidity resin film disposed at an end of the stacked body. An electronic component mounting section of the stacked body, which is an area corresponding to the electronic component mounted on the base film in a stacking direction, is configured such that a number of the conductive patterns located in a corresponding section that corresponds to the through hole in the stacking direction is greater than a number of the conductive patterns located in a non-corresponding section without corresponding to the through hole in the stacking direction.

Abstract: Boric acid has been found to provide anticorrosion properties when incorporated into silver nanowire containing films. Such compounds may be incorporated into one or more silver nanowire containing layers or in one or more layers disposed adjacent to the silver nanowire containing layers.

Abstract: A printed circuit board of the present invention includes a base body, a through-hole that penetrates through the base body in the thickness direction, and a through-hole conductor that covers an inner wall of the through-hole. The base body has a fiber layer including a plurality of glass fibers and a resin that covers the plurality of glass fibers. The glass fibers have a groove-shaped concavity on a surface exposed to the inner wall of the through-hole. The concavity is filled with a part of the through-hole conductor.

Abstract: The invention discloses a curved display module and a display device. The curved display module includes an enclosure, at least one opening, a flexible display panel and an Optical Clear Adhesive (OCA) layer. There is a first curved surface inside the enclosure. A cavity is formed within the enclosure. The at least one opening are disposed on at least one edge of the enclosure and connected to the cavity. The flexible display panel is disposed on the first curved surface in the cavity. The OCA layer is disposed within the cavity. The OCA layer directly covers the flexible display panel.

Abstract: Provided are a wiring substrate; a multi-piece wiring substrate array; and a method for reliably producing the multi-piece wiring substrate array. The wiring substrate includes a substrate main body, which has first and second main surfaces, side surfaces, a groove surface, and a fracture surface; and a notch which has a concave shape in plan view, and which is provided on a side surface on a side toward the first main surface, wherein, in the side surface having the notch, the boundary between the groove surface and the fracture surface has first curved portions on opposite sides of the notch, the first curved portions being convex toward the first main surface in side view; and also has a second curved portion on a second-main-surface side of the notch, the second curved portion being convex toward the second main surface of the substrate main body in side view.

Abstract: A method for manufacturing a Z-directed component for insertion into a mounting hole in a printed circuit board according to one example embodiment includes simultaneously extruding a plurality of materials in the cross-sectional shape of the Z-directed component to form an extruded object with the plurality of materials arranged relative to each other in their operative positions for the Z-directed component. The extrusion of a first portion of at least one of the materials in the extruded object is staggered relative to the extrusion of a second portion of the at least one of the materials in the extruded object. At least a segment of the extruded object is fired. The fired segment forms the Z-directed component insertable into a mounting hole in a printed circuit board.

Abstract: A method of manufacturing a capacitor-embedded printed circuit board using a first conductive layer formed on one side of an insulation layer, the method including: forming a second conductive layer on one side of the first conductive layer; forming a second electrode by removing a portion of the second conductive layer; forming a first electrode by removing a portion of the first conductive layer in correspondence with the second electrode; and forming a dielectric layer on one side of the second electrode.

Abstract: A metal plate covers an opening on the upper surface of a core substrate and exposes an outer edge of the upper surface of the core substrate. A conductive layer covers the lower surface of the core substrate. A semiconductor chip bonded to a first surface of the metal plate is exposed through the opening. A first insulating layer covers the upper and side surface of the metal plate and the outer edge of the upper surface of the core substrate. A second insulating layer fills the openings of the metal plate and the conductive layer and covers the outer edge of the lower surface of the core substrate, the conductive layer, and the semiconductor chip. The metal plate is thinner than the semiconductor chip. Total thickness of the conductive layer and the core substrate is equal to or larger than the thickness of the semiconductor chip.

Abstract: A patterned conductive structure includes a transparent substrate having a substrate surface. A conductive polymer layer is formed on the substrate surface. The conductive polymer layer has electrically conductive areas and deactivated areas that are less electrically conductive than the conductive areas. The conductive areas and the deactivated areas form a conductive pattern in the polymer layer. One or more transparent dielectric patches that are less electrically conductive than the deactivated areas are formed over at least a portion of one or more deactivated areas and one or more conductive wires are formed over at least one of the dielectric patches.

Abstract: An interconnection component includes an element with an opening, a plurality of conductors electrically insulted from one another extending through the opening, and a plurality of second contacts electrically insulated from one another. The element is comprised of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. At least some of the conductors extend along at least one inner surface of the opening. The conductors define a plurality of wettable first contacts at the first surface. The first contacts are at least partially aligned with the opening in a direction of the thickness and electrically insulated from one another.

Abstract: A method for attaching a metal surface to a carrier is provided, the method including: forming a first polymer layer over the metal surface; forming a second polymer layer over a surface of the carrier; and bringing the first polymer layer into physical contact with the second polymer layer such that at least one of an interpenetrating polymer structure and an inter-diffusing polymer structure is formed between the first polymer layer and the second polymer layer.

Abstract: An apparatus and method for temperature induced warpage compensation in an integrated circuit package is disclosed. The apparatus consists of bonded layers of material having different thermal coefficients of expansion. The bonded layers are bonded to the top of the integrated circuit package. By appropriate choice of temperature coefficients the layers of material can compensate for either convex or concave warpage. In some embodiments, the layers of material have apertures therein allowing compensation for more complex warpages. As well, in some embodiments the top layer of material does not have a planar cross-section. A method is also disclosed for manufacturing an integrated circuit package assembly. The apparatus and method provide an alternative to methods of dealing with IC package warpage known in the art.

Abstract: The present invention relates to a device with portions of the device on plural substrate surfaces. The device includes a low resistivity substrate having first and second surfaces with a first electrically-conductive device component disposed over a first surface. An intermediate electrically-insulating layer may be disposed between the electrically-conductive component and the low resistivity substrate. A second electrically-conductive component is disposed over the second surface of the low resistivity substrate. A cavity formed in the low resistivity substrate is at least partially filled with a high resistivity material. One or more electrically-conducting pathways are formed in the high resistivity material electrically connecting the first electrically conductive component and the second electrically-conductive component to form a device. Exemplary devices include inductors, capacitors, antennas and active or passive devices incorporating such devices.

Abstract: A conductor for a flexible substrate, used for a flexible flat cable or disposed inside a flexible printed-circuit board, according to the present invention comprises: a base conductor made of Cu or Cu-alloy; a plating film made of Sn or Sn-alloy formed on a surface of the base conductor; and a surface oxide film formed on a surface of the plating film, in which the surface oxide film includes oxide of an element other than Sn or a mixture of Sn oxide and oxide of an element other than Sn.

Abstract: The invention relates inter alia to an arrangement comprising a carrier (10), a layer and a material (20) enclosed between the carrier and the layer. According to the invention, it is provided that the layer is formed by a single two-dimensionally crosslinked layer (40) or by a plurality of two-dimensionally crosslinked layers which are indirectly or directly connected to one another.

Abstract: A substrate structure for carrying plural heat generating elements is provided. The substrate structure includes a board, a patterned metal layer and plural heat dissipating channels. The board has an upper surface. The patterned metal layer is disposed on the board and includes a first electrode, a second electrode, plural first pads and plural second pads. The first pads and the second pads are alternatively disposed on the upper surface in parallel. Parts of the first (second) pads are electrically connected to the first (second) electrode. The other parts of first pads and the other parts of second pads are electrically connected to each other. Each first pad and the adjacent second pad define a device bonding area. The heat generating elements are respectively disposed in the device bonding areas. There are multiple trenches between the two adjacent device bonding areas. The heat dissipating channels are disposed in the trenches.

Abstract: A wiring board of this invention includes a product formation area in which are arranged a plurality of product formation sections on which a semiconductor chip is mounted; a molding area that is provided on an outer circumferential side of the product formation area, and with which a seal portion that covers the semiconductor chips mounted on the product formation sections makes contact; a clamp area that is provided on an outer circumferential side of the molding area, and that is held by a molding die that forms the seal portion; wiring that is provided in the product formation area, and that is electrically connected to the semiconductor chips; a first solid pattern that is provided in the molding area, and in which a plurality of dots are arranged; and a second solid pattern that is provided in the clamp area, and in which a plurality of dots that are larger than the dots of the first solid pattern are arranged.

Abstract: A wiring substrate includes: a plate-like base material containing carbon fibers; a wiring layer formed on a surface of the base material; a first via including a first through hole penetrating through the base material, a first resin layer formed on an inner wall of the first through hole and including a second through hole, and a first conductive layer formed on an inner wall of the second through hole; and a second via including a third through hole penetrating through the base material and a second conductive layer formed on an inner wall of the third through hole, wherein an inside diameter of the third through hole is greater than an inside diameter of the second through hole.

Abstract: Providing a connecting structure for connecting first electrodes formed on the upper surface of a first substrate to second electrodes formed on the upper surface of a second substrate glued on the upper surface of the first substrate by an electrically conductive member, wherein the second substrate is smaller in its outer size than the first substrate, the first electrodes are arranged on the first substrate around the periphery of the second substrate, a gap is formed between the first and second substrates at the peripheral edge of the second substrate, an insulating resin is arranged near the first electrodes so as to cover portions of the side surfaces of the second substrate and to fill the gap between the first and second substrates, and the electrically conductive member is arranged over regions leading from the first electrodes through the insulating resin to the second electrodes.

Abstract: A method for forming a frame attachment interconnect between a substrate and a frame is disclosed. The method can include applying a composite material (e.g., epoxy-glass prepreg) to a surface of a substrate. The composite material can have one or more holes disposed to substantially align with a corresponding pad on the surface of the substrate. A metal disc is placed in each hole of the composite material on top of the corresponding pad. A frame member can be placed on top of the composite material and the metal discs. The frame member can have one or more pads disposed to substantially align with the metal discs. The substrate, composite material, metal discs and frame combination can be cured in a controlled atmosphere that can include a vacuum and a predetermined temperature to create discrete electrical connections between adjacent pads but with each encapsulated and electrically isolated.

Abstract: A wiring structure includes: an insulating film formed over a substrate; a plurality of wirings formed on the insulating film; and an inducing layer, which is formed on the insulating film in a region between the plurality of wirings, a constituent atoms of the wirings are diffused in the inducing layer.

Abstract: A device includes a wiring board, an element mounted on the wiring board, a spacer member intervening between the wiring board and the element to form a space therebetween, and an encapsulation body filling the space and encapsulating the element on the wiring board.

Abstract: According to one embodiment of the invention, a method for manufacturing a circuit board comprises covering with a metal layer a surface of a first resin layer including polyimide resin; forming a plurality of conductive layers arranged on the metal layer with the conductive layers apart from each other in a planer view; roughening surfaces of the conductive layers with an alkaline aqueous solution; and etching a part of the metal layer between the conductive layers in the planer view to expose the surface of the first resin layer after roughening the surfaces of the conductive layers.

Abstract: A circuit board includes a dielectric layer and a signal routing layer on the dielectric layer. The signal routing layer includes chip traces, connector traces, and signal traces connected with the chip traces and the connector traces. The dielectric layer includes a signal trace area for arraying the signal traces, a chip trace area for arraying the chip traces, and a connector trace area for arraying the connector traces. The dielectric coefficient of the signal trace area is smaller than the dielectric coefficient of the chip trace area and greater than the dielectric coefficient of the connector trace area.

Abstract: A wiring board includes a substrate having an adhesive surface, a first wiring, and a second wiring. The adhesive surface is in contact with the first wiring and the second wiring. The first wiring has a penetrating hole extending in a direction perpendicular to the adhesive surface. The second wiring has a first region, a second region, and a third region, which are adjacent regions arranged in that order. The first region is inside the penetrating hole in the first wiring and in contact with a first portion of the adhesive surface that forms part of the penetrating hole. The second region is in contact with the first wiring and faces the first wiring and the substrate. The third region is in contact with a second portion of the adhesive surface outside the first portion.

Abstract: A transparent conductive film which comprises: a substrate composed of a non-crystalline polymer film; a first hard coating layer; a first transparent conductor layer; a first metal layer; a second hard coating layer; a second transparent conductor layer; and a second metal layer. The first hard coating layer includes a binder resin and a plurality of sphere-shaped particles having a diameter of 1 ?m to 5 ?m. The first metal layer has a plurality of projections having a maximum height Rz of 0.5 ?m to 2.5 ?m resulting from the plurality of particles included in the first hard coating layer on a surface thereof.

Abstract: A base insulating layer is formed on a suspension body. A lead wire for plating and a wiring trace are integrally formed on the base insulating layer. A cover insulating layer is formed on the base insulating layer to cover the lead wire for plating and the wiring trace. A thickness of a portion of the cover insulating layer above a region of the base insulating layer in which the lead wire for plating is formed is set smaller than the thickness of a portion of the cover insulating layer above other regions of the base insulating layer.

Abstract: A circuit board provided with a first resin layer and with a first conductive layer formed on the first resin layer. The first conductive layer has a metal carbide layer containing a carbide of a transition metal selected from Group IV, Group V, or Group VI in the Periodic Table and bonded to the first resin layer. The first resin layer has a first region to which the metal carbide layer is bonded and a second region located in an inner portion of the first resin layer from the first region. The first region has a larger ratio of number of atoms of nitrogen relative to number of atoms of carbon than in the second region.

Abstract: A flexible printed circuit board, in particular for the spatial connection of electronic components, includes a carrier foil (1), several bonding surfaces (10) arranged on a solder side (4) of the carrier foil (1), and several soldering surfaces (2) arranged on a bonding side (12) of the carrier foil (1) opposite the solder side. The soldering surfaces (2) are connected to the bonding surfaces (10) via electrical strip conductors, and a stiffening plate (3) is inseparably connected to the carrier foil (1) on the solder side thereof.

Abstract: A curable composition to be used for a printed wiring board is disclosed, which has an excellent flexibility and an excellent adhesive property with respect to both a plastic substrate and a conductive layer in the printed wiring board. The curable composition includes (A) a (meth)acrylate compound having a polyene structure, (B) a (meth)acrylate compound having a hydroxyl group; and (C) a photopolymerization initiator. From the curable composition, a cured coating film, and a printed wiring board including the cured coating film in the form of a predetermined pattern are obtained.

Abstract: A printed wiring board includes an outermost interlayer resin insulation layer, n outermost conductive layer formed on the outermost interlayer resin insulation layer and including multiple alignment marks, a connection wiring structure connecting the alignment marks, and a solder-resist layer formed on the outermost interlayer resin insulation layer and the outermost conductive layer. The solder-resist layer has openings exposing the alignment marks, respectively, and each of the alignment marks has an electroless plated film formed on each of the alignment marks.

Abstract: In a multilayer wiring board, a low resistance silicon substrate having a predetermined resistivity and a high resistance silicon substrate having a resistivity higher than the predetermined resistivity are stacked while interposing an insulating layer therebetween. The low resistance silicon substrate is provided with an electric passage part surrounded by a ring-shaped groove, while a wiring film electrically connected to the electric passage part through an opening of the insulating layer is disposed on a rear face of the high resistance silicon substrate and an inner face of a recess. Since the high resistance silicon substrate is thus provided with the wiring film, an optical semiconductor element and an electronic circuit element which differ from each other in terms of the number and positions of electrode pads can be electrically connected to each other on the front and rear face sides of the multilayer wiring board.

Abstract: The present invention provides a printed circuit board comprising a metal surface, such as a final finish, that has been coated with a self-assembled monolayer. The self-assembled monolayer forms a coating on the metal surface that is resistant to corrosion, thus preserving the solderability of the metal surface. The present invention also provides a solution of an alkanethiol and a non-organic solvent that can be used for forming a self-assembled monolayer on a metal substrate. The present invention also provides a process for depositing a self-assembled monolayer on a metal substrate by applying a solution of an alkanethiol and a non-organic solvent to a metal substrate, such as a surface of a printed circuit board.

Abstract: An electronic component that includes an electronic component body, sealing members sealing the electronic component body, and adhesive layers which adhere the electronic component body and the sealing members, respectively. Between the electronic component body and the sealing members, sealed spaces are formed, respectively. The adhesive layers each contain organic fillers and inorganic fillers. The organic fillers are in contact with both the electronic component body and the sealing members. The inorganic fillers each have a minimum particle diameter smaller than the thickness of each of the adhesive layers. When the adhesive layers are viewed in a thickness direction thereof, the inorganic fillers are provided between the organic fillers and the electronic component body and between the organic fillers and each of the sealing members.

Abstract: The invention forms a Sn coating layer and a Cu—Sn alloy coating layer having a suitably controllable planar shape in a PCB terminal. A group of Sn coating layers being as a plurality of essentially parallel lines is formed as the surface coating layer, and a Cu—Sn alloy coating layer 2 is exposed on the outermost surface on both sides of Sn coating layers each constituting the group of Sn coating layers. The Sn coating layers have a width of 1 to 500 ?m, an interval between adjacent Sn coating layers is 1 to 20000 ?m, and an outermost maximum height roughness in a terminal insertion direction is at most 10 ?m.

Abstract: A multilayer printed wiring board includes a core base material having a penetrating portion, a low-thermal-expansion substrate accommodated inside the penetrating portion of the core base material and having a first surface for mounting a semiconductor element and a second surface on the opposite side of the first surface, a first through-hole conductor provided inside the low-thermal-expansion substrate and provided for electrical connection between the first surface and the second surface of the low-thermal-expansion substrate, a filler filled in a gap between the low-thermal-expansion substrate and an inner wall of the core base material, and a wiring layer formed on at least one of the first surface and the second surface of the low-thermal-expansion substrate and having a resin insulation layer and a conductive layer. The wiring layer has a via conductor connecting the first through-hole conductor and the conductive layer.

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

Abstract: The present invention relates to a disk with an electrical connection element, having a substrate with a first coefficient of thermal expansion, an electrically conductive structure on a region of the substrate, and a connection element with a second coefficient of thermal expansion.

Abstract: A pane with an electrical connection element is described, including a substrate made of glass with a first coefficient of thermal expansion, an electrically conductive structure with a layer thickness of 5 ?m to 40 ?m on a region of the substrate, a connection element with a second coefficient of thermal expansion, and a layer of a solder material that connects the connection element electrically to subregions of the electrically conductive structure.

Abstract: A three-dimensional circuit board is formed by comprising a board, a first wiring-electrode group provided on a plurality of steps above the board, and a second wiring-electrode connected to the first wiring-electrode group at least in an altitude direction, in which at least a connecting portion between the first wiring-electrode group and the second wiring-electrode is integrated in a continuously identical shape.

Abstract: Disclosed is a PCB having multiple layers of heavy copper. A prepreg having a nonwoven glass web substrate is used alone or together with another prepreg having a glass fabric substrate so that the space between heavy copper, which is comparable to a thick film, can be filled efficiently without creating voids. The PCB includes a copper clad laminate having first copper patterned on one surface or both surfaces of a core substrate; at least one first prepreg laminated on one surface or both surfaces of the copper clad laminate, nonwoven glass web being used as the substrate of the first prepreg; at least one second prepreg laminated on one surface or both surfaces of the first prepreg, glass fabric being used as a substrate of the second prepreg; and second copper laminated on one surface or both surfaces of the second prepreg.

Abstract: An adhesive film, containing a first adhesive layer in which conductive particles are dispersed, and a second adhesive layer adhered to the first adhesive layer, wherein the lowest viscosity of the first adhesive layer attained at or below the curing temperature is higher than that of the second adhesive layer attained at or below the curing temperature, where the curing temperature is a temperature at which the adhesive layer starts to cure, wherein the first and second adhesive layers are respectively disposed to a substrate side and an electronic part side, and the adhesive film is configured to join the electronic part and the substrate by heating and pressurizing the substrate and the electronic part with the adhesive layer being therebetween, and wherein the first adhesive layer has a thickness which is less than two times of an average particle diameter of the conductive particles.

Abstract: An exemplary embodiment of the present invention relates to a conductive structure body that comprises a darkening pattern layer having AlOxNy, and a method for manufacturing the same. The conductive structure body according to the exemplary embodiment of the present invention may prevent reflection by a conductive pattern layer without affecting conductivity of the conductive pattern layer, and improve a concealing property of the conductive pattern layer by improving absorbance. Accordingly, a display panel having improved visibility may be developed by using the conductive structure body according to the exemplary embodiment of the present invention.

Abstract: According to one embodiment, a ceramic circuit board includes a ceramic substrate, a copper circuit plate and a brazing material protrudent part. The copper circuit plate is bonded to at least one surface of the ceramic substrate through a brazing material layer including Ag, Cu, and Ti. The brazing material protrudent part includes a Ti phase and a TiN phase by 3% by mass or more in total, which is different from the total amount of a Ti phase and a TiN phase in the brazing material layer that is interposed between the ceramic substrate and the copper circuit plate. The number of voids each having an area of 200 ?m2 or less in the brazing material protrudent part is one or less (including zero).

Abstract: Disclosed are a thermosetting composition including a liquid crystal oligomer, a bismaleimide-based compound, an epoxy compound, and a fluorinated polymer resin powder. A resin cured product, board, and storage medium each include the thermosetting composition.

Abstract: An interconnection component includes a first support portion has a plurality of first conductive vias extending therethrough substantially perpendicular to surfaces thereof such that each via has a first end adjacent a first surface and a second end adjacent a second surface. A second support portion has a plurality of second conductive vias extending therethrough substantially perpendicular to surfaces thereof such that each via has a first end adjacent the first surface and a second end adjacent the second surface. A redistribution layer is disposed between the second surfaces of the first and second support portions, electrically connecting at least some of the first vias with at least some of the second vias. The first and second support portions can have a coefficient of thermal expansion (“CTE”) of less than 12 parts per million per degree, Celsius (“ppm/° C.”).

Abstract: A wiring substrate includes an inorganic substrate including a substrate body formed of an inorganic material, a wiring pattern formed on the substrate body, and an external connection terminal being electrically connected to the wiring pattern, an organic substrate that is formed below the inorganic substrate, the organic substrate including an insulating layer and a wiring layer formed on the insulating layer, and a bonding layer interposed between the inorganic substrate and the organic substrate, the bonding layer including a stress buffer layer and a penetration wiring that penetrates the stress buffer layer. A thermal expansion coefficient of the stress buffer layer is greater than a thermal expansion coefficient of the inorganic substrate and less than a thermal expansion coefficient of the organic substrate. The wiring pattern and the wiring layer are electrically connected by way of the penetration wiring.

Abstract: A printed circuit board includes a cell portion which includes cells having a plurality of through bores are arranged in a base material; and a base material portion which exists around an outer edge of the cell portion. The base material is formed of a prepreg, the prepreg includes a fiber material in which fiber threads are oriented in a first direction and in a second direction which is perpendicular to the first direction, and a resin material in which the fiber material is impregnated. The through bores are arranged along a third direction between the first direction and the second direction, wherein one side of the outer edges of the cell extends along the third direction.