With Particular Material Patents (Class 174/256)
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Patent number: 8330050Abstract: A wiring board comprises a first pad which is provided on a first surface side of a substrate and on which a first electronic component is to be mounted, and a second pad which is provided on the first surface side of the substrate and on which a second electronic component having a larger amount of heat generation in an operation than that of the first electronic component is to be mounted, a first through electrode which penetrates the substrate and has one of ends connected electrically to the first pad, a second through electrode which penetrates the substrate and has one of ends connected electrically to the second pad, a through trench penetrating the substrate in a portion positioned between a first mounting region for the first electronic component and a second mounting region for the second electronic component, and a heat intercepting member provided in the through trench.Type: GrantFiled: October 20, 2009Date of Patent: December 11, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventors: Hideaki Sakaguchi, Kei Murayama
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Patent number: 8330048Abstract: Disclosed herein are an electromagnetic bandgap structure and a printed circuit board having the same. The bandgap structure includes a conductive layer including a plurality of conductive plates; and a metal layer disposed over or under the conductive layer and including a stitching pattern to electrically connect a first conductive plate to a second conductive plate of the plurality of conductive plates. The bandgap structure includes a spiral stitching pattern formed in a metal layer different from the conductive layer, thus offering a stop-band having a desired bandwidth in a compact structure.Type: GrantFiled: December 30, 2009Date of Patent: December 11, 2012Assignees: Samsung Electro-Mechanics Co., Ltd., Postech Academy-Industry FoundationInventors: Won Woo Cho, Young Soo Kim, Yoon Jung Kim, Dek Gin Yang, Myung Gun Chong, Hyung Ho Kim
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Patent number: 8324509Abstract: The invention provides an electronic component and a manufacturing method thereof that: can allow electronic components to be mounted on an external substrate at a higher density than before; can adjust the height (level) of a terminal electrode as required and desired, thereby solving problems that would occur in the inspection of the conventional electronic components; and can also improve the yield in the mounting of electronic components, thereby achieving increased productivity.Type: GrantFiled: August 10, 2010Date of Patent: December 4, 2012Assignee: TDK CorporationInventors: Takashi Ohtsuka, Kyung-Ku Choi, Tatsuo Namikawa, Hitoshi Yamaguchi
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Patent number: 8313836Abstract: Laminates for printed wiring boards for the making of laminates for printed wiring boards having an impregnant including an epoxy resin, a first cross-linking agent of a strene-maleic anhydride copolymer and a second co-cross-linking agent.Type: GrantFiled: September 2, 2011Date of Patent: November 20, 2012Assignee: Isola USA Corp.Inventors: Franz Tikart, Karl-Heinz Leis, Karl Walter Kopp
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Patent number: 8315061Abstract: The invention relates to an electronic circuit and to a method for the manufacture of an electronic circuit comprising at least two electronic components on a common flexible substrate, wherein the at least two electronic components in each case have at least one electrical functional layer composed of identical functional layer material. The electrical functional layers are formed from identical functional layer material and from layer regions of a layer formed in strip-type fashion on the substrate.Type: GrantFiled: September 13, 2006Date of Patent: November 20, 2012Assignee: PolyIC GmbH & Co. KGInventors: Andreas Ullmann, Alexander Knobloch, Merlin Welker, Walter Fix
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Patent number: 8314341Abstract: Disclosed is a printed circuit board into which an electromagnetic bandgap structure for blocking a noise is inserted. The electromagnetic bandgap structure can include a first conductive plate, a second conductive plate arranged on a planar surface that is different from that of the first conductive plate, a third conductive plate arranged on a planar surface that is different from that of the second conductive plate, a connection pattern arranged on a planar surface that is different from that of the second conductive plate, a first stitching via unit configured to connect the first conductive plate to one end of the connection pattern through the planar surface where the second conductive plate is arranged, and a second stitching via unit configured to connect the third conductive plate to the other end of the connection pattern through the planar surface where the second conductive plate is arranged.Type: GrantFiled: December 17, 2009Date of Patent: November 20, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Han Kim, Mi-Ja Han, Kang-Wook Bong, Hyo-Jic Jung
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Patent number: 8314340Abstract: A multilayer printed wiring board including a first interlayer resin insulation layer, a pad formed on the first interlayer resin insulation layer, a solder resist layer formed on the first interlayer resin insulation layer and the pad, a protective film formed on a portion of the pad exposed by an opening of the solder resist layer, and a coating layer formed between the pad and the solder resist layer. The pad mounts an electronic component. The coating layer has a metal layer and a coating film. The metal layer is formed on the surface of the pad and the coating film is formed on the metal layer.Type: GrantFiled: September 28, 2009Date of Patent: November 20, 2012Assignee: Ibiden Co., Ltd.Inventors: Sho Akai, Tatsuya Imai, Iku Tokihisa
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Patent number: 8315056Abstract: Disclosed herein are a heat-radiating substrate and a method of manufacturing the same. The heat-radiating substrate includes: a core layer including a core metal layer and a core insulating layer formed on the core metal layer and divided into a first region and a second region; a circuit layer formed in the first region of the core layer; a build-up layer formed in the second region of the core layer and including a build-up insulating layer and a build-up circuit layer; an adhesive layer formed between the second region of the core layer and the build-up layer; and an impregnation device mounted on the build-up layer to be impregnated into the adhesive layer. A heat generating element is mounted on the circuit layer and a thermally weakened element is mounted on the build-up layer, thereby preventing the thermally weakened element from being damaged by heat of the heat generating element.Type: GrantFiled: September 16, 2010Date of Patent: November 20, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Chang Hyun Lim, Jung Eun Kang, Seog Moon Choi, Kwang Soo Kim, Sung Keun Park
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Patent number: 8309855Abstract: A flexible printed circuit board that can be used for mounting a light emitting diode. The flexible printed circuit board includes a lower insulator, an upper insulator, and a conductive pattern disposed between the upper and lower insulators. A white film is attached to the top of the upper insulator. Alternatively, the upper insulator is formed of a white insulation material. The flexible printed circuit board has a planar surface and can be properly assembled to other components.Type: GrantFiled: June 9, 2009Date of Patent: November 13, 2012Assignee: Seoul Semiconductor Co., Ltd.Inventor: Tae Jin Chung
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Patent number: 8305743Abstract: A curved display panel includes a display module, a first fixing substrate and an adhering material. The display module has a first glass plate. The first glass plate has a first curved surface. The first fixing substrate has a second curved surface facing the first curved surface. The adhering material is connected between the first curved surface and the second curved surface.Type: GrantFiled: December 15, 2008Date of Patent: November 6, 2012Assignee: Au Optronics Corp.Inventors: Jer-Yao Wu, Han-Ping Kuo, Cheng-Yi Su, Jong-Wen Chwu, Yu-Chen Liu, Chih-Wei Chen
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Publication number: 20120273262Abstract: A transparent conductive structure applied to a touch panel includes a substrate unit, a first coating unit, a transparent conductive unit, and a second coating unit. The substrate unit includes a transparent substrate. The first coating unit includes a first coating layer formed on the top surface of the transparent substrate. The transparent conductive unit includes a transparent conductive layer formed on the top surface of the first coating layer. The transparent conductive layer includes two transparent conductive films stacked on top of each other and a plurality of embedded conductive circuits formed between the two transparent conductive films and arranged to form a predetermined embedded circuit pattern. The second coating unit includes a second coating layer formed on the top surface of the transparent conductive layer. The second coating layer has a touching surface on the top side thereof for an external object to touch.Type: ApplicationFiled: April 29, 2011Publication date: November 1, 2012Applicant: INNOVATION & INFINITY GLOBAL CORP.Inventor: CHAO-CHIEH CHU
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Patent number: 8299371Abstract: A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed.Type: GrantFiled: December 20, 2010Date of Patent: October 30, 2012Assignee: Endicott Interconnect Technologies, Inc.Inventors: Rabindra N. Das, John M. Lauffer, Voya R. Markovich, James J. McNamara, Jr.
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Patent number: 8299366Abstract: A wiring board is formed with a substrate designating either the upper surface or the lower surface as a first surface and the other as a second surface; an electronic component arranged inside the substrate; and a first conductive layer formed on the first-surface side of the substrate by means of a first insulation layer made up of a first lower insulation layer and a first upper insulation layer. In such a wiring board, the first lower insulation layer and the first upper insulation layer are made of different materials from each other. Moreover, the first lower insulation layer is positioned on the first surface of the substrate and the electronic component, and the material that forms the first lower insulation layer fills a clearance between the substrate and the electronic component.Type: GrantFiled: September 25, 2009Date of Patent: October 30, 2012Assignee: Ibiden Co., Ltd.Inventors: Kenji Sato, Shunsuke Sakai
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Patent number: 8299365Abstract: An interconnect structure is provided that has improved electromigration resistance as well as methods of forming such an interconnect structure. The interconnect structure includes an interconnect dielectric material having a dielectric constant of about 4.0 or less. The interconnect dielectric material has at least one opening therein that is filled with a Cu-containing material. The Cu-containing material within the at least one opening has an exposed upper surface that is co-planar with an upper surface of the interconnect dielectric material. The interconnect structure further includes a composite M-MOx cap located at least on the upper surface of the Cu-containing material within the at least one opening. The composite M-MOx cap includes an upper region that is composed of the metal having a higher affinity for oxygen than copper and copper oxide and a lower region that is composed of a non-stoichiometric oxide of said metal.Type: GrantFiled: January 7, 2010Date of Patent: October 30, 2012Assignee: International Business Machines CorporationInventors: Son Van Nguyen, Alfred Grill, Thomas J. Haigh, Jr., Hosadurga Shobha, Tuan A. Vo
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Patent number: 8300420Abstract: A circuit substrate includes an electrically conductive layer having electrically conductive patterns formed therein, an insulating layer having a through hole, and a composite layer positioned between the electrically conductive layer and the insulating layer. The through hole is configured for having an electronic component mounted thereon. The composite layer includes a polymer matrix and at least one carbon nanotube bundle embedded in the polymer matrix. One end of the at least one carbon nanotube bundle contacts the electrically conductive patterns, and the other is exposed in the through hole of the insulation layer.Type: GrantFiled: May 24, 2009Date of Patent: October 30, 2012Assignee: Zhen Ding Technology Co., Ltd.Inventors: Chung-Jen Tsai, Hung-Yi Chang, Chia-Cheng Chen, Meng-Chieh Hsu, Cheng-Hsien Lin
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Patent number: 8294034Abstract: A circuit board including a circuit substrate, a first dielectric layer, an antagonistic activation layer, a first conductive layer, a second conductive layer and a second dielectric layer is provided. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer and an intaglio pattern. The antagonistic activation layer is disposed on the second surface of the dielectric layer. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer via the first conductive layer.Type: GrantFiled: May 28, 2010Date of Patent: October 23, 2012Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Shu-Sheng Chiang, Tsung-Yuan Chen
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Patent number: 8294031Abstract: A solder resist coating for a rigid-flex circuit board contains one or more conductor tracks and at least one flex area. The solder resist coating has one or more movement gaps in the flex area of the circuit board. In addition, an electronic module is formed having at least one rigid-flex circuit board with a solder resist coating.Type: GrantFiled: February 1, 2010Date of Patent: October 23, 2012Assignee: Continental Automotive GmbHInventors: Detlev Bagung, Michael Decker, Gregory Drew, Thomas Riepl, Bernd Roller
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Patent number: 8288662Abstract: A circuit structure including a circuit board, an insulating layer, a conductive via, a platable dielectric layer and a conductive pattern is provided. The insulating layer is disposed on the circuit board and covers a circuit layer of the circuit board. The conductive via passes through the insulating layer and connects the circuit layer and protrudes from a surface of the insulating layer. The platable dielectric layer having a trench pattern is disposed on the surface of the insulating layer wherein the portion of the conductive via protruding from the surface is located in the trench pattern. The material of the platable dielectric layer includes a chemical platable material. The conductive pattern is in the trench pattern and connects the conductive via wherein an interface exists between the conductive pattern and the conductive via and protrudes from the surface of the insulating layer.Type: GrantFiled: March 5, 2010Date of Patent: October 16, 2012Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Patent number: 8288655Abstract: A circuit board structure and a manufacturing method thereof are provided. The circuit board structure includes a composite substrate, a dielectric layer, and a circuit layer. The composite substrate includes a metal substrate doped with non-metal powders and a metal buffer layer. A surface of the metal buffer layer opposite to the other surface of the metal buffer layer in contact with the metal substrate is treated by a polishing process. The dielectric layer is formed on the polished surface of the metal buffer layer, and the circuit layer is formed on the dielectric layer. Alternatively, a barrier layer is interposed between the dielectric layer and the metal buffer layer for preventing a diffusion effect of the metal buffer layer.Type: GrantFiled: October 27, 2008Date of Patent: October 16, 2012Assignee: Industrial Technology Research InstituteInventors: Ra-Min Tain, Ming-Ji Dai
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Low temperature curable photosensitive resin composition and dry film manufactured by using the same
Patent number: 8288656Abstract: The present invention provides a photosensitive resin composition comprising: a polyamic acid including a specific repeating unit; a heterocyclic amine compound; a (metha)acrylate-based compound including one or more double bonds between carbons; a photoinitiator; and an organic solvent, and a dry film prepared therefrom. The photosensitive resin composition can be cured at a low temperature to offer process safety and work convenience, and has excellent bending resistance, soldering heat resistance, and a property of filling the pattern, as well as excellent heat resistance and mechanical properties.Type: GrantFiled: August 27, 2010Date of Patent: October 16, 2012Assignee: LG Chem, Ltd.Inventors: Kwang-Joo Lee, Joo-Eun Ko, Byung-Nam Kim, Heon-Sik Song, You-Jin Kyung, Hee-Jung Kim -
Patent number: 8279614Abstract: A modem, in particular for subsea power line communication, has electronic components on a circuit board, and a metal encapsulation, wherein the encapsulation forms at least two chambers separated by at least one wall, wherein each of the chambers surrounds at least one of the electronic components.Type: GrantFiled: July 24, 2006Date of Patent: October 2, 2012Assignee: Siemens AktiengesellschaftInventors: Vegard Horten, Vidar Steigen
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Patent number: 8278561Abstract: A conductive pattern forming film provides a pattern formed on a film substrate having flexibility by pressurizing, under heating, a conductive paste in which powder or fine particles of metal or semiconductor are dispersed and filled. A conductive pattern forming apparatus comprises a sample installation table having a flat placement surface, and a driving body for pressure application which is placed in a manner facing the placement surface and movable, wherein the driving body for pressure application is equipped with a support which is constituted by a flat metal panel having metal spheres along its bottom face.Type: GrantFiled: October 17, 2007Date of Patent: October 2, 2012Assignee: National Institute of Advanced Industrial Science and TechnologyInventors: Toshihide Kamata, Manabu Yoshida
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Patent number: 8272124Abstract: A technique for anchoring carbon nanotube columns to a substrate can include use of a filler material placed onto the surface of the substrate into area between the columns and surrounding a base portion of each of the columns.Type: GrantFiled: April 3, 2009Date of Patent: September 25, 2012Assignee: FormFactor, Inc.Inventors: Treliant Fang, Michael Harburn, Onnik Yaglioglu
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Patent number: 8274181Abstract: A structure for transmission in a power supply, particularly to a power structure for transmission for bearing large DC current, wherein the power supply includes a power input port for connecting to DC input power and a DC/DC conversion circuit for converting the DC input power into DC output power. The architecture including at least one power transmission board for disposing the power input port, wherein the power transmission board is electrically connected to the power process board with the DC/DC conversion circuit mounted thereon by at least one power conduction element. Therefore, through the power conduction elements replacing the conventional connecting wires with large diameter to connect the power input port and the power process board without disobeying the safety regulation, not only the space occupied by the bent connection wires can be reduced, but the collisions and damage to other components caused therefrom also can be avoided.Type: GrantFiled: April 6, 2009Date of Patent: September 25, 2012Assignees: FSP Technology Inc., 3Y Power Technology (Taiwan), Inc.Inventor: Shao-Feng Lu
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Publication number: 20120234586Abstract: Embodiments of the invention generally relate to methods of forming flexible substrates for use in photovoltaic modules. The methods include shaping a metal foil and adhering the metal foil to a flexible backsheet. An optional interlayer dielectric and anti-tarnish material may then be applied to the upper surface of the shaped metal foil disposed on the flexible backsheet. The metal foil may be shaped using die cutting, roller cutting, or laser cutting techniques. The die cutting, roller cutting, and laser cutting techniques simplify the flexible substrate formation processes by eliminating resist-printing and etching steps previously used to pattern metal foils. Additionally, the die cutting, roller cutting, and laser cutting techniques reduce the consumption of consumable materials previously used in the patterning of metal foils.Type: ApplicationFiled: March 14, 2012Publication date: September 20, 2012Applicant: APPLIED MATERIALS, INC.Inventors: JOHN TELLE, Brian J. Murphy, David H. Meakin
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Patent number: 8269112Abstract: A circuit structure and a fabrication method thereof manly use a plurality of wires to connect in series a plurality of pads to form a stretchable circuit. Each of the wires has a first end, a second end and an intermediate segment located between the first end and the second end, wherein the first end and the second end are respectively connected to different pads, and the position of the intermediate segment is higher than the positions of the first end and the second end. Since the connection manner of the wires and the pads has 3-D freedoms, the circuit structure can withstand both horizontal and vertical deformations and has an outstanding reliability.Type: GrantFiled: August 11, 2008Date of Patent: September 18, 2012Assignee: Industrial Technology Research InstituteInventors: Yuan-Chang Lee, Yu-Hua Chen, Ying-Ching Shih, Cheng-Ta Ko
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Patent number: 8263873Abstract: Provided is a flexible printed circuit board (FPCB) for a large capacity signal transmission medium that may maintain an impedance suitable for accurately transmitting a large capacity signal such as a low-voltage differential signaling (LVDS) signal and may also have an excellent flexibility. A copper foil large capacity signal wire includes a plurality of first pads and a plurality of second pads that are spaced apart from each other at predetermined intervals and are alternately provided, to receive a large capacity signal from a television main board and to transmit the received large capacity signal to a display device. The first pad has a positive phase and the second pad has a negative phase. A copper foil ground layer is attached at a distance from the cooper foil large capacity signal layer to ground the large capacity signal that is transmitted to and is returned from the display device.Type: GrantFiled: October 20, 2009Date of Patent: September 11, 2012Assignees: Evertechno Co., Ltd.Inventors: Gyoung Duck Choi, Byeong Sik Son
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Patent number: 8264853Abstract: The invention relates to a 3D electronic module comprising a stack (100) of at least a first slice (10) and a second slice (30), the first slice (10) having on a face (101) at least one set (4) of electrically conductive protrusions (41), and the second slice (30) comprising at least one zone (61) of electrically insulating material, traversing the thickness of the slice. The second slice (30) comprises at least one electrically conductive element (3) traversing said slice in a zone (61) of electrically insulating material, able to receive a set (4) of protrusions (41) of the first slice (10).Type: GrantFiled: November 30, 2006Date of Patent: September 11, 2012Assignee: 3D PlusInventors: Christian Val, Olivier Lignier
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Patent number: 8264841Abstract: The present invention is directed to improve reliability by preventing deterioration in the structure of an inner wall of a water channel caused by galvanic corrosion. A heat sink in which a water channel of a cooling fluid is formed by stacking and bonding a plurality of thin plates, in which a surface in the water channel is made of the same metal material except for at least an end of a bonded part of the thin plates.Type: GrantFiled: May 28, 2008Date of Patent: September 11, 2012Assignee: Sony CorporationInventors: Kenji Sasaki, Hidekazu Kawanishi, Yuichi Hamaguchi
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Patent number: 8263874Abstract: A multilayer circuit board comprising low inductance through-conductors is disclosed. The multilayer circuit board comprises first ceramic substrate means, first layered section means, and second ceramic substrate means that allow insulation layers to be substantially thin, a length of through-conductors to be substantially short, and low relative permittivity of the insulation layers compared to resin insulation layers. Thus, increases in operation frequency of the multilayer circuit board are possible.Type: GrantFiled: July 23, 2010Date of Patent: September 11, 2012Assignee: KYOCERA CorporationInventor: Toshihiro Hashimoto
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Patent number: 8258408Abstract: As a multi-layered board, an EMI noise reduction board, having an electromagnetic bandgap structure with band stop frequency properties inserted into an inner portion of the board, includes a first area, in which a ground layer and a power layer are formed, and a second area, placed on a side surface of the first area, in which it has the electromagnetic bandgap structure formed therein so as to shield an EMI noise radiated to the outside through the side surface of the first area. The electromagnetic bandgap structure includes a plurality of first conductive plates, placed along the edge of the board, a plurality of second conductive plates, disposed on a planar surface that is different from the first conductive plates such that the second conductive plates are alternately disposed with the first conductive plates, and a via, which connects the first conductive plates to the second conductive plates.Type: GrantFiled: December 22, 2009Date of Patent: September 4, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Han Kim, Mi-Ja Han, Dae-Hyun Park, Hyo-Jic Jung, Kang-Wook Bong
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Patent number: 8248814Abstract: A PCB includes an outer layer and an inner layer. An electronic component is mounted on the outer layer. The outer layer further defines a first pad, a second pad, a third pad, a fourth pad, and a number of via holes. The electrical performances of the first pad and the second pad are the same to that of the inner layer. The first pad and the second pad are conducted to the electronic component. The third pad and the fourth pad are respectively conducted to the first pad and the second pad through the electronic component. The electrical performances of the third pad and the fourth pad are different from that of the inner layer. The via holes are respectively electrically connected to the third pad and the fourth pad.Type: GrantFiled: October 22, 2010Date of Patent: August 21, 2012Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Chun-Po Chen, Chi-Wen Chen
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Patent number: 8247702Abstract: An integrated circuit mounted board includes a printed wiring board and an integrated circuit bare chip mounted on the printed wiring board. The printed wiring board includes a metal base, an insulating member made of an insulating material and disposed on the metal base, and a wiring pattern disposed on the insulating member. The wiring pattern includes an electrode part to which the integrated circuit bare chip is electrically coupled. The insulating member includes an under region being opposite to the electrode part. The metal base includes a metal substrate and a metal portion protruding from the metal substrate. The metal portion is buried in the under region of the insulating member.Type: GrantFiled: February 9, 2010Date of Patent: August 21, 2012Assignee: Denso CorporationInventor: Takuya Kouya
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Patent number: 8247700Abstract: A wired circuit board has a metal supporting board, an insulating layer formed on the metal supporting board, a conductive pattern formed on the insulating layer and having a pair of wires arranged in spaced-apart relation, and a semiconductive layer formed on the insulating layer and electrically connected to the metal supporting board and the conductive pattern. The conductive pattern has a first region in which a distance between the pair of wires is small and a second region in which the distance between the pair of wires is larger than that in the first region. The semiconductive layer is provided in the second region.Type: GrantFiled: March 12, 2009Date of Patent: August 21, 2012Assignee: Nitto Denko CorporationInventors: Jun Ishii, Yasunari Ooyabu, Visit Thaveeprungsriporn
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Patent number: 8242377Abstract: Disclosed is a printed circuit board into which an electromagnetic bandgap structure for blocking a noise is inserted. The electromagnetic bandgap structure can include a first conductor and a second conductor arranged on different planar surfaces, a third conductor arranged on a same planar surface that is different from a planar surface where the second conductor is arranged, and a first stitching via unit configured to connect the first conductor to the third connector through the planar surface where the second conductor is arranged and being electrically separated from the second conductor. The first conductor can include a first plate, a second plate spaced from the first plate, and a second stitching unit configured to electrically connect the first plate to the second plate through a planar surface that is different from a planar surface where the first plate and the second plate are arranged.Type: GrantFiled: December 17, 2009Date of Patent: August 14, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hyo-Jic Jung, Han Kim, Mi-Ja Han, Kang-Wook Bong, Dae-Hyun Park
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Patent number: 8242371Abstract: Disclosed is a heat dissipating circuit board, which includes a metal core including an insulating layer formed on the surface thereof, a circuit layer formed on the insulating layer and including a seed layer and a first circuit pattern, and a heat dissipating frame layer bonded onto the circuit layer using solder and having a second circuit pattern, and in which the heat dissipating frame layer is bonded onto the circuit layer not by a plating process but by using solder, thus reducing the cost and time of the plating process and relieving stress applied to the heat dissipating circuit board due to the plating process. A method of manufacturing the heat dissipating circuit board is also provided.Type: GrantFiled: November 7, 2009Date of Patent: August 14, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hye Sook Shin, Seog Moon Choi, Shan Gao, Chang Hyun Lim, Tae Hyun Kim, Young Ki Lee
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Patent number: 8237057Abstract: A wiring board is provided that suppresses spreading of liquid droplets when liquid droplets are discharged using an ink-jet method. The wiring board has a plurality of layers and includes an ink-jet wiring pattern that is formed in a soluble porous membrane member of any single layer and that includes electrically conductive nanoparticles as a principal material, and a transferred wiring pattern that does not include electrically conductive nanoparticles as a principal material. One layer among the plurality of layers is an electrically insulative substrate. Another layer among the plurality of layers is a porous membrane treated member layer including a porous membrane member at one part of a region of the other layer. The ink-jet wiring pattern is formed in the porous membrane treated member layer. The transferred wiring pattern is formed in the substrate.Type: GrantFiled: June 17, 2009Date of Patent: August 7, 2012Assignee: Panasonic CorporationInventors: Takayuki Hirose, Norihito Tsukahara, Manabu Gokan
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Publication number: 20120193131Abstract: The metal base circuit board according to the present invention includes a metal substrate, an insulating layer provided on the metal substrate, and a conductive foil for circuit formation that is provided on the insulating layer. The metal substrate has a thermal conductivity of 60 W/mK or more and a thickness of 0.2 to 5.0 mm. The insulating layer is formed using an insulating material composition in which an inorganic filler having a thermal conductivity of 30 W/mK or more is dispersed in a non-anisotropic liquid crystal polyester solution. According to the present invention, a metal base circuit board can be provided that can be applied in an inverter and applications requiring high heat dissipation properties, and that has high thermal conductivity, as well as having high thermal stability and electrical reliability.Type: ApplicationFiled: April 7, 2010Publication date: August 2, 2012Applicants: SUMITOMO CHEMICAL COMPANY, LIMITED, NHK SPRING CO., LTD.Inventors: Kouichi Kusakawa, Kazuhiko Konomi, Satoshi Okamoto, Toyonari Ito
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Patent number: 8232478Abstract: An EMI noise reduction board using an electromagnetic bandgap structure is disclosed. In the EMI noise reduction board according to an embodiment of the present invention, an electromagnetic bandgap structure having band stop frequency properties can be inserted into an inner portion of the board so as to shield an EMI noise, in which the portion corresponds to an edge of the board and in which the EMI noise is conducted from the inside to the edge of the board and radiates to the outside of the board.Type: GrantFiled: December 31, 2009Date of Patent: July 31, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Han Kim, Je-Gwang Yoo, Chang-Sup Ryu
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Patent number: 8232476Abstract: It is an object of the present invention to provide a flexible multilayer wiring board that can be easily reduced in thickness and that also has sufficient durability against repeated bending or heat shock. A preferred mode of the flexible multilayer wiring board comprises a flexible inner layer board obtained by forming an inner layer wiring on both sides of an insulating layer, an outer layer wiring situated on at least one side of the inner layer board, and insulating adhesive sheets lying between the inner layer board and outer layer wiring. One of the insulating adhesive sheets are composed of an imide group-containing polymer.Type: GrantFiled: February 20, 2008Date of Patent: July 31, 2012Assignee: Hitachi Chemical Company, Ltd.Inventors: Shigehiro Nakamura, Toshihiko Itou, Masayoshi Joumen, Youichirou Mansei
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Patent number: 8230564Abstract: A millimeter wave transmission line filter having a plurality of filter pole determining coupled cavities fabricated with a multiple lithographic layer micromachining process. The filter cavities are oriented perpendicular to an underlying substrate element in order to achieve micromachining, fabrication and accuracy advantages. Multiple filters can be used in a frequency multiplex arrangement as in a duplexer. Radio frequencies in the 15 to 300 gigahertz range are contemplated.Type: GrantFiled: January 29, 2010Date of Patent: July 31, 2012Assignee: The United States of America as represented by the Secretary of the Air ForceInventor: J. Robert Reid, Jr.
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Publication number: 20120189874Abstract: A conductor layer having a predetermined pattern is formed on a base insulating layer so that its second main surface opposes the base insulating layer. A barrier layer having higher corrosion resistance to acids than that of the conductor layer is formed on its first main surface and a side surface of the conductor layer while the first main surface and the side surface of the conductor layer and the barrier layer are covered with a conductive cover layer.Type: ApplicationFiled: December 6, 2011Publication date: July 26, 2012Applicant: NITTO DENKO CORPORATIONInventors: Shinichi INOUE, Hirofumi EBE
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Patent number: 8227704Abstract: Disclosed is a printed circuit board including an electromagnetic bandgap structure. The electromagnetic bandgap structure, which includes a first dielectric material for interlayer insulation and is for blocking a noise, is inserted into the printed circuit board. The electromagnetic bandgap structure can include a first conductive plate, a second conductive plate arranged on a planar surface that is different from that of the first conductive plate, a third conductive plate arranged on a same planar surface as the first conductive plate, and a stitching via unit configured to connect the first conductive plate and the third conductive plate through the planar surface on which the second conductive plate is arranged. A second dielectric material having a permittivity that is different from that of the first dielectric material is interposed between any two of the first conductive plate, the second conductive plate, and the third conductive plate.Type: GrantFiled: December 22, 2009Date of Patent: July 24, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Dae-Hyun Park, Han Kim, Kang-Wook Bong
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Patent number: 8227702Abstract: A multilayer ceramic substrate in which an active element and a passive element are surface-equipped over the outermost surface on one side is provided. The multilayer ceramic substrate comprises a plurality of laminated ceramic substrate layers, a surface layer terminal electrode provided in a via hole of an outermost ceramic substrate layer on at least one side and having a surface layer via electrode and a metal plating layer deposited over an end surface of the surface layer via electrode, and a via conductor which connects the surface layer terminal electrode and circuit patterns over the ceramic substrate layer at the inside, wherein a via hole size of a surface layer terminal electrode for connection of the active element is smaller than a via hole size of a surface layer terminal electrode for connection of the passive element.Type: GrantFiled: March 31, 2009Date of Patent: July 24, 2012Assignee: Hitachi Metals, Ltd.Inventors: Hatsuo Ikeda, Koji Ichikawa
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Patent number: 8227701Abstract: A reconfigurable electric circuit includes first and second crystalline material layers positioned adjacent to each other and forming a first interface, and a first ferroelectric layer positioned adjacent to the first crystalline material layer and having ferroelectric domains applying an electric field to regions of the first interface to induce a quasi two-dimensional electron gas in the regions, wherein at least one of the regions forms a gate and at least one of the regions forms a channel.Type: GrantFiled: January 26, 2009Date of Patent: July 24, 2012Assignee: Seagate Technology LLCInventors: Stephen John Wrazien, Florin Zavaliche, Joachim Walter Ahner, Tong Zhao, Martin Gerard Forrester, Shan Hu
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Patent number: 8227703Abstract: A multilayered circuit board of the present invention has a single-side laminated structure and does not include a core substrate having via-holes formed therethrough and vias for providing electrical connection through the via-holes. The multilayered circuit board includes a plurality of pairs of layers, each pair including a conductor circuit layer and an insulator layer, wherein a glass transition temperature of each insulator layer is 170° C. or higher, a coefficient of thermal expansion at the glass transition temperature or lower of each insulator layer is 35 ppm or less, and a modulus of elasticity of each insulator layer is 5 GPa or more.Type: GrantFiled: January 17, 2008Date of Patent: July 24, 2012Assignee: Sumitomo Bakelite Company, Ltd.Inventors: Hironori Maruyama, Kensuke Nakamura, Toru Meura, Hiroshi Hirose
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Publication number: 20120181560Abstract: An LED wiring board includes an insulator layer, a conductor layer (a wiring pattern layer) formed on the insulator layer, and a white reflective film which is formed on the insulator layer and which includes a white colorant and a binder thereof. The conductor layer includes a first wiring pattern and a second wiring pattern, and the white reflective film has a portion which is between the first wiring pattern and the second wiring pattern and which is thinner than both of the first wiring pattern and the second wiring pattern.Type: ApplicationFiled: January 13, 2012Publication date: July 19, 2012Applicant: IBIDEN CO., LTD.Inventors: Yasuji HIRAMATSU, Yoshiyuki Ido, Wataru Furuichi
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Patent number: 8222537Abstract: Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.Type: GrantFiled: June 11, 2009Date of Patent: July 17, 2012Assignee: Sanmina-Sci CorporationInventors: George Dudnikov, Jr., Franz Gisin
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Patent number: 8222529Abstract: The present invention provides a ceramic substrate including: a ceramic stacked layer structure in which multiple ceramic layers are stacked to be interconnected through a via provided within each of the ceramic layers, the ceramic stacked layer structure having a hole provided therein to expose a top portion of the via provided within a ceramic layer of being a surface layer; a conductive material filled within the hole; and an external electrode formed on the surface of the ceramic stacked layer structure so that the external electrode is electrically connected to the conductive material, and a manufacturing method thereof.Type: GrantFiled: October 16, 2009Date of Patent: July 17, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Je Hong Sung, Jin Waun Kim, Myung Whun Chang
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Patent number: 8222530Abstract: A wired-circuit-board assembly sheet includes a plurality of wired circuit boards and a supporting sheet for supporting the wired circuit boards in an aligned state. Each of the wired circuit boards includes a distinguishing mark forming portion to be formed with a distinguishing mark for distinguishing between defectiveness and non-defectiveness of the wired circuit board. The distinguishing mark forming portion is divided by a weir portion for preventing the distinguishing mark from flowing out from the distinguishing mark forming portion.Type: GrantFiled: December 10, 2009Date of Patent: July 17, 2012Assignee: Nitto Denko CorporationInventor: Saori Ishigaki