Abstract: A module 100 can be precisely manufactured by mounting an electronic component 102 and a terminal assembly 10 having a simple configuration, in which a plurality of connection terminals 11 are supported by a support body 12, the configuration being highly precise, inexpensive, and new, on one principal surface of a wiring substrate; and by sealing the electronic component 102 and the terminal assembly 10 mounted on the one principal surface of the wiring substrate 101, with a first resin layer 103. Also, since the plurality of connection terminals 11 are merely supported by the support body 12, the support body 12 can be easily removed from the plurality of connection terminals 11. Accordingly, the manufacturing time of the module 100 is decreased.

Abstract: A wiring substrate includes a first wiring layer with a wiring pattern and a metal foil. A first insulating layer includes a first through hole having a first end facing the metal foil and a second end. A second wiring layer includes a first opening having a diameter smaller than the second end. A second insulating layer includes a second through hole having a third end facing the wiring pattern and a fourth end. A third wiring layer includes a second opening having a diameter smaller than the fourth end. A first via is filled in the first opening, the first through hole, and a first recess, in the metal foil, having a diameter greater than the first end. A second via is filled in the second opening, the second through hole, and a second recess, in the wiring pattern, having a diameter greater than the third end.

Abstract: A method for forming cavity in substrate includes setting start position on closed loop line having circumference L for substrate, consecutively irradiating laser from laser device upon board for the substrate such that holes are formed, and moving the device in loop from the start position along the line such that penetrating hole is formed through the board. The start position of first loop is set as base position, the moving includes shifting the start position by distance d after each loop and controlling such that the moving satisfies p=?di, m?L/p and M=m×n, where i=1 to n, n represents number of loops, p represents pitch of the holes, m represents number of the holes in loop, ?di is distance from the base position for the start position after i-th loop, and M is number of the holes by the loops.

Abstract: The present invention relates to a circuit board, which can miniaturize a conductor pattern formed around a via and improve current pass characteristics of the via at the same time by including a via passing through an insulating layer to be in contact with an upper conductor pattern and a lower conductor pattern and having a bent portion whose cross-sectional area or diameter changes discontinuously.

Abstract: A universal serial bus hybrid footprint design is described herein. The design includes an outer row of one or more surface mount technology (SMT) contacts and an inner row of one or more printed through holes (PTH). The hybrid footprint design enables a data through put of at least 10 Gbps.

Abstract: An interposer is provided, including a composite body and a plurality of conductive through vias penetrating the composite body. The composite body includes at least a main layer and at least a combining layer stacked on one another. The combining layer prevents the main layer from being cracked. The combining layer is more flexible than the main layer. The combining layer prevents the main layer from being cracked. Therefore, the main layer can be thinned on demands, and the interposer can be thinned accordingly.

Abstract: A double-sided circuit board including a substrate having a first surface and a second surface on an opposite side of the first surface and having a penetrating hole extending between the first surface and the second surface, a first conductive circuit formed on the first surface of the substrate, a second conductive circuit formed on the second surface of the substrate, and a through-hole conductor formed in the penetrating hole of the substrate and electrically connecting the first conductive circuit and the second conductive circuit. The penetrating hole comprises a first hole having a first opening with a diameter R1 on the first surface of the substrate, a second hole having a second opening with a diameter R2 on the second surface of the substrate, and a third hole connecting the first hole and the second hole and having a diameter smaller than at least one of R1 and R2.

Abstract: Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.

Abstract: A wiring substrate includes an inorganic substrate including a substrate body formed of an inorganic material, a wiring pattern formed on the substrate body, and an external connection terminal being electrically connected to the wiring pattern, an organic substrate that is formed below the inorganic substrate, the organic substrate including an insulating layer and a wiring layer formed on the insulating layer, and a bonding layer interposed between the inorganic substrate and the organic substrate, the bonding layer including a stress buffer layer and a penetration wiring that penetrates the stress buffer layer. A thermal expansion coefficient of the stress buffer layer is greater than a thermal expansion coefficient of the inorganic substrate and less than a thermal expansion coefficient of the organic substrate. The wiring pattern and the wiring layer are electrically connected by way of the penetration wiring.

Abstract: A wiring board has a first resin insulation layer, a first conductive pattern formed on the first resin insulation layer, a second resin insulation layer formed on the first conductive pattern and having an opening portion exposing at least a portion of the first conductive pattern, a second conductive pattern formed on the second resin insulation layer, and a via conductor formed in the opening portion of the second resin insulation layer and electrically connecting the first conductive pattern and the second conductive pattern. The via conductor has a side surface extending between the first conductive pattern and the second conductive pattern and a bent portion where an inclination of the side surface of the via conductor changes in a depth direction of the via conductor.

Abstract: The present invention relates to a flexible modular assembly (100) comprising at least two flexible electronic modules (110 and 111) supported by a textile support (130). The two flexible electronic modules and the textile support each comprise a set of electrical conductors. The flexible modular assembly further comprises flexible connectors (140) for interconnecting two sets of electrical conductors. The flexible modular assembly of the invention is a modular textile assembly for use in large-area applications of electronic textiles.

Abstract: A wiring substrate includes plural insulating layers including an outermost insulating layer; and plural wiring layers which are alternately laminated between the insulating layers and include outermost wiring layers exposed from the outermost insulating layer and through wirings having electrode pads on end portions of the through wirings and penetrating through the outermost insulating layer, wherein the electrode pads of the through wirings are exposed from the outermost insulating layer, and a part of the outermost wiring layers overlaps the end portions of the through wirings and is connected to the through wirings.

Abstract: An electronic device comprises a functional stack (10) and a cover (50) coupled thereto by an insulating adhesive layer (30). The functional stack (10) comprises a first transparent and electrically conductive layer (22), a second electrically conductive layer (24) and a functional structure (26), comprising at least one layer, sandwiched between said first and second conductive layer. The cover (50) includes a substrate (52) and at least a first conductive structure (66, 68) that is arranged in a first plane between the adhesive layer (28) and the substrate (52). First and second transverse electrical conductors (32, 34) transverse to the first plane (61) electrically interconnect the first and the second electrically conductive layer (22, 24) with the first and the second conductive structure (66, 68) in the first plane (61).

Abstract: A method for manufacturing a printed wiring board including forming an insulative resin layer containing a resin and an inorganic filler, forming a conductor layer including a conductive material and having a conductor on the insulative resin layer, irradiating a laser beam upon the conductor of the conductor layer such that the conductor is sectioned or a width of the conductor is narrowed, and forming a conductive pattern on the insulative resin layer. The inorganic filler is in an amount of 30 wt. % or more of the insulative resin layer.

Abstract: This disclosure relates generally to an electronic chip package that can include a die and a buildup layer substantially enveloping the die. Electrical interconnects can be electrically coupled to the die and passing, at least in part, through the buildup layer. An optical emitter can be electrically coupled to the die with a first one of the electrical interconnects and configured to emit light from a first major surface of the electronic chip package. A solder bump can be electrically coupled to the die with a second one of the electrical interconnects and positioned on a second major surface of the electronic chip package different from the first major surface.

Abstract: Provided is a flexible substrate wherein a connection portion between the flexible substrate and an electric circuit board meets requirements of narrow wiring pitch and low resistance at the connection portion. An electric circuit structure, which has the flexible substrate and the electric circuit board to which the flexible substrate is connected, is also provided. A wiring pattern (22) is formed on a flexible base film (21), a connection terminal (25) connected electrically to an electrode terminal of another electric circuit board is arranged at an end portion of the wiring pattern (22), and the connection terminal (25) includes wide connection terminals (25b, 25c) having a terminal width extending across plural lines of the wiring pattern (22).

Abstract: A wiring board includes: wiring layers; insulating layers disposed between the wiring layers; and external connection pads respectively including surface plated layers, for connecting to an external circuit. In each of the external connection pads in one face of the wiring board, an outer peripheral edge of the external connection pad is retracted from an outer peripheral edge of the surface plated layer toward a center of the external connection pad.

Abstract: A printed circuit board includes a cell portion which includes cells having a plurality of through bores are arranged in a base material; and a base material portion which exists around an outer edge of the cell portion. The base material is formed of a prepreg, the prepreg includes a fiber material in which fiber threads are oriented in a first direction and in a second direction which is perpendicular to the first direction, and a resin material in which the fiber material is impregnated. The through bores are arranged along a third direction between the first direction and the second direction, wherein one side of the outer edges of the cell extends along the third direction.

Abstract: An object of the invention is to provide a method for fabricating a printed wiring board that can suppress warping of the printed wiring board and can improve the yield of semiconductor chip mounting and enhance the reliability of a semiconductor package. The printed wiring board fabrication method according to the invention is a method for fabricating a printed wiring board having a through-hole in a core layer, wherein the printed wiring board fabrication method includes the step of applying a laser from one side of the core layer to a position where the through-hole is to be formed in the core layer and the step of applying a laser to the same position from the opposite side of the core layer.

Abstract: A textile-type electronic component package includes a textile base; a textile-type electronic component and a plurality of conductive patterns having end contact points formed on the top surface of the textile base; a thermoplastic adhesive formed on the bottom surface of the textile base; a plurality of mounting pads formed on the thermoplastic adhesive and facing the conductive patterns, respectively; and a plurality of via-hole-type coupling parts penetrating end contact points of the conductive patterns, the textile base, and the thermoplastic adhesive, and electrically coupling the mounting pads and the conductive patterns, wherein the via-hole-type coupling parts includes a bunch of via-holes filled with a conductive polymer.

Abstract: An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 ?m and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 ?m. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved.

Abstract: A monopolar and bipolar micro device transfer head array and method of forming a monopolar and bipolar micro device transfer array are described. In an embodiment, a micro device transfer head array includes a base substrate, a first insulating layer formed over the base substrate, and an array of mesa structures. A second insulating layer may be formed over the mesa structure, a patterned metal layer over the second insulating layer, and a dielectric layer covering the metal layer.

Abstract: A printed circuit board includes a first conductive layer that includes a first transmission line portion and two soldering pads, a first insulating layer disposed under the first conductive layer, a fourth conductive layer disposed under the first insulating layer and including a second transmission line portion, two through-hole vias respectively disposed across the first insulating layer, and two capacitors respectively connecting the first transmission line portion and the two soldering pads. The two through-hole vias are directly connected with the two soldering pads and extending the connection to the second transmission line portion respectively.

Abstract: Disclosed is an electronic component package (100) including a circuit board (10), an electronic component (20), and an adhesive layer (30). The circuit board (10) is provided with an electrically-conductive conductor post (16) which is buried in a base member (12), and a solder layer (18) which is provided at the front end (13) of the conductor post (16) while exposed from a surface (121) of the base member (12). An electrode pad (24) having a metal layer (22) mounted thereon is provided on the main surface (26) of the electronic component (20). The adhesive layer (30) contains a flux activating compound, and bonds the surface (121) of the base member (12) and the main surface (26) of the electronic component (20). Then, the metal layer (22) and the solder layer (18) are metal-bonded.

Abstract: An electrically conductive path is configured from a first copper plate, a second copper plate, and solder. The first copper plate has a first bent section extended from a first joining section joined to an electrically insulative board and bent toward the rear surface of the electrically insulative board. The second copper plate has a second bent section which is extended from a second joining section joined to the electrically insulative board, is bent toward the front surface of the electrically insulative board, and is disposed so as to cover, together with the first bent section, the inner wall surface of a base-material through-hole. Through-holes are provided in the portions of the second copper plate which face the inside of the base-material through-hole. Solder is filled between the first bent section and the second bent section.

Abstract: A printed circuit board includes a ground layer, a metal board, a via, and a power layer. The metal board is arranged between the ground layer and the power layer. The via is electrically connected between the metal board and the power layer. The power layer is made of a number of wires.

Abstract: A laser drilling method of a wiring board is provided. In the method, a laser beam shines on a wiring substrate including an insulating layer to remove a portion of the insulating layer. The wiring substrate is placed in a focus section of the laser beam. The focus section contains a central region, an optical axis located in the central region, and a peripheral region surrounding the central region. The maximum light intensity of the focus section is located in the peripheral region.

Abstract: Substrates having power planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a first power plane and a second power plane. The at least one noise suppression structure may include a first power plane extension that extends from the first power plane generally toward the second power plane, and a second power plane extension that extends from the second power plane generally toward the first power plane. Methods for suppressing noise in at least one of the first power plane and second power plane include providing such noise suppression structures between the power planes.

Abstract: Provided is an anisotropically conductive member that has a dramatically increased density of disposed conductive paths, can be used as an electrically connecting member or inspection connector for electronic components such as semiconductor devices even today when still higher levels of integration have been achieved, and has excellent flexibility. The anisotropically conductive member includes an insulating base and a plurality of conductive paths made of a conductive material, insulated from one another, and extending through the insulating base in the thickness direction of the insulating base, one end of each of the conductive paths protruded on one side of the insulating base, the other end of each of the conductive paths exposed or protruded on the other side thereof. The insulating base is made of a resin material and the conductive paths are formed at a density of at least 1,000,000 conductive paths/mm2.

Abstract: A multilayer circuit substrate obtained by alternately stacking conductor layers and insulator layers. The conductor layers include a core layer having a greater thickness than any of the other conductor layers and located in an inner layer of the multilayer circuit substrate. A first conductor layer facing the core layer through an insulator layer has first signal wires that transmit high frequency signals, and through-holes are formed in the core layer along the first signal wires in a location facing the first signal wires.

Abstract: A method for shortening a via stub includes: designing a first via hole to connect signal lines of a top layer and a bottom layer of a printed circuit board; and designing a second via hole to connect signal lines of the bottom layer and one of a number of middle layers of the printed circuit board. The printed circuit board include n layers, n is an even number, and the number of the one of the number of middle layers counting top down or bottom up is less than or equal to n/2. A related printed circuit board is also provided.

Abstract: Disclosed is a wiring board with a built-in component and a method for manufacturing the same, the wiring board including: a wiring pattern; an electric/electronic component electrically and mechanically connected with a surface of said wiring pattern; and an insulating layer formed on the same surface of said wiring pattern as said electric/electronic component is connected and configured so as to embed said electric/electronic component, said insulating layer having an insulating resin and a reinforcing material included in the insulating resin, wherein the reinforcing material of said insulating layer exists in the insulating resin without reaching a region of said electric/electronic component in a lateral direction, and wherein the insulating resin of said insulating layer reaches said electric/electronic component so as to adhere to said electric/electronic component.

Abstract: A circuit board comprises a substrate; a through hole penetrating the substrate along with a direction of a thickness thereof; and a through hole conductor covering an inner wall of the through hole. The substrate comprises a first fiber layer, a second fiber layer, and a resin layer arranged between the first fiber layer and the second fiber layer. Each of the first fiber layer and the second fiber layer has a plurality of fibers and a resin arranged among the plurality of the fibers. The resin layer contains a resin and doesn't contain a fiber. The inner wall of the through hole, in a cross-section view along with the direction of the thickness of the substrate, comprises a curved depression in the resin layer.

Abstract: This invention provides a multilayer printed wiring board in which electric connectivity and functionality are obtained by improving reliability and particularly, reliability to the drop test can be improved. No corrosion resistant layer is formed on a solder pad 60B on which a component is to be mounted so as to obtain flexibility. Thus, if an impact is received from outside when a related product is dropped, the impact can be buffered so as to protect any mounted component from being removed. On the other hand, land 60A in which the corrosion resistant layer is formed is unlikely to occur contact failure even if a carbon pillar constituting an operation key makes repeated contacts.

Abstract: In a flexible circuit board, signal wirings and ground wirings are provided on one main surface of a base film formed of a thermoset resin. A coverlay film formed of a thermoplastic resin is adhered to and integrated with the signal wirings, ground wirings, and base film. External terminals 15 are disposed in a predetermined conductor pattern on one main surface of the coverlay film, and a plated layer is formed on each of the external terminals. A first ground layer and a rear side resin film are adhered in this order below the base film to be integrated.

Abstract: A printed wiring board includes a board body that includes a signal line embedded at a predetermined wiring position and a through hole electrically connected to the signal line, and a connector that includes a connector plate including a connection terminal electrically connected to the signal line via the through hole, and electrically connects the connection terminal to the signal line by insertion of the connection terminal of the connector plate into the through hole in a direction of one of a front surface and a rear surface of the board body according to a wiring position of the signal line so that a transmission path of the connection terminal on a stub side is shorter than a transmission path of the connection terminal on an input and output side.

Abstract: A multilayer substrate is configured by stacking conductive layers and insulation layers. The multilayer substrate includes a core that is one of the conductive layers and is thicker than any of other conductive layers, and a first signal line that is included in the conductive layers and is adjacent to the core so that a first insulation layer that is one of the insulation layers is interposed between the core and the first signal line, the first signal line being used for transmission of an RF signal. The core has a recess portion so as to face the first signal line.

Abstract: A method and apparatus for filling a via with transparent material is presented, including the steps of providing a panel having a via, occluding the via with transparent material in a workable state so that a portion of the occluding material is internal to the via and a portion of the material is external to said via. The external and internal portions are separated so the transparent filler material, when set, forms a smooth and featureless surface. This causes the filled via to have a substantially even and uniform appearance over a wide range of viewing angles when lit.

Abstract: A conductive material includes a first metal part whose main ingredient is a first metal; a second metal part formed on the first metal part and whose main ingredient is a second metal, the second metal having a melting point lower than a melting point of the first metal, which second metal can form a metallic compound with the first metal; and a third metal part whose main ingredient is a third metal, which third metal can make a eutectic reaction with the second metal.

Abstract: A wiring substrate includes a composite substrate including an oxidized aluminum substrate portion in which a large number of penetration conductors penetrating in a thickness direction are provided, and a frame-like aluminum substrate portion provided around the oxidized aluminum substrate portion, and a wiring layer of n layers (n is an integer of 1 or more) connected to the penetration conductors.

Abstract: An IC chip for a high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3 GHz is exceeded. A conductive layer on a core substrate is formed at a thickness of 30 ?m and a conductor circuit on an interlayer resin insulation layer is formed at a thickness of 15 ?m. By thickening the conductive layer, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer as a power source layer, the capacity of supply of power to an IC chip can be improved.

Abstract: A method and apparatus for filling a via with transparent material is presented, including the steps of providing a panel having a via, occluding the via with transparent material in a workable state so that a portion of the occluding material is internal to the via and a portion of the material is external to said via. The external and internal portions are separated so the transparent filler material, when set, forms a smooth and featureless surface. This causes the filled via to have a substantially even and uniform appearance over a wide range of viewing angles when lit.

Abstract: Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a bump pad formed in the insulating member so as to be connected to the circuit pattern and protruding from an outer surface of the insulating member, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost.

Abstract: A wiring substrate includes a body including first and second surfaces, a trench having an opening on the first surface and including, a bottom surface, a side surface, and a slope surface that connects a peripheral part of the bottom surface to a one end part of the side surface and widens from the peripheral part to the one end part, the one end part being an end part opposite from the first surface, a hole including an end communicating with the bottom surface and another end being open on the second surface, a first layer filling at least a portion of the hole and including a top surface toward the trench, a second layer covering the top surface and formed on at least a portion of the trench except for a part of the side surface, and a third layer covering the second layer and filling the trench.

Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.

Abstract: A printed wiring board wiring board including a substrate having a first penetrating hole and multiple second penetrating holes formed around the first penetrating hole, a first conductive portion and a second conductive portion formed on one surface of the substrate, a third conductive portion and a fourth conductive portion formed on the opposite surface of the substrate, a first through-hole conductor formed in the first penetrating hole and connecting the first conductive portion and the third conductive portion, and multiple second through-hole conductors formed in the second penetrating holes and connecting the second conductive portion and the fourth conductive portion. The first through-hole conductor and the second through-hole conductors are made of conductive material filled in the first penetrating hole or the second penetrating holes.

Abstract: A component can include a substrate having a first surface and a second surface remote therefrom, an opening extending in a direction between the first and second surfaces, and a conductive via extending within the opening. The substrate can have a CTE less than 10 ppm/° C. The conductive via can include a plurality of base particles each including a first region of a first metal substantially covered by a layer of a second metal different from the first metal. The base particles can be metallurgically joined together and the second metal layers of the particles can be at least partially diffused into the first regions. The conductive via can include voids interspersed between the joined base particles. The voids can occupy 10% or more of a volume of the conductive via.

Abstract: In some embodiments, a system includes a conductor on a first layer of a laminated composite assembly. The laminated composite assembly has an input, an output, a first electrical interconnect which couples the conductor on the first layer of the laminated composite assembly with a second conductor on a second layer of the laminated composite assembly, and a second electrical interconnect which electrically couples the first conductor with the second conductor. A width of the second electrical interconnect is greater than a width of the first electrical interconnect. A resistance of the laminated composite assembly as measured between the electrical input and the electrical output is less than the resistance of the laminated composite assembly as measured between the electrical input and the electrical output if the width of the first electrical interconnect were substantially equal to the width of the second electrical interconnect.

Abstract: Disclosed herein is a method for fabricating a printed circuit board, including: stacking a second insulating layer including a reinforcement on an outer surface of a first insulating layer having a post via formed thereon; polishing an upper surface of the second insulating layer to expose an upper side of the post via; stacking a film member on the second insulating layer to cover the post via and compress the second insulating layer; polishing an upper surface of the film member to expose an upper side of the post via; and forming a circuit layer connected to the post via on the upper surface of the film member.

Abstract: A semiconductor chip (101) with bond pads (110) on a substrate (103) with rows and columns of regularly pitched metal contact pads (131). A zone comprises a first pair (131a, 131b) and a parallel second pair (131c, 131d) of contact pads, and a single contact pad (131e) for ground potential; staggered pairs of stitch pads (133) connected to respective pairs of adjacent contact pads by parallel and equal-length traces (132a, 132b, etc.). Parallel and equal-length bonding wires (120a, 120b, etc.) connect bond pad pairs to stitch pad pairs, forming differential pairs of parallel and equal-length conductor lines. Two differential pairs in parallel and symmetrical position form a transmitter/receiver cell for conducting high-frequency signals.