Abstract: Methods, systems, and apparatuses provide power from multiple input power sources to adjacent outputs efficiently and reliably. Aspects of the disclosure provide a power distribution unit (PDU) that includes a number of power outputs including first and second adjacent power outputs. The PDU includes a printed circuit board having a first conducting layer electrically interconnected to a first power input connection and the first power output, a second conducting layer that is at least partially above the first conducting layer and in facing relationship thereto. The second conducting layer is electrically insulated from the first conducting layer and electrically interconnected with a second power input connection and the second power output, the first and second power outputs thereby connected to different power inputs.

Abstract: The present invention relates to a core substrate, a manufacturing method thereof, and a structure for a metal via. In accordance with an embodiment of the present invention, a core substrate including: an insulation layer; a plurality of metal vias passing through the insulation layer and formed to become wider from upper and lower surfaces to a middle part of the insulation layer; and a conductive layer formed on the upper and lower surfaces of the insulation layer and connected to the plurality of metal vias. Further, a manufacturing method thereof and a structure for a metal via are provided.

Abstract: Provided is a multilayer wiring board, wherein impedance matching can be achieved in a via connection section by means of a configuration, which has a simple structure, and which can be easily processed. In the multilayer wiring board including a ground layer (401) of a layer (1), and a signal line (102) of a layer (2), an elliptical through hole is formed in the ground layer (401), said through hole being at a position facing a part of the signal line (102). The elliptical through hole overlaps the signal line (102) by a length of lambda/36-lambda/2 in the long axis direction, Impedance of the signal line (102) can be adjusted by adjusting the size of the through hole.

Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate may include an interposer having at least one conductive through via, a photo-sensitive dielectric layer formed on one side of the interposer, and at least one conductive via formed in the photo-sensitive dielectric layer and electrically connected to the conductive through via. By means of a photo lithography process with high alignment accuracy, at least one via with an extremely small diameter can be formed on the photo-sensitive dielectric layer and align with the conductive through via. Therefore, the conductive through via can have its diameter reduced as required, without considering the alignment with the at least one via. Accordingly, the interconnection density of the conductive through via on the interposer is increased.

Abstract: A method for manufacturing a wiring substrate includes forming a through-hole penetrating a core layer from one to another surface of the core layer, forming a first metal layer covering the one and the other surface of the core layer and an inner wall surface of the through-hole, forming a second metal layer on the first metal layer, and forming a patterned third metal layer on the second metal layer toward the one surface of the core layer along with forming a patterned fourth metal layer on the second metal layer toward the other surface of the core layer. The forming of the second metal layer includes covering the one and the other surfaces of the core layer and the first metal layer in the through-hole with the second metal layer and closing up a center part of the through-hole with the second metal layer.

Abstract: Provided is a circuit board, which may include a base layer, an adhesive film, a conductive circuit, and a through via. The adhesive film and the conductive circuit may be provided in plurality to be alternately stacked on the base layer. The through via may be formed through soldering. Since the base layer is not damaged during the soldering, the through via may include various conductive materials. The through via makes it possible to easily connect the conductive circuits having different functions to one another. Accordingly, the circuit board may have multi functions. Thicknesses of the conductive circuits may be adjusted to protect the conductive circuits from folding or bending of the base layer. The circuit board having a multi-layered structure can function not only as a fabric or clothes but also as an electronic circuit.

Abstract: A wiring board includes a substrate having an opening portion, multiple electronic devices positioned in the opening portion, and an insulation layer formed on the substrate such that the insulation layer covers the electronic devices in the opening portion of the substrate. The substrate has a wall surface defining the opening portion and formed such that the opening portion is partially partitioned and the electronic devices are kept from making contact with each other.

Abstract: A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder.

Abstract: One or more techniques or systems for mitigating peeling associated with a pad, such as a pad of a semiconductor, are provided herein. In some embodiments, a pad structure for mitigating peeling comprises a bond region located above a first region. In some embodiments, a first inter-layer dielectric region associated with the first region is formed in an inter-layer region under the pad. Additionally, a first inter-metal dielectric region associated with the first region is formed in an inter-metal region under the inter-layer region. In some embodiments, the first inter-metal region is formed under the first inter-layer region. In this manner, peeling associated with the pad structure is mitigated, at least because the first inter-metal dielectric region comprises dielectric material and the first inter-layer dielectric region comprises dielectric material, thus forming a dielectric-dielectric interface between the first inter-metal dielectric region and the inter-layer dielectric region.

Abstract: An information handling system circuit board interfaces storage device surface connectors and storage device controllers disposed on opposing sides by coupling a first circuit board portion having a controller press in connector to a second circuit board portion having plural surface connectors. The first and second circuit board portions couple to each other with an adhesive activated by curing. Resistant ink is printed over openings of the first circuit board portion where adhesive is applied in order to prevent the adhesive from flowing into the openings at or before the curing of the adhesive.

Abstract: This disclosure provides systems, methods and apparatus for providing a transparent multilayer structure having electrical connections between conductive components disposed throughout the structure. In one aspect, a thin transparent conductive adhesive is used to provide electrical connections between layers. These electrical connections can be made throughout the multilayer structure, even in portions of the structure that overlie a display in a display device, reducing the overall footprint of a display device including such a multilayer structure.

Abstract: The present invention relates to a circuit board. The circuit board includes: a first path is routed on a first layer of the circuit board for transferring a first signal; a second path is routed on a second layer of the circuit board for transferring a second signal; a third path is routed on third layer of the circuit board; a first via is coupled to the first and third paths, and the first via is removed when the second signal is transferred by the second path; a second via is coupled to the second and third paths, and the second via is removed when the first signal is transferred by the first path.

Abstract: The present invention provides a printed circuit board including: a circuit pattern formed on a first insulating layer; a via pad disposed on the first insulating layer by being spaced apart from the circuit pattern, formed on a lower surface, where a via hole is formed, to have a cross section larger than that of the via hole, and having concavo-convex patterns; a second insulating layer formed on the via pad where the via hole is not formed and on the circuit pattern; and a copper foil layer formed on the second insulating layer and the via hole, and a method of manufacturing the same.

Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.

Abstract: The present disclosure relates to assessing coverage of a connection joint, such as a solder joint, between a device and a printed circuit board (PCB). In accordance with various embodiments, a PCB includes a conductive thermal pad adapted to be electrically and mechanically connected to an exposed pad of a component by an intervening connection joint to establish a thermal path to dissipate thermal energy from the component. An isolated test via that extends through the conductive thermal pad in non-contacting relation thereto, the test via adapted to mechanically and electrically contact said intervening connection joint. A coverage characteristic of the intervening connection joint can be determined in relation to application of an electrical signal to the test via.

Abstract: A substrate having a plurality of light-emitting elements mounted thereon is described. The substrate may be mounted in a lighting apparatus and may include a surface on which the plurality of light-emitting elements are mounted and one or more holes through which heat may be conducted from the first surface to another surface of the substrate. For example, a heat conductive and electrically non-conductive material may cover a surface of the one or more holes. According to some arrangements, the surface of the substrate may include an electrically non-conductive layer and an electrically conductive layer such that the electrically non-conductive layer is electrically isolated or separated from the electrically conductive layer.

Abstract: Off-plane conductive line interconnects may be formed in microelectronic devices. In one example, such as device includes a first set of metal conductive lines in a dielectric substrate at a first horizontal layer of the substrate, a second set of metal conductive lines in the substrate at the first horizontal layer of the substrate and vertically offset from the first set of metal lines, and a dielectric material insulating the metal lines from each other and the first horizontal layer from other horizontal layers. Vias in the dielectric material to connect both the first and second set of metal lines to metal lines at a second horizontal layer of the substrate.

Abstract: A printed wiring board (PWB) can be fabricated with enhanced thermal characteristics that can enable the use of higher performance electronic components and/or a smaller packaging configuration. A substrate layer of the PWB includes a matrix material and optional reinforcing fibers embedded in the matrix material. The matrix material and/or the reinforcing fibers may include thermally-conductive particles such as nanodiamonds that increase the thermal conductivity of the substrate layer. Holes may be formed through the substrate layer for receiving and/or electrically connecting electronic components. The thermally-conductive particles are sized sufficiently small to allow the formation of the holes through the substrate layer using conventional equipment and processes such as drilling. The PWB may also include a protective coating that comprises thermally-conductive particles.

Abstract: A carrier (1) for an optoelectronic structure (2) is specified, wherein in places an electrically insulating passivation material (16) is arranged between an electrically conductive layer (14) of the carrier (1) and a carrier-side connecting means layer (15). Furthermore, an optoelectronic semiconductor chip comprising such a carrier and an optoelectronic structure (2) is specified, said structure being electrically conductively and mechanically connected to the carrier (1) by means of the carrier-side connecting means layer (15).

Abstract: There is provided a wiring board including a stiffener bonded to a circuit board, and a laminate formed by laminating a plurality of insulating layers and a plurality of wiring layers on a face of the stiffener opposite to a face bonded to the circuit board. On both faces of the laminate in a laminating direction, terminal connection parts connected to the wiring layers and connected to a terminal part of an electronic component are formed. Further, a component disposition hole, in which the terminal connection parts formed on one of the faces of the laminate are positioned and the electronic component is disposed, and a through hole for connection to the circuit board are formed in the stiffener.

Abstract: A printed circuit board includes a first electrically conductive circuit pattern, a substrate layer, an adhesive sheet, and a second electrically conductive circuit pattern, which are arranged in the above described order. The printed circuit board includes a single layer electrically conductive circuit area. The adhesive sheet defines a first opening spatially corresponding to the single layer electrically conductive circuit area. The adhesive sheet includes a first inner sidewall surrounding the first opening. The second electrically conductive circuit pattern defines a second opening spatially corresponding to the single layer electrically conductive circuit area. The second electrically conductive circuit pattern includes a second inner sidewall surrounding the second opening. The first inner sidewall and the second inner sidewall are not completely coplanar.

Abstract: Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.

Abstract: A wiring board with built-in metal slugs includes a dielectric hybrid core and build-up circuitries. The metal slugs extend into apertures of a stiffener of the hybrid core and are electrically connected to the build-up circuitry. The build-up circuitry covers the metal slugs and the stiffener and provides signal routing. The metal slugs can serve as power and ground planes for the wiring board.

Abstract: A contact area is provided on a carrier for connection to a mating contact area on a further carrier using an adhesive containing conductive particles. The contact area includes at least one recess forming a drain channel for the adhesive, extending from one edge of the contact area to an opposing edge and having a width being less than an average diameter of the particles. Alternatively, the contact area includes boreholes extending from a main surface to an opposing main surface and having diameters being approximately equal to or smaller than the average diameter of the particles in at least one direction and a cavity is formed in the carrier beneath the contact area. Alternatively, integral moldings forming a turf structure are provided on the contact area and distances between the moldings are equal to or smaller than the average diameter of the particles in at least one direction.

Abstract: A hybrid wiring board includes an interposer, a stopper, a stiffener and a build-up circuitry. The stopper is laterally aligned with and laterally extends beyond peripheral edges of the interposer in lateral directions. The interposer extends into an aperture of the stiffener and is electrically connected to the build-up circuitry. The build-up circuitry covers the stopper, the interposer and the stiffener and provides signal routing for the interposer. The stiffener provides mechanical support, ground/power plane and heat sink for the build-up circuitry.

Abstract: A wiring board including a first substrate having a penetrating hole penetrating through the first substrate, a built-up layer formed on one surface of the first substrate and including multiple interlayer resin insulation layers and wiring layers, the built-up layer having an opening portion communicated with the penetrating hole of the first substrate and opened to the outermost surface of the built-up layer, an interposer accommodated in the opening portion of the built-up layer and including a second substrate and a wiring layer formed on the second substrate, the wiring layer of the interposer including multiple conductive circuits for being connected to multiple semiconductor elements, and a filler filling the opening portion of the built-up layer such that the interposer is held in the opening portion of the built-up layer. The opening portion of the built-up layer has a tapered portion tapering toward the outermost surface of the built-up layer.

Abstract: Provided is a printed wiring board including a first heat dissipation pattern placed in one surface layer on which a semiconductor package is to be mounted, a second heat dissipation pattern placed in the other surface layer, and an inner layer conductor pattern placed in an inner layer, in which through holes are formed in the printed wiring board; the first heat dissipation pattern has a joint portion which is placed in an opposed region opposed to a heat sink of the semiconductor package and which is joined to the heat sink with solder; at least one of the through holes is placed in the opposed region; and the second heat dissipation pattern is formed in a pattern in which an end portion of a conductor film in the one of the through holes on the other surface layer side is separated.

Abstract: A wiring board includes a board including a core, a conductive layer on the core, and a laminated structure over the core and conductive layer, and a stacked structure formed in the board and including a through-hole conductor through the core and a via conductor in the laminated structure. The through-hole conductor has though-hole portion through the core and land portion on the core, the laminated structure includes an insulation layer in which the via conductor is formed, the via conductor is stacked on the land portion such that the stacked structure including the through-hole and via conductors is formed through the core and the insulation layer, and the stacked structure is formed such that the through-hole portion has end connected to the land portion and the end has width set greater than width of bottom of the via conductor and smaller than width of top of the via conductor.

Abstract: A conductive via and method of forming a conductive via in a multilayer printed circuit board are disclosed. A hole is drilled into a printed circuit board that is reinforced with glass fibers, wherein the hole extends between two conductive elements on different layers of the printed circuit board and cuts through a portion of the glass fibers. A tungsten nitride layer is then deposited on the walls of the hole, wherein the tungsten nitride layer has a thickness between 1.5 nanometers and 20 nanometers. A copper layer is deposited over the tungsten nitride layer, wherein the copper and tungsten nitride form a conductive via that provides an electrically conductive pathway between the two conductive elements, and wherein the tungsten nitride layer isolates the copper layer from the glass fibers.

Abstract: A circuit board with reduced adhesive overflow includes a substrate and a conductive layer. The conductive layer is disposed on the substrate. The conductive layer includes a hole, a first placement area and a second placement area. The hole is used for forming a cavity with the substrate. The first placement area is used for the first electronic element to be fixedly connected onto the circuit board through the first contact surface. The second placement area is used for the second electronic element to be fixedly connected onto the circuit board through the second contact surface. An adjacent place of the first placement area and the second placement area and the hole are overlapped. The cavity is used to accommodate the conductive adhesive for fixedly connecting the first electronic element and the second electronic element.

Abstract: A circuit board includes an insulation layer, an electrically conductive layer, and a solder mask layer. The insulation layer has a plurality of through holes passing through. The electrically conductive layer is formed on a surface of the insulation layer and covers the through holes. The electrically conductive layer has a plurality of portions exposed in the through holes to serve as a plurality of first conductive pads. The solder mask layer covers the electrically conductive layer and defines a plurality of openings to expose parts of the electrically conductive layer. Parts of the electrically conductive layer are exposed to the solder mask layer to serve as a plurality of second conductive pads. The second conductive pads are electrically connected to the first conductive pads respectively. This disclosure further relates to a chip package and a method of manufacturing the same.

Abstract: Disclosed herein are a printed circuit board and a method for manufacturing the same. The printed circuit board includes: a core reinforcement having stiffness; insulating layers formed on both surfaces of the core reinforcement; a through hole formed by penetrating through the insulating layer and the core reinforcement; and a circuit layer formed on the insulating layer and a plating layer formed in the through hole for implementing inter-layer connection of the circuit layers.

Abstract: A compact transition structure includes a printed circuit board, wherein there is a rectangular region on one side of the printed circuit board and the rectangular region has a pair of long edges and a pair of short edges; a transition probe on the one side of the printed circuit board, wherein the transition probe extends into the rectangular region through a long edge of the rectangular region and has a terminal near a center of the rectangular region; and a coupler probe on the one side the printed circuit board, wherein the coupler probe extends into the rectangular region through a short edge of the rectangular region and has a terminal before the center of the rectangular region such that the coupler probe is electrically insulated from the transition probe.

Abstract: A wiring substrate includes an insulating layer, an upper wiring pattern, and a lower wiring pattern, the wiring patterns sandwiching the insulating layer. The lower wiring pattern includes an interlayer connecting conductor integral therewith and projecting toward the upper wiring pattern for electrical connection to the upper wiring pattern. The interlayer connecting conductor is joined to the upper wiring pattern so as to penetrate into the upper wiring pattern beyond a joining interface between the insulating layer and the upper wiring pattern. Thus, the wiring substrate adaptable for a large current is provided without causing degradation of reliability in connection, which may occur by cracking, disconnection, interlayer peeling-off, etc.

Abstract: An interposer substrate of the invention includes: a single substrate having a first main surface and a second main surface; a plurality of through-hole interconnections having at least a first portion formed so as to extend in a direction different from the thickness direction of the substrate, a second portion constituting one of end portions of a through-hole interconnection, and a third portion constituting the other of the end portions of the through-hole interconnection, the through-hole interconnections being provided inside the substrate so as to connect the first main surface to the second main surface, wherein the second portion is substantially perpendicular to the first main surface and is exposed to the first main surface, the third portion is substantially perpendicular to the second main surface and is exposed to the second main surface, and lengths of the through-hole interconnections are the same as each other.

Abstract: The described embodiment relates generally to the field of PCB fabrication. More specifically conductive spheres are used in a bonding sheet to enable inter-layer communication in a multi-layer printed circuit board (PCB). The conductive spheres in the bonding sheet can be used in place of or in conjunction with conventional electroplated vias. This allows the following advantages in multi-layer PCB fabrication: dielectric substrate layers made of varying types of material; PCBs with higher resilience to stress and shock; and PCBs that are more flexible.

Abstract: A method for forming a frame attachment interconnect between a substrate and a frame is disclosed. The method can include applying a composite material (e.g., epoxy-glass prepreg) to a surface of a substrate. The composite material can have one or more holes disposed to substantially align with a corresponding pad on the surface of the substrate. A metal disc is placed in each hole of the composite material on top of the corresponding pad. A frame member can be placed on top of the composite material and the metal discs. The frame member can have one or more pads disposed to substantially align with the metal discs. The substrate, composite material, metal discs and frame combination can be cured in a controlled atmosphere that can include a vacuum and a predetermined temperature to create discrete electrical connections between adjacent pads but with each encapsulated and electrically isolated.

Abstract: A laminated multilayer electronic support structure comprising a dielectric with integral vias and feature layers and further comprising a planar metal core characterized by a thickness of less than 100 microns.

Abstract: Methods and structures are provided for implementing feed-through and domain isolation using ferrite and containment barriers. A vertical isolator is provided between a first domain and a second domain on a printed circuit board with signals passing between the first domain and the second domain. The vertical isolator is placed over a domain separation gap between the first and second domains in the printed circuit board, the vertical isolator having a vertical isolation barrier between a first vertical plate coupled to the first domain and a second vertical plate coupled to the second domain. The vertical isolation barrier is formed of a unitary ferrite block or a non-conductive magnetic absorber material. A plurality of capacitance feed-through plates and a dielectric material are provided within the vertical isolator.

Abstract: A wiring board (package) has a structure in which multiple wiring layers are stacked one on top of another with insulating layers each interposed between corresponding two of the wiring layers, and the wiring layers are connected to one another through vias formed in each of the insulating layers. In a peripheral region of the package, reinforcing patterns are provided on the same surfaces where the corresponding wiring layers are provided, respectively. Each of the reinforcing patterns is formed of a conductive layer formed on the same surface where the corresponding one of the wiring layers is provided, and is provided in an intermittent ring-like shape when viewed in a planar view.

Abstract: A printed circuit board includes: an insulating substrate, and a patterned conductive layer having a signal line and fixed on the insulating substrate, where signal lines on different planes of the patterned conductive layer are electrically connected to a via hole through a pad. An inner wall of the via hole is formed of a conductive bar and an insulating bar that penetrate the via hole; the pad is at an edge of the via hole and is connected to the conductive bar; the pad has an unclosed structure. In the printed circuit board according to the present invention, the size of the pad is significantly reduced by arranging the pad at partial edge of the via hole, thereby effectively improving a layout density of the patterned conductive layer, hence reducing the size of the printed circuit board, and satisfying the market demand for smaller electronic products.

Abstract: A circuit board including a board substrate having opposite first and second sides. The board substrate has a thickness measured along a z-axis that is perpendicular to the first and second sides. The circuit board also includes plated thru-hole (PTH) vias extending along the z-axis from the first side into the board substrate. The PTH vias are arranged to form multiple signal pairs. The circuit board also includes signal traces that are directly coupled to the PTH vias and extend perpendicular to the z-axis in the board substrate. The signal traces and the PTH vias are configured to transmit differential signals. The circuit board also includes ground columns that extend along the z-axis in the board substrate. The ground columns are distributed relative to the signal pairs to form shield arrays. Each of the shield arrays surrounds one of the signal pairs, wherein the ground columns comprise microvias.

Abstract: A wiring board has a plurality of wiring layers, a first land, a second land, a first via and a second via. The first land and the second land are formed on at least one wiring layer of the wiring board and are disposed to partially overlap with each other. The first via and the second via are formed in association with the first land and the second land, respectively. The first via and the second via electrically connect a first wiring layer and a second wiring layer of the plurality of wiring layers to each other. The wiring board has a separator that is formed by a hole that separates the first land and the second land from each other.

Abstract: Disclosed herein is a package substrate including: a base substrate; insulation layers formed on upper and lower portions of the base substrate; a first metal layer formed on an upper portion of the insulation layer; a first through-via penetrating through the base substrate, the insulation layer, and the first metal layer and being made of an insulating material; a seed layer formed on upper and lower portions and an inner wall of the first through-via; a second metal layer formed on upper portions of the first metal layer and the seed layer; and a second through-via formed in the seed layer formed at the inner wall of the first through-via and the second metal layer.

Abstract: A flexible polymeric dielectric layer has first and second major surfaces. The first major surface has a conductive layer thereon. The dielectric layer has at least one via extending from the second major surface to the first major surface. The conductive layer includes electrically separated first and second portions configured to support and electrically connect a light emitting semi-conductor device to the conductive layer.

Abstract: A wiring board includes an insulating layer; a connection part provided on a surface of the insulating layer, the connection part including a first plating layer including a flat surface and a curved surface continuous with the flat surface, wherein the flat surface and the curved surface are exposed on the insulating layer, and an end portion of the curved surface is in contact with the surface of the insulating layer; and a second plating layer formed on an interior surface of the first plating layer so as to be coated with the first plating layer; and a via formed in the insulating layer so as to be connected to the second plating layer.

Abstract: A method for forming an interconnection element having metalized structures includes forming metalized structures in an in-process unit that has a support material layer with first and second spaced-apart surfaces defining a thickness therebetween, a handling structure, and an insulating layer separating at least portions of the first surface of the support material layer from at least portions of the handling structure. The metalized structures are formed extending through the thickness of the support material layer. The method also includes etching at least a portion of the insulating layer to remove the handling structure from the in-process unit and further processing the in-process unit to form the interconnection element.

Abstract: A substrate is provided that includes a plurality of substrate layers and a plural diameter via having a first via portion and a second via portion. The first via portion is formed in a first substrate layer, has a first diameter, and extends along a first axis. The second via portion is formed in a second substrate layer, has a second diameter that is different than the first diameter of the first via portion, and extends along a second axis that is offset from the first axis of the first via portion. Optionally, the first via portion and the second via portion may have a common edge that is spaced the same distance from an edge of another via extending through the substrate.

Abstract: A method for manufacturing a printed wiring board includes forming a metal film on a surface of an insulative board, a plating resist on the metal film, and a plated-metal film on the metal film exposed from the plating resist, covering a portion of the plated-metal film with an etching resist, etching to reduce thickness of the plated-metal film exposed from the etching resist, removing the etching and plating resists, and forming a wiring having a pad for wire-bonding an electrode of an electronic component and a conductive circuit thinner than the pad by removing the metal film exposed after the plating resist is removed, a solder-resist layer on the surface of the board and wiring, an opening in the layer exposing the pad and a portion of the circuit contiguous to the pad, and a metal coating on the pad and portion of the circuit exposed through the opening.

Abstract: A laminated circuit board includes a first wiring board that has a first land formed on a surface thereof; a second wiring board that has a second land formed on a surface thereof; a bonding layer that is made of a bonding resin, being laid between the first wiring board and the second wiring board, wherein the bonding layer electrically connects the first land and the second land via a conducting material; and a plate that has a through-hole into which the conducting material is supplied, wherein the plate has a resin accommodating space that accommodates therein an excess bonding resin that appears during layer stacking.