Abstract: Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.

Abstract: Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.

Abstract: The present invention relates to a method for manufacturing a TAB tap. The method includes forming a circuit pattern region having input/output terminal pattern on a base film, and forming an exposing region at a convey region having a sprocket hole for exposing the base film. Accordingly, the present invention provides a TAB tape that improves reliability of a product by fundamentally preventing the generation of metal particles by forming exposing regions that expose a base film through selectively etching and removing a metal layer of a convey region formed at both side of a TAB tape and having a sprocket hole, and that prevents short-circuit by partially removing a base film at a predetermined region not having a circuit pattern formed thereon through etching.

Abstract: A double-sided circuit board including a substrate having a first surface and a second surface on an opposite side of the first surface and having a penetrating hole extending between the first surface and the second surface, a first conductive circuit formed on the first surface of the substrate, a second conductive circuit formed on the second surface of the substrate, and a through-hole conductor formed in the penetrating hole of the substrate and electrically connecting the first conductive circuit and the second conductive circuit. The penetrating hole comprises a first hole having a first opening with a diameter R1 on the first surface of the substrate, a second hole having a second opening with a diameter R2 on the second surface of the substrate, and a third hole connecting the first hole and the second hole and having a diameter smaller than at least one of R1 and R2.

Abstract: A circuit board includes a substrate, a circuit pattern and a through electrode. The circuit pattern is disposed on one side of the substrate in a thickness direction thereof. The through electrode is filled in a through-hole formed in the substrate with one end connected to the circuit pattern. The circuit pattern and the through electrode each have an area containing a noble metal component (e.g., Au component) and are connected to each other therethrough.

Abstract: A relay board for relaying plurality of electric wires to a transmission connector, the relay board provided with first and second front ground pads 12a, 12b which are arranged on a front surface, first and second back ground pads 13a, 13b which are arranged on a back surface, signal pads 14a to 15b which are arranged between the ground pads, a first via hole 17a which connected the first front ground pad 12a and the first back ground pad 13a, and a second via holes 17b which connects the second front ground pad 12b and second back ground pad 13b, the first via hole 17a and the second via hole 17b being arranged at the both sides of the signal pads. It is possible to provide an inexpensive relay board with excellent transmission characteristics and grounding characteristics.

Abstract: A substrate includes a plurality of through electrodes. The through electrode has a nanocomposite structure including a nm-sized carbon nanotube and is a casting formed by using a via formed in the substrate as a mold.

Abstract: Provided is a circuit board including a base substrate on which an internal circuit structure is formed, an insulating material configured to cover the base substrate and having a via-hole configured to expose the internal circuit pattern, an external circuit structure formed on the insulating material and electrically connected to the internal circuit structure through the via-hole, and a solder resist pattern configured to cover the insulating material to expose the external circuit structure, wherein the insulating material has a structure in which an adhesion surface between the insulating material and the solder resist pattern is stepped with respect to an adhesion surface between the insulating material and the external circuit structure.

Abstract: An embedded structure of circuit board is provided. The embedded structure of the present invention includes a dielectric layer, a pad opening disposed in the dielectric layer, and a via disposed in the pad opening and in the dielectric layer, wherein the outer surface of the dielectric layer has a substantially even surface.

Abstract: A printed circuit board (PCB) includes first and second signal layers. First and second pairs of signal transmission lines are respectively laid out on the first and second signal layers. The first pair of signal transmission lines includes first positive and negative differential signal transmission lines. The second pair of signal transmission lines includes second positive and negative differential signal transmission lines. The first positive differential signal transmission line is electrically connected to the second negative differential signal transmission line by a first vertical interconnect access (via). The first negative differential signal transmission line is electrically connected to the second positive differential signal transmission line by a second via. An angle between a centerline of each of the first via and second via and a surface of the PCB is an acute angle.

Abstract: A printed circuit board includes a first layout layer, a second layout layer, a copper foil layer, a first via and a second via. The first layout layer has a first signal line and a second signal line, each of which has a curved first portion. The second layout layer has a third signal line and a fourth signal line, each of which also has a curved first portion. The curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are coupled to the first via and the second via. In this case, the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line cooperatively generate spiral inductance characteristic.

Abstract: A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.

Abstract: A power core adapted for use as part of a circuitized substrate, e.g., a PCB or LCC. The core includes a first layer of low expansion dielectric and two added layers of a different low expansion dielectric bonded thereto, with two conductive layers positioned on the two added low expansion dielectric layers. At least one of the conductive layers serves as a power plane for the power core, which in turn is usable within a circuitized substrate, also provided. Methods of making the power core and circuitized substrate are also provided. The use of different low expansion dielectric materials for the power core enables the use of support enhancing fiberglass in one layer while such use is precluded in the other two dielectric layers, thus preventing CAF shorting problems in highly precisely defined thru holes formed within the power core.

Abstract: A method for manufacturing a printed wiring board includes filling material in through holes formed in first lands on a first substrate, forming projection portions projecting from the first lands on the surface of the material of the through holes, placing a conductive material on the first lands, and electrically connecting the first lands of the first substrate and second lands of second substrate by pressing the conductive material under melting filled between the first and second lands in the lamination direction of the substrates by the projection portions when laminating the substrates in such a manner that the lands of the other substrate face the lands of the substrate for aggregation of the conductive material.

Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 ?m) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be prevented. Thus, the reliability of the connection of the via holes can be improved.

Abstract: A printed circuit board includes an insulating board, a pair of differential vias, and a number of wiring layers. A pair of via holes extends through opposite surfaces of the insulating board. The differential vias correspond to the pair of via holes. Each differential via includes a metal plated barrel and two via capture pads. The plated barrel is plated on the inner surface of the respective via hole, and terminates at each of the two opposite surfaces of the insulating board. The via capture pads are formed on the opposite surfaces of the insulating board around the openings of the via hole, and are electrically connected to the plated barrel. The wiring layers are arranged in the insulating board, and each define a clearance hole surrounding all of the via capture pads.

Abstract: Disclosed herein are a printed circuit board and a method for manufacturing the same. The method for manufacturing a printed circuit board includes: (a) forming at least one plate through hole penetrating through an insulating layer; (b) forming pattern grooves for implementing inner layer circuits on both surfaces of the insulating layer; and (c) filling the plate through hole and the pattern grooves with a conductive material. The method for manufacturing a printed circuit board may provide the printed circuit board having excellent heat radiating characteristics and reduce process cost.

Abstract: A wiring board unit includes a connector having a plurality of terminals; and a wiring board on which the connector is mounted. The wiring board includes a first wiring pattern provided on a first wiring layer, a second wiring pattern provided on a second wiring layer at a position shallower than the first wiring layer, a first via formed in a first recess having a first depth, the first via being in contact with the first wiring pattern, and a second via formed in a second recess having a second depth that is smaller than the first depth, the second via being in contact with the second wiring pattern.

Abstract: The present disclosure relates to assessing coverage of a connection joint, such as a solder joint, between a device and a printed circuit board (PCB). In accordance with various embodiments, a PCB includes a conductive thermal pad adapted to be electrically and mechanically connected to an exposed pad of a component by an intervening connection joint to establish a thermal path to dissipate thermal energy from the component. An isolated test via that extends through the conductive thermal pad in non-contacting relation thereto, the test via adapted to mechanically and electrically contact said intervening connection joint. A coverage characteristic of the intervening connection joint can be determined in relation to application of an electrical signal to the test via.

Abstract: A multilayer printed wiring board includes a multilayered structure having conductor circuit layers and interlaminar insulative layers, the interlaminar insulative layers including an outermost interlaminar insulative layer, the conductor circuit layers including an outermost conductor circuit layer formed over the outermost interlaminar insulative, a filled-viahole formed in the outermost interlaminar insulative layer and having one or more metal plating fillings and completely closing a hole formed through the outermost interlaminar insulative layer such that the metal plating of the filled-viahole extends out of the hole and forms a substantially flat surface, and solder bumps including a first solder bump formed on the substantially flat surface of the filled-viahole and a second solder bump formed on a surface portion in the outermost conductor circuit layer.

Abstract: A multilayer printed wiring board includes: a build-up layer that is formed on a core substrate and has a conductor pattern disposed on an upper surface; a low elastic modulus layer that is formed on the build-up layer; lands that are disposed on an upper surface of the low elastic modulus layer and connected via solder bumps to a IC chip; and conductor posts that pass through the low elastic modulus layer and electrically connect lands with conductor patterns. The conductor posts have the aspect ratio Rasp (height/minimum diameter) of not less than 4 and the minimum diameter exceeding 30 ?m, and the aspect ratio Rasp of external conductor posts, which are positioned at external portions of the low elastic modulus layer, is greater than or equal to the aspect ratio Rasp of internal conductor posts, which are positioned at internal portions of the low elastic modulus layer.

Abstract: Disclosed herein is a method for fabricating a printed circuit board, including: stacking a second insulating layer including a reinforcement on an outer surface of a first insulating layer having a post via formed thereon; polishing an upper surface of the second insulating layer to expose an upper side of the post via; stacking a film member on the second insulating layer to cover the post via and compress the second insulating layer; polishing an upper surface of the film member to expose an upper side of the post via; and forming a circuit layer connected to the post via on the upper surface of the film member.

Abstract: A multilayer high-frequency circuit board includes a signal line, ground layers, and an interlayer circuit. A signal line where a high-frequency signal flows is formed in the signal line layer. The ground layers are laminated on both sides of the signal line layer, each of which is grounded. The interlayer circuit is provided in the signal line layer and includes a ground connecting portion connected to the ground layers and a signal line connecting portion connected to the signal line. One of the signal line connecting portion and the ground connecting portion surrounds an outer periphery of the other of the signal line connecting portion and the ground connecting portion concentrically with the one being separated from the outer periphery of the other along the signal line layer. An inner periphery of the one and the outer periphery of the other have a similar shape excluding a complete circle.

Abstract: A fabricating process for an embedded circuit structure is provided. A through hole is formed in a core panel and penetrates the core panel. Two indent patterns are respectively formed on two opposite surfaces of the core panel. A conductive material is electroplated into the through hole and the indent patterns, so as to form a conductive channel in the through hole and two circuit patterns in the indent patterns respectively. Portions of the circuit patterns, which exceed the indent patterns respectively, are removed for planarizing the circuit patterns to be level with the two surfaces of the core panel respectively.

Abstract: A printed circuit board includes a plurality of power layers. Each power layer defining a number of vias arranged in a number of rows. The number of the power layers is N (N>3). The power layers are defined as a 1st, 2nd, . . . , Nth power layer. The vias of the 1st power layer are connected to other power layers by a step-shaped connection means.

Abstract: A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. Thru-holes are used to connect the differential signal pairs to external components. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. At least some of the thru-holes and vias are drilled to reduce an electrically conductive stub length portion of the hole. The drilled portion of a hole includes a transition from a first profile to a second profile to reduce radio frequency reflections from the end of the drilled hole.

Abstract: A coreless wiring board has no core board but a laminated structure in which a conductor layer and resin insulating layers are alternately laminated into a multilayer. Each of the resin insulating layers is formed to contain a glass cloth in an epoxy resin. A plurality of via holes is formed to penetrate each of the resin insulating layers, and a filled via conductor for electrically connecting the conductor layers is formed in the via holes respectively. A tip of the glass cloth contained in each of the resin insulating layers is protruded from an internal wall surface of the via hole and cuts into a sidewall of the filled via conductor.

Abstract: An object of the invention is to provide a printed circuit board that has an excellent heat dissipation performance and excellent reliability, and its manufacturing method. The printed circuit board includes: prepregs (2a) and (2b) being cured after each covering the surfaces of a metal plate (1) provided with first throughholes (1a) therein and the inner walls of the first throughholes (1a); prepregs (4a) and (4b) being cured after glass clothes (3a) and (3b) are sandwiched between the prepregs (2a) and (2b), and the prepregs (4a) and (4b), respectively; and second throughholes (8) that connect wiring layers (7a) and (7c), and (7b) and (7d) provided on both surfaces of prepregs (6a) and (6b), respectively. The prepregs (2a) and (2b) and the prepregs (4a) and (4b) are characterized in that they contain inorganic filler. Furthermore, the prepregs (2a) and (2b) and the prepregs (4a) and (4b) may contain elastomer.

Abstract: A touch screen panel includes a film substrate defined by a touch active area and a non-touch active area and the touch area is arranged outside the touch active area. The touch screen panel includes a plurality of sensing electrodes arranged in the touch active area on an upper surface and a lower surface of the film substrate, and outer lines arranged in the non-touch active area on the upper and the lower surfaces of the film substrate. The outer lines are connected to the sensing electrodes along one of a first direction and a second direction, and the outer lines include a transparent electrode layer and a plating layer on the transparent electrode layer.

Abstract: Provided are a printed circuit board (PCB) having hexagonally aligned bump pads as a substrate of a semiconductor package, and a semiconductor package including the same. The PCB includes: a PCB body; a bottom metal layer at a bottom of the PCB body; and a top metal layer at a top of the PCB body, and the top metal layer includes: vias vertically connected to the PCB body; bump pads hexagonally aligned in a horizontal direction around the vias; and connection patterns connecting the vias to two or more of the bump pads. Accordingly, the number of bump pads in a unit area of the PCB may be increased.

Abstract: A CFRP core including a CFRP layer has a primary through hole. An adhesive member coats a wall surface of the primary through hole, and has a secondary through hole extending within the primary through hole. An electrically conductive layer is formed on a wall surface of the secondary through hole for electrically connecting upper and lower signal interconnections via the secondary through hole. A coating layer coats an outer peripheral edge of the CFRP core as seen in a plan view. Thereby, a printed interconnection board with low thermal expansivity and high thermal conductivity capable of preventing exfoliation of a CFRP layer on a side surface of a substrate using CFRP as a core, as well as preventing falling-off of carbon powders from the CFRP layer, and a method of manufacturing the same can be obtained.

Abstract: A printed circuit board (PCB) includes two layers, two signal transmission traces, and a vertical interconnect access (via). The signal transmission traces are respectively arranged on the layers. The signal transmission traces are electrically connected to each other through the via. A centerline of the via with a vertical line of the layers form an acute angle ?, the angle ? is less than cos?1[(Lv2?Lt2)/(Lv2+Lt2)]. Wherein Lt is loss of the two signal transmitting traces in a unit length, and Lv is loss of the via in a unit length.

Abstract: A circuit board includes a main body, an electronic component, a fixing portion and at least one via hole. The electronic component and the fixing portion are disposed on the main body. The at least one via hole is formed on the main body and adjacent to the fixing portion.

Abstract: The invention relates to an embedded multi-layer circuit board and a noise suppression method. The embedded multi-layer circuit board comprises at least two ground layers, a power layer and a plurality of vias. The power layer is between two ground layers. Each via is electrically connected with the two ground layers and electrically isolated from the power layer. The power layer is divided to a plurality of periodical cells. Each cell comprises the same number of the vias.

Abstract: Conductive lines are deposited on a substrate to produce traces for conducting electricity between electronic components. A patterned metal layer is formed on the substrate, and then a layer of material having a low thermal conductivity is coated over the patterned metal layer and the substrate. Vias are formed through the layer of material having the low thermal conductivity thereby exposing portions of the patterned metal layer. A film of conductive ink is then coated over the layer of material having the low thermal conductivity and into the vias to thereby coat the portions of the patterned metal layer, and then sintered. The film of conductive ink coated over the portion of the patterned metal layer does not absorb as much energy from the sintering as the film of conductive ink coated over the layer of material having the low thermal conductivity. The layer of material having the low thermal conductivity may be a polymer, such as polyimide.

Abstract: The present invention relates to a circuit board. The circuit board includes: a first path is routed on a first layer of the circuit board for transferring a first signal; a second path is routed on a second layer of the circuit board for transferring a second signal; a third path is routed on third layer of the circuit board; a first via is coupled to the first and third paths, and the first via is removed when the second signal is transferred by the second path; a second via is coupled to the second and third paths, and the second via is removed when the first signal is transferred by the first path.

Abstract: A printed circuit board includes a power layer, a ground layer, a signal layer, and a backboard. The backboard is arranged below the signal layer opposite to the ground layer. A number of vias are formed from the backboard through the signal layer, and then connected to the ground layer.

Abstract: The present invention provides a multilayer printed circuit board and a method for manufacturing the same. The printed circuit board includes: an inner circuit layer which is disposed on a first insulating layer; a via land which is disposed on the first insulating layer to be spaced apart from the inner circuit layer and has a hole; a second insulating layer which is disposed on the first insulating layer including the inner circuit layer and the via land; first and second outer circuit layers which are disposed on outer surfaces of the first and second insulating layers, respectively; and a via which passes through the hole of the via land and the first and second insulating layers and electrically interconnects the first and second outer circuit layers.

Abstract: In a circuit board, a laminate includes a plurality of laminated insulating material layers made of a flexible material. First external electrodes are provided on an upper surface of the laminate, and an electronic component is mounted thereon. Second external electrodes are provided on a lower surface of the laminate and mounted on a wiring board. An internal conductor is provided between first and second adjacent insulating material layers, fixed to the first insulating material layer, and not fixed to the second insulating material layer. The internal conductor is arranged so as to extend across regions obtained by connecting certain ones of the second external electrodes to certain ones of the first external electrodes located closest to the certain ones of the second external electrodes.

Abstract: An interconnect assembly including a resilient material with a plurality of through holes extending from a first surface to a second surface. A plurality of discrete, free-flowing conductive particles is located in the through holes. The conductive particles are preferably substantially free of non-conductive materials. A plurality of first contact tips are located in the through holes adjacent the first surface and a plurality of second contact tips are located in the through holes adjacent the second surface. The resilient material provides the required resilience, while the conductive particles provide a conductive path substantially free of non-conductive materials.

Abstract: The invention provides a printed circuit board and a method for fabricating the same. The printed circuit board includes a core substrate having a first surface and an opposite second surface. A first through hole and a second through hole are formed through a portion of the core substrate, respectively from the first surface and second surfaces, wherein the first and second through holes are laminated vertically and connect to each other. A first guide rail and a second guide rail are, respectively, formed through a portion of the core substrate and connected to the second through hole, so that a fluid flows sequentially from an outside of the printed circuit board through the first guide rail, the second through hole and the second guide rail, to the outside of the printed circuit board.

Abstract: An object of the invention is to provide a method for fabricating a printed wiring board that can suppress warping of the printed wiring board and can improve the yield of semiconductor chip mounting and enhance the reliability of a semiconductor package. The printed wiring board fabrication method according to the invention is a method for fabricating a printed wiring board having a through-hole in a core layer, wherein the printed wiring board fabrication method includes the step of applying a laser from one side of the core layer to a position where the through-hole is to be formed in the core layer and the step of applying a laser to the same position from the opposite side of the core layer.

Abstract: Provided are a semiconductor package, a method of forming the semiconductor package, and a printed circuit board (PCB). The semiconductor package includes: a PCB including at least two parts divided by an isolation region; a semiconductor chip mounted on the PCB; and a molding layer disposed in the isolation region. The method includes: preparing a PCB, the PCB including a plurality of chip regions and a scribe region; forming isolation regions dividing each of the chip regions into two parts, the isolation regions including inner isolation regions and outer isolation regions, the inner isolation regions being provided in the chip regions, the outer isolation regions being provided at both ends of the inner isolation regions so as to extend toward the scribe region; mounting semiconductor chips on the chip regions; and cutting the PCB along the scribe region to divide the chip regions into at least two parts.

Abstract: A method for manufacturing a ceramic substrate having a via hole(s) and a surface wiring pattern electrically connected to the via hole(s). The method includes: preparing a sintered ceramic substrate having a via hole(s); forming over the sintered ceramic substrate a sintered ceramic layer having a hole(s) or opening(s) whose bottom is configured to be at least a part of an exposed end surface of the via hole(s) by post-firing method; forming inside the hole(s) or opening(s) a conductive portion which electrically connects the surface of the sintered ceramic layer and the via hole(s); and forming over the surface of the sintered ceramic layer a surface wiring pattern electrically connected to the conductive portion.

Abstract: A magnetic device surface mounting assembly includes a specially designed printed circuit board and magnetic device. The circuit board has first and second sets of channels, the first channels having a first end of a first size, a second end of a second size, and first and second sides at least one of which taper inward between the two ends to define an opening smaller than either size. The magnetic device includes a plurality of pins extending transversely with respect to the circuit board, and a plurality of legs extending parallel with the pins and sized to pass transversely through the first end of the first set of channels and to slide laterally through and resiliently engage the opening, but to prevent transverse movement with respect to the second end of the first set of channels.

Abstract: A printed circuit board (‘PCB’) with a capacitor integrated within a via of the PCB, the PCB including layers of laminate; a via that includes a via hole traversing layers of the PCB, the via hole characterized by a generally tubular inner surface; a capacitor integrated within the via, the capacitor including two capacitor plates, an inner plate and an outer plate, the two plates composed of electrically conductive material disposed upon the inner surface of the via hole, both plates traversing layers of the laminate, the inner plate traversing more layers of the laminate than are traversed by the outer plate; and a layer of dielectric material disposed between the two plates.

Abstract: A light module and an assembling method thereof are disclosed. The light module includes a first circuit board, a second circuit board, and a light source, wherein the first circuit board has a first opening and a second opening, and the second circuit board has a first bending portion. The light source is disposed on the first circuit board. The second circuit board passes through the first opening and the second opening of the first circuit board to form the first bending portion and the first circuit board and the second circuit board are fixed together to complete the light module assembling.

Abstract: A printed circuit board defines a groove used to engage with an electronic element. The groove defines a plurality of side walls. The PCB further defines a plurality of via holes at junctions between each two neighboring side walls. The via holes are communicate with the groove and have a C-shaped section. When the electronic element is received in the groove, the electronic element snugly engages with the plurality of side walls of the groove.

Abstract: A method of manufacturing circuit boards includes the steps of forming an upper board having an opening, and provided with a circuit and an insulating film layer formed on a surface thereof, forming a lower board provided with a circuit and an insulating film layer formed on a surface thereof, forming an inter-board connecting sheet having a through-hole filled with a conductive paste, and layering the lower board, the inter-board connecting sheet and the upper board together, and applying heat and pressure. The step of forming the lower board includes a step of forming the insulating film layer into a shape leaving a clearance provided between an end of the film layer and any of an end of the opening of the upper board and an end of an opening of the inter-board connecting sheet when these three items are layered together, and the step of applying heat and pressure includes a step of inserting a cushion member into the openings of the inter-board connecting sheet and the upper board and into the clearance.

Abstract: A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film and an electrolytic plated film and a roughened layer is formed on at least a part of the surface of the conductor circuit.