Abstract: A wiring board adapted for mounting an electronic component has the form of a structure in which a plurality of wiring layers are stacked one on top of another with an insulating layer interposed therebetween and are interconnected through via holes formed in the insulating layers, respectively. A plurality of openings are formed through the structure in a region where a wiring is not formed, extending through the structure in a thickness direction thereof. Further, solder resist layers are formed on the outermost wiring layers, respectively, and exposing pad portions defined in desired locations in the outermost wiring layers.

Abstract: A mounting board including a pair of patterned electrodes, a lower surface and an upper surface opposed thereto on which a substrate of an electronic component is to be mounted, a pass-through hole penetrating through the upper surface and the lower surface, and a peripheral side surface that defines the pass-through hole. The pass-through hole includes a plurality of penetrating grooves that are cut into the mounting board and penetrate through the upper and lower surfaces. The plurality of penetrating grooves electrically split the pair of patterned electrodes. The pair of patterned electrodes is partly positioned inside the peripheral side surface, and a connection portion connecting the at least one pair of patterned electrodes and at least one pair of patterned electrodes provided on the upper surface of the substrate of the electronic component is to be disposed inside the peripheral side surface that defines the pass-through hole.

Abstract: Disclosed herein is a printed circuit board including: an insulating layer including a stopper layer for trench formation disposed in an inner portion thereof and trenches formed to expose the stopper layer for trench formation; and circuit patterns formed in the trenches.

Abstract: A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate.

Abstract: The present disclosure relates to microelectronic substrates, such as interposers, motherboards, test platforms, and the like, that are fabricated to have overlapping connection zones, such that different microelectronic devices, such as microprocessors, chipsets, graphics processing devices, wireless devices, memory devices, application specific integrated circuits, and the like, may be alternately attached to the microelectronic substrates to form functional microelectronic packages.

Abstract: An electrical connector includes a dielectric housing with a plurality of filtering modules therein. Each filtering module has a housing and a magnetics assembly including transformer cores with wires wrapped therearound. An array of pins extend from the module housing for connection to the wires. A plurality of tails extend from the module housing for interconnection to a circuit board upon which the connector may be mounted. An interconnection is provided between the pins and tails that may include filtering or other signal modifying circuitry. A circuit member having an enhanced layout is also provided for use in or upon which the connector may be mounted.

Abstract: An exemplary PCB defines a circular first via and includes a first signal layer, a second signal layer, a first reference layer between the first and second signal layer, and a signal transmission line having a first portion on the first signal layer and a second portion on the second signal layer. The first signal layer has a circular first weld pad coaxial with the first via and electrically connected to the first portion, the second layer has a circular second weld pad coaxial with the first via and electrically connected to the second portion. The first weld pad is electrically connected to the second weld pad through the first via, the reference layer defines a first through hole coaxial with the first via, the radius of the first via is R1, the radius of the first through hole is R2, R2=R1+d1, 1.5 mil?d1?4 mil.

Abstract: The present invention maintains plugging-unplugging durability of connector pins for connecting to a signal wiring board, as well as reduces a stub length of a through hole connecting to a signal wiring. In the signal wiring board according to the present invention, a through hole connecting to the inner-layer signal wiring is formed to be shorter than the other through holes. A through hole in which a connector pin connecting to the inner-layer signal wiring is inserted is formed to have a length corresponding to a depth of the inner-layer signal wiring.

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The method of manufacturing a printed circuit board includes: preparing a base substrate having first circuit layers formed on one surface or both surfaces thereof; forming a plating resist having openings for a first via layer on the base substrate; forming first via layers in the openings for a first via layer; forming insulating layers having outer metal layers on the base substrate having the first via layers formed thereon; forming openings for a second via layer over the first via layer on the insulating layers and the outer metal layers; and completing multi-layer vias by forming second via layers in the openings.

Abstract: A wiring substrate includes a body including first and second surfaces, a trench having an opening on the first surface and including, a bottom surface, a side surface, and a slope surface that connects a peripheral part of the bottom surface to a one end part of the side surface and widens from the peripheral part to the one end part, the one end part being an end part opposite from the first surface, a hole including an end communicating with the bottom surface and another end being open on the second surface, a first layer filling at least a portion of the hole and including a top surface toward the trench, a second layer covering the top surface and formed on at least a portion of the trench except for a part of the side surface, and a third layer covering the second layer and filling the trench.

Abstract: In a circuit board, a plurality of conductive layer regions coated with a conductor are separately formed on both sides of an insulating substrate, the conductive layer region formed on either side of an insulating region on each of the both sides of the insulating substrate. The plurality of the conductive layer regions include a plurality of through holes which penetrate through the insulating substrate and are coated with a conductor over an inner wall, the conductor in the through hole electrically conducts the coated conductor of the plurality of the conductive layer regions, one of the lead pins is connected to one of the separated conductive layer regions on the both sides based on the insulating region, and the other lead pin is connected to the other conductive layer region.

Abstract: A method of manufacturing a circuit board includes: providing a base substrate that comprises a first electrically conductive layer that has an inner circuit pattern formed on at least one surface of the base substrate; attaching a build-up material to the base substrate to insulate the first electrically conductive layer from outside; forming one or more holes at one time in the build-up material attached to the base substrate; forming a stack by curing the build-up material in which the one or more holes are formed; and forming a second electrically conductive layer that has an outer circuit pattern formed on at least one outer surface of the stack. The method may form the holes without drilling.

Abstract: An apparatus for detecting pattern alignment error includes a first conductive pattern disposed over a first insulation member with a power source applied of the first conductive pattern; a second insulation member for covering the first conductive pattern; a second conductive pattern disposed on the second insulation member; a conductive via connected to the second conductive pattern and passing through the second insulation member; and an insulation pattern disposed in the first conductive pattern for detecting an alignment error in response to a position of the conductive via. The apparatus for detecting pattern alignment error can detect the alignment of lower wiring in a device with multi-layer wiring.

Abstract: This relates to systems and methods for providing one or more vias through a module of an electrical system. For example, in some embodiments, the module can include one or more passive and/or active elements of the electrical system around which a packaging has been plastic molded. The module can be stacked under another component of the electrical system. Vias can then be provided that extend through the module. The vias can include, for example, electrically conductive pathways. In this manner, the vias can provide electrical pathways for coupling the component stacked on top of the module to other entities of an electronic device including the electrical system. For example, the component can be coupled to other entities such as other components, other modules, printed circuit boards, other electrical systems, or to any other suitable entity.

Abstract: An electric drive (1) with a circuit board (2), having conductor tracks (3) and contact openings (4) with plated through-holes (5) and equipped with electronic components (6), the circuit board (2) being coated with a protective layer (7) of insulating material, and press-fit contacts (8) are inserted into the contact openings (4) and in electrical contact areas (9) within the contact openings (4) electrical contact exists between a press-fit contact (8) and the plated through-hole (5) of the contact opening (4). The task of the invention is to reliably protect circuit boards of electric drives exposed to moisture and other chemical environmental effects and contact them economically.

Abstract: A printed wiring board includes a core substrate having a penetrating hole, a first circuit on a first surface of the substrate, a second circuit on a second surface of the substrate, and a through-hole conductor in the hole connecting the first and second circuits. The hole has first and second opening portions. The first opening portion becomes thinner toward the second surface. The second opening portion becomes thinner toward the first surface. The first opening portion has first and second portions. The second opening portion has first and second portions. The first and second portions of the first opening portion form inner walls bending inward at the boundary between the first and second portions. The first and second portions of the second opening portion form inner walls bending inward at the boundary between the first and second portions.

Abstract: A plurality of coaxial leads is made within a single via in a circuit substrate to enhance the density of vertical interconnection so as to match the demand for higher density multi-layers circuit interconnection between top circuit layer and bottom circuit layer of the substrate. Coaxial leads provide electromagnetic interference shielding among the plurality of coaxial leads in a single via.

Abstract: A package substrate having landless conductive traces is proposed, which includes a core layer with a plurality of plated through holes formed therein, and a plurality of conductive traces formed on at least a surface of the core layer. Each of the conductive traces has a connection end, a bond pad end, and a base body connecting the connection end and the bond pad end, the conductive trace is electrically connected to a corresponding one of the plated through holes through the connection end, and the connection end has a width greater than that of the base body but not greater than the diameter of the plated through hole, thereby increasing the contact area between the conductive trace and the plated through hole and preventing the contact surface of the conductive trace with the plated through hole from cracking.

Abstract: A composite interconnect assembly includes a body structure formed from a composite material (e.g., a carbon graphite material) with one or more conductive traces embedded therein (e.g., a copper or copper alloy). One or more contact regions are provided such that the conductive traces are exposed and are configured to mechanically and electrically connect to one or more electronic components. The body structure may have a variety of shapes, including planar, cylindrical, conical, and the like.

Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.

Abstract: A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing supporting the plurality of stacked vias. The platted through hole landing includes an etched pattern.

Abstract: A mounting substrate configured to mount a functional element thereon is provided. The mounting substrate includes an insulating base having a flat surface portion and a bank portion protruding from the flat surface portion and dividing the flat surface portion into a plurality of regions; and a conductor layer configured to electrically connect the functional element thereto. The conductor layer is adhered from the flat surface portion to a side surface of the bank portion on the base, and the regions divided by the bank portion are filled with the conductor layer.

Abstract: A printed circuit board (PCB) can prevent electrostatic discharge. A number of vias are embedded in the PCB. A circular insulated member is disposed between each via and the number of vias. Each via includes a layer of metal coated on an inner wall of a corresponding insulated member and a through hole bounded by the corresponding insulated member. An acute angle between two tangents which pass through a point of intersection of two overlapped insulated members is greater than twenty degrees.

Abstract: A circuit board including a circuit substrate, a first dielectric layer, an antagonistic activation layer, a first conductive layer, a second conductive layer and a second dielectric layer is provided. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer and an intaglio pattern. The antagonistic activation layer is disposed on the second surface of the dielectric layer. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer via the first conductive layer.

Abstract: A circuit board including a first dielectric layer having a first surface and a second surface, a first circuit layer, a second dielectric layer, and a second circuit layer is provided. At least one trench is formed on the first surface, and the first circuit layer is formed on an inside wall of the trench. In addition, the second dielectric layer is disposed in the trench, and covers the first circuit layer. The second circuit layer is disposed in the trench, and the second dielectric layer is located between the first circuit layer and the second circuit layer. A manufacturing method of the circuit board is further provided.

Abstract: An interconnect device and a method for fabricating same. An embodiment of the invention includes sequential steps of providing a flexible substrate, forming vias through the flexible substrate, applying a conductive seed layer including first and second portions, applying conductive materials including first and second portions, copper plating the substrate, and then removing the second portions of the conductive seed layer and the conductive materials.

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: a base substrate having a via hole for signal transfer and a via hole for heat radiation formed therein and having circuit layers formed on both surfaces thereof, the circuit layers including connection pads; a signal via formed in an inner portion of the via hole for signal transfer by performing a plating process using a conductive metal; and a heat radiation via formed in an inner portion of the via hole for heat radiation by performing a plating process using a conductive metal, wherein the heat radiation via is formed to have a diameter larger than that of the signal via.

Abstract: A circuit board is capable of reduce the effect of bowing. The circuit board comprises a substrate, a plurality of first vias, a plurality of second vias, and a plurality of first blocks. The substrate comprises a conductive layer outside the first blocks. The first vias pass through the substrate and the conductive layer. The first blocks would comprise the second vias, which passes through the substrate. The first vias and the first blocks can be individually or jointly disposed in a central area of the substrate, around a fastening hole, or around a circuit component. The fastening hole can be connected to at least one of the second vias by a conducting wire when the first block with the second vias is disposed around the fastening hole.

Abstract: A method for fabricating a carrier is disclosed, wherein the carrier is applied for a microelectromechanical sensing device. The method includes the steps of: providing a first substrate, wherein the first substrate includes a first metal layer, a first dielectric layer, and a first opening; providing a second substrate, wherein the second substrate includes a second metal layer, a second dielectric layer, and a second opening; providing a reticular element; pressing the first substrate, the reticular element, and the second substrate to form a composite substrate, wherein the first opening and the second opening form a hole, and the reticular element is positioned in the hole; and forming at least one conductive via in the composite substrate.

Abstract: A packaging substrate includes a core board having a first surface and an opposite second surface; at least a conic through hole formed in the core board and penetrating the first and second surfaces; a plurality of conductive paths formed on a wall of the conic through hole, free from being electrically connected to one another in the conic through hole; and a plurality of first circuits and second circuits disposed on the first and second surfaces of the core board, respectively, and being in contact with peripheries of two ends of the conic through hole, wherein each of the first circuits is electrically connected through each of the conductive paths to each of the second circuits. Compared to the prior art, the packaging substrate has a reduced number of through holes or vias and an increased overall layout density.

Abstract: A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.

Abstract: A printed wiring board includes a core substrate having first and second surfaces, a first conductor formed on the first surface of the substrate, a second conductor formed on the second surface of the substrate, a first through-hole conductor formed through the substrate and connecting the first and second conductors, and a second through-hole conductor formed through the substrate and connecting the first and second conductors. The second through-hole conductor has a diameter which is greater than a diameter of the first through-hole conductor, the first through-hole conductor has a roughened inner wall forming an interior space, the second through-hole conductor has a roughened inner wall forming an interior space, and the roughened inner wall of the first through-hole conductor has an arithmetic average roughness which is set lower than an arithmetic average roughness of the roughened inner wall of the second through-hole conductor.

Abstract: In one embodiment, there is provided a wiring substrate. The wiring substrate includes: a substrate body comprising a first surface and a second surface opposite to the first surface, wherein the substrate body has a plurality of first through holes; a plurality of first pads on the first surface of the substrate body; a plurality of second pads on the first surface of the substrate body, wherein the second pads are surrounded by the first pads. Each of the second pads has at least one second through hole, and the second pads are disposed on the first surface of the substrate body such that each of the second through holes is communicated with a corresponding one of the first through holes.

Abstract: A printed circuit board (PCB) includes a top signal layer, a bottom signal layer, a ground layer, a plurality of vias, and at least two ground vias. Both the top signal layer and the bottom signal layer include at least one protection line. The ground layer is located between the top signal layer and the bottom signal layer. The at least two ground vias extend through the PCB and are located adjacent to the vias on the PCB. The at least two ground vias are electrically connected to the ground layer to conduct noise signals, and the at least two ground vias are electrically connected by the protection lines to insulate noise signals.

Abstract: Method and apparatuses directed to printed circuit boards (PCB) including plated through-holes for interconnecting to plating busses are described herein. A PCB strip may include an inner circuitry layer comprising a plurality of trace lines, and a top circuitry layer formed over the inner circuitry layer, the top circuitry layer including a plating bus, and at least one plated through-hole interconnecting the plating bus to one or more trace lines of the inner circuitry layer. The plating bus of the top circuitry layer and the plated through-holes may be located within at least one saw street of the PCB strip.

Abstract: Provided are a circuit board with a viahole and a method of manufacturing the same. The circuit board includes: a substrate formed of an insulating material; a conductive layer disposed on the substrate; a plated layer comprising nickel and disposed on the conductive layer; and a viahole passing through the substrate, the conductive layer, and the plated layer, wherein a crystal growth direction of nickel in the plated layer is parallel to a thickness-wise direction of the substrate.

Abstract: This invention provides layout schemes for ball/pad regions on a printed circuit board for a small regular ball/pad region grid that provides additional space between ball/pad regions for increased wiring capability. The layout scheme is consistent with printed circuit board manufacturing requirements and minimum wiring channel requirements demanded by high density integrated circuit chips.

Abstract: A differential signal pair transmission structure adapted to a wiring board and including a first signal path and a second signal path is provided. The first signal path includes a first upper trace, a first lower trace and a first conductive through via. The second signal path includes a second upper trace, a second lower trace and a second conductive through via. A portion of the first signal path and a portion of the second signal path overlaps in the normal projection onto the upper or lower surface of the wiring board. Normal projections of the first and the second signal path projecting onto the upper surface of the wiring board are substantially symmetric with respect to a line which is perpendicular to a segment connecting normal projections of axes of the first and the second through via onto the upper surface and passes through the midpoint of the segment.

Abstract: Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.

Abstract: A package includes: a metal wall disposed on a conductive base plate; a through-hole disposed in input/output portions of the metal wall; a lower layer feed through disposed on the conductive base plate; a wiring pattern disposed on the lower layer feed through; an upper layer feed through disposed on a part of the lower layer feed through and a part of the wiring pattern; and a terminal disposed on the wiring pattern, wherein a width of a part of the lower layer feed through and a width of the upper layer feed through are wider than a width of the through-hole, the lower layer feed through is adhered to a side surface of the metal wall, the upper layer feed through is adhered to the side surface of metal wall, and an air layer is formed between the wiring pattern and an internal wall of the through-hole.

Abstract: A printed wiring board is disclosed that includes insulating layers, conductive layers stacked with the insulating layers alternately, a through hole penetrating the insulating layers and the conductive layers, a first plate resist part formed on a first portion of an inner wall of the through hole, the first portion being located from one end of the through hole to one of the conductive layers stacked between one pair of the insulating layers, and a plated part formed on a second portion of the inner wall of the through hole other than the first portion.

Abstract: A battery pack configured to prevent excess solder material from flowing down onto a protective circuit module (PCM) is disclosed. According to some aspects, the battery pack includes at least one battery cell, a protective circuit module (PCM) electrically connected to the battery cell, and a conductive tab configured to electrically connect the battery cell to the PCM. A tapered through hole is formed in the PCM so that the conductive tab is inserted into and fixed to the through hole.

Abstract: A conductive substrate structure includes a substrate unit, a conductive pad unit, and a conductive layer unit. The substrate unit has a top surface, a bottom surface, two opposite lateral surfaces, and a front surface. The conductive pad unit has at least two first conductive pads separated from each other and disposed on the top surface, and at least two second conductive pads separated from each other and disposed on the bottom surface. The conductive layer unit has at least two first conductive layers formed on the front surface and respectively electrically connected to two front sides of the two first conductive pads, and at least two second conductive layers respectively formed on the two opposite lateral surfaces and respectively electrically connected to two opposite lateral sides of the two second conductive pads. The two first conductive layers are respectively electrically connected with the two second conductive layers.

Abstract: A printed circuit board and a semiconductor package using the same. The semiconductor package includes a printed circuit board (PCB) and a semiconductor chip mounted on the PCB. The printed circuit board includes a base substrate that has a first surface and a second surface which are positioned opposite to each other, and has through-holes, the first surface having a concave-convex portion, an adhesive layer that is disposed on the second surface of the base substrate, a wiring layer that is attached to the second surface of the base substrate by the adhesive layer and that comprises exposed portions exposed through the through-holes, an adhesive member that is disposed on the first surface of the base substrate and adheres the semiconductor chip to the first surface, and electrical connection members that electrically connect the wiring layer with the semiconductor chip.

Abstract: A plurality of vias is disposed side by side on a multilayer board. A first via which is one of the vias disposed at one outer portion is electrically connected to a first outgoing line provided on the multilayer board. A second via at the other outer portion is electrically connected to a second outgoing line provided on the multilayer board. A plurality of the vias is connected to a first fixed potential layer (a ground layer, for example) of the multilayer board. At least one second fixed potential layer is provided, with a plurality of the vias through a clearance and having the same potential as that of the first fixed potential layer, as an inner layer of the multilayer board between the first and second outgoing lines and the fixed potential layer. Therefore, a BPF whose rate of occupied area is low is formed on the multilayer board without additional production processes.

Abstract: According to one embodiment of the invention, a circuit board comprises a conductive layer including a land portion and a line portion connected to the land portion, and; a conductor connected to a surface of the land portion. A planar shape of the connected portion between the conductor and the land portion has a elongated shape along a width direction of the line portion. A part of the connected portion is located within an imaginary region formed by imaginarily extending the line portion toward the land portion.

Abstract: An enhanced mechanism is disclosed for via stub elimination in printed wiring boards (PWBs) and other substrates. In one embodiment, the substrate includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first and second ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first and second conductive vias are respectively plated onto the first and second through-holes. The depth of these PTH plugs is controlled (e.g., using a photomask and/or variable laser power) to prevent the first and second conductive vias from extending substantially beyond the first and second internal conductive traces, respectively, and thereby prevent via stubs from being formed in the first place.

Abstract: An exemplary USB interface device includes a circuit board and a USB socket mounted on the circuit board. The USB socket includes a connecting port, a plurality of electrical pins and fixing pins extending from a side of the USB socket. The circuit board defines first and second inserting hole groups. The USB socket can be selectively inserted into the first or second inserting hole group according to the type of USB socket. When the electrical pins and the fixing pins of the USB socket are inserted into and fixed on the first inserting hole group of the circuit board, the second inserting hole group is standing idle. When the electrical pins and the fixing pins of the USB socket are inserted into and fixed on the second inserting hole group of the circuit board, the first inserting hole group is standing idle.

Abstract: A manufacturing method of a circuit substrate includes the following steps. A dielectric layer is formed on at least one surface of a substrate. An insulating layer is formed on the dielectric layer. A portion of the insulating layer and a portion of the dielectric layer are removed, so as to form at least one blind via in the dielectric layer and the insulating layer. An electroless plating layer is formed on the sidewall of the blind via and a remaining portion of the insulating layer, wherein the binding strength between the insulating layer and the electroless plating layer is greater than that between the dielectric layer and the electroless plating layer. A patterned conductive layer is plated to cover the electroless plating layer.

Abstract: An electronic circuit unit includes a multi-layer substrate in which high frequency circuits are provided on two different layers and a ground layer is formed between the two layers, and grounding lands connected to peripheral conductive members through connection bars formed on a plurality of layers of the multi-layer substrate. The grounding lands are connected to each other through a via hole and conducted to the ground layer, and the connection bars protruding radially outward from at least two grounding lands provided on different layers are arranged in different directions with respect to a circumferential direction such that the connection bars do not overlap each other along a thickness direction of the multi-layer substrate.