Abstract: A porous silicon wafer including, on its upper surface side, multiple recesses, this upper surface being coated with a porous silicon layer having pores smaller than those of the wafer bulk.

Abstract: The present inventions relates to a method for manufacturing a multilayer FPCB having different number of layers in different areas. The method includes the steps of: providing a binder layer; removing a portion of the binder layer thereby defining an opening in the binder layer; forming a multilayer FPCB which having a first copper clad laminate structure and a second copper clad laminate structure disposed on two opposite sides of the binder layer respectively using the binder layer; cutting the first copper clad laminate structure; cutting the multilayer FPCB in manner that a portion of first copper clad laminate structure that is exposed to the opening is separated from the first copper clad structure thereby obtain a multilayer FPCB having different number of layers in different areas.

Abstract: The present invention provides a multilayer wiring substrate comprising: a plurality of wiring substrate laminated each other; and a cavity portion. In the multilayer wiring substrate, a wiring substrate 1 being arranged along the bottom face of the cavity portion and a wiring substrate 2 being arranged at an upper layer side of the wiring substrate 1, the wiring substrate 1 and/or the wiring substrate 2 respectively comprising an insulating base material having a predetermined properties, the wiring substrate 2 being provided with a cavity hole. Thus, it is possible to provide a multilayer wiring substrate having a cavity portion and even a function of reflector.

Abstract: In an infrared detection sensor according to the present invention, all material constituting an upper portion of a sensing electrode in a supporting arm region is removed so that a supporting arm has low thermal conductivity. As a result, thermal conductivity of the infrared sensor structure is reduced, and the infrared detection sensor has excellent sensitivity.

Abstract: An ultrasonic transducer according to the present invention includes: two or more ultrasonic transducer cells, each of which has a lower electrode, a first insulating layer placed on the lower electrode, a cavity placed on the first insulating layer, a second insulating layer placed on the cavity, and an upper electrode placed above the second insulating layer; channels which communicate the cavities with each other; the second insulating layer placed on the channels; holes formed in the second insulating layer placed on the channels; and sealing portions which seal the holes, where that part of the sealing portions which enters the channels is the same in cross-sectional shape as the holes.

Abstract: A method and system for treating a surface structure of a workpiece. The method provides a carrier-gel to the surface structure of the workpiece. The carrier-gel includes an etchant for selectively etching a first material of the surface structure and has a gel particle size larger than the surface structure. The method etches the first material from the surface structure by a reaction of the etchant included in the carrier-gel with the first material of the surface structure in order to remove a part of the first material from the surface structure for subsequent device fabrication. The system includes a chemical reactor supporting the workpiece. The chemical reactor is configured to flow the carrier-gel noted to the surface structure of the workpiece in order to remove the first material from the surface structure.

Abstract: A micromechanical component having a base part, a swiveling part, which has an electrically conductive material, and a swiveling part insulation which electrically insulates a first and a second section of the swiveling part from each other. A first flexible, electrically conductive connecting element connects the base part to the first swiveling part section, and a second flexible, electrically conductive connecting element connects the base part to the second swiveling part section.

Abstract: A process for producing a multiplicity of microfluidic arrangements from a plate-shaped composite structure and an atomiser which is provided with such nozzle arrangements is proposed. Each arrangement has a groove structure which forms flow channels and the dimensions of which are in the micrometer range. The lines for optional subsequent mechanical separation of bridging groove structures are joined to each other and are partly or completely filled with a filling medium before mechanical machining. The medium is selected so that it is not removed from the groove structures either by the mechanical machining or by aids used during mechanical machining. Afterwards, however, the filling medium is removed from the groove structures by suitable measures. The groove structures are thereby prevented from becoming blocked due to mechanical contaminants.

Abstract: A substrate bearing, on one main face, a composite electrode, which includes an electroconductive network which is a layer formed from strands made of an electroconductive material based on a metal and/or a metal oxide, and having a light transmission of at least 60% at 550 nm, the space between the strands of the network being filled by an electroconductive fill material. The composite electrode also includes an electroconductive coating, which may or may not be different from the fill material, covering the electroconductive network, and in electrical connection with the strands, having a thickness greater than or equal to 40 nm, of resistivity ?1 less than 105 ?·cm and greater than the resistivity of the network, the coating forming a smoothed outer surface of the electrode. The composite electrode additionally has a sheet resistance less than or equal to 10?/?.

Abstract: The invention includes methods of etching features into substrates. A plurality of hard mask layers is formed over material of a substrate to be etched. A feature pattern is formed in such layers. A feature is etched only partially into the substrate material using the hard mask layers with the feature pattern therein as a mask. After the partial etching, at least one of the hard mask layers is etched selectively relative to the substrate material and remaining of the hard mask layers. After etching at least one of the hard mask layers, the feature is further etched into the substrate material using at least an innermost of the hard mask layers as a mask. After the further etching, the innermost hard mask layer and any hard mask layers remaining thereover are removed from the substrate, and at least a portion of the feature is incorporated into an integrated circuit.

Abstract: Provided are fabrication, characterization and application of a nanodisk electrode, a nanopore electrode and a nanopore membrane. These three nanostructures share common fabrication steps. In one embodiment, the fabrication of a disk electrode involves sealing a sharpened internal signal transduction element (“ISTE”) into a substrate, followed by polishing of the substrate until a nanometer-sized disk of the ISTE is exposed. The fabrication of a nanopore electrode is accomplished by etching the nanodisk electrode to create a pore in the substrate, with the remaining ISTE comprising the pore base. Complete removal of the ISTE yields a nanopore membrane, in which a conical shaped pore is embedded in a thin membrane of the substrate.

Abstract: A drug-delivery chip and a method of fabricating the same are provided. The drug-delivery chip has a main body having at least one drug receiving space individually formed with an opening for storing drugs therein; a thin film for sealing up the at least one drug receiving space; a first conductive wire connecting to one end of the thin film; a second conductive wire connecting to another end of the thin film; a signal-receiving module for receiving actuated signals; and a control module for applying voltages to first and second wire conductive s according to the actuated signal, thereby generating heat to break off the thin film for the release of a drug or drugs received in the at least one drug receiving space.

Abstract: A manufacturing method for a printed circuit board is disclosed. The method includes: forming a first circuit pattern on a metal layer of a conductive carrier, which has the metal layer stacked on one side, pressing the conductive carrier and a first insulation layer together with the first circuit pattern facing the first insulation layer, forming a via by selectively removing the conductive carrier, and removing the metal layer. Using this method, a high-density thin package can be manufactured with increased reliability, and the productivity of the manufacturing process can also be improved.

Abstract: The invention provides a process for texturing a surface of a semiconductor material, the process comprising: applying a layer of a protective substance on said surface wherein said layer is sufficiently thin that it has a plurality of apertures therethrough; and contacting said layer and said semiconductor material with an etchant capable of etching said semiconductor material faster than said protective substance, said etchant making contact with said semiconductor material at least through said apertures, for a time and under conditions in which said semiconductor material is etched by said etchant in the vicinity of said apertures to produce a textured surface on said semiconductor material, but said protective substance is substantially unetched.

Abstract: The present invention relates to a superconducting film having a substrate and a superconductor layer formed on the substrate, in which nano grooves are formed parallel to a current flowing direction on a substrate surface on which the superconductor layer is formed and two-dimensional crystal defects are introduced in the superconductor layer on the nano grooves, and a method of manufacturing this superconducting film. A superconducting film of the invention, which is obtained at low cost and has very high Jc, is useful in applications such as cables, magnets, shields, current limiters, microwave devices, and semifinished products of these articles.

Abstract: Embodiments of MEMS devices include a movable layer supported by overlying support structures, and may also include underlying support structures. In one embodiment, the residual stresses within the overlying support structures and the movable layer are substantially equal. In another embodiment, the residual stresses within the overlying support structures and the underlying support structures are substantially equal. In certain embodiments, substantially equal residual stresses are be obtained through the use of layers made from the same materials having the same thicknesses. In further embodiments, substantially equal residual stresses are obtained through the use of support structures and/or movable layers which are mirror images of one another.

Abstract: The present invention provides a self anchoring electrode for recording, measuring and/or stimulating nerve activity in nerves and/or nerve fascicles of the peripheral nervous system, and methods for using such a self anchoring electrode.

Abstract: The present disclosure relates to a method of fabricating a capacitive touch pane where a plurality of groups of first conductive patterns are formed along a first direction, a plurality of groups of second conductive patterns are formed along a second direction, and a plurality of connection components are formed on a substrate. Each first conductive pattern is electrically connected to another adjacent first conductive pattern in the same group by each connection component and each group of the second conductive patterns is interlaced with and insulated from each group of the first conductive patterns. Next, a plurality of curved insulation mounds are formed to cover the first connection components. Then, a plurality of bridge components are formed to electrically connect each second conductive pattern with another adjacent second conductive pattern in the same group.

Abstract: Provided are a circuit board which meets requirement of suppressing peeling of a through hole conductor, a mounting structure and a method for manufacturing the circuit board. A circuit board (2) is provided with a base (5) and a through hole conductor (11). The base is provided with a fiber layer (9) and a through hole (S). The fiber layer has a single fiber (8) arranged along one direction and a resin for covering the single fiber (8). The through hole (S) penetrates the fiber layer (9), and the through hole conductor is formed in the through hole. The single fiber (8) partially protrudes to the side of the through hole conductor (11) from an inner wall surface of the through hole (S), and the protruded part is covered with the through hole conductor (11).

Abstract: A solid polymer electrolyte composite membrane and method of manufacturing the same. According to one embodiment, the composite membrane comprises a rigid, non-electrically-conducting support, the support preferably being a sheet of polyimide having a thickness of about 7.5 to 15 microns. The support has a plurality of cylindrical pores extending perpendicularly between opposing top and bottom surfaces of the support. The pores, which preferably have a diameter of about 0.1 to 5 microns, are made by plasma etching and preferably are arranged in a defined pattern, for example, with fewer pores located in areas of high membrane stress and more pores located in areas of low membrane stress. The pores are filled with a first solid polymer electrolyte, such as a perfluorosulfonic acid (PFSA) polymer. A second solid polymer electrolyte, which may be the same as or different than the first solid polymer electrolyte, may be deposited over the top and/or bottom of the first solid polymer electrolyte.

Abstract: A method of making a package substrate includes providing a cladding sheet comprising a first metal layer, a second metal layer and an intermediate layer between the first and second metal layers; etching away a portion of the first metal layer to expose a portion of the intermediate layer thereby forming a metal island body; laminating a first copper clad on the cladding sheet comprising a first copper foil and a first insulating layer; patterning the first copper foil to form a first circuit trace; patterning the second metal layer to form a second circuit trace; removing the metal island body to form a cavity in the first insulating layer; and removing the intermediate layer from bottom of the cavity.

Abstract: A method of forming a device with a controlled electrode gap width includes providing a substrate, forming a functional layer on top of a surface of the substrate, forming a sacrificial layer above the functional layer, exposing a first portion of the functional layer through the sacrificial layer, forming a first spacer layer on the exposed first portion of the functional layer, forming an encapsulation layer above the first spacer layer, and vapor etching the encapsulated first spacer layer to form a first gap between the functional layer and the encapsulation layer.

Abstract: The present invention provides a novel method for the manufacture of an enhanced cold cathode electron emission source allowing a measure of area to be processed at one time. The method includes the steps of: dissolving first and second polymers in solvent to obtain a polymer solution, and applying the polymer solution onto a second conductive layer before forming a hole; precipitating and immobilizing the first polymer in a particulate in the second polymer by evaporating the solvent; removing the first polymer particulate with a developer to form an etching hole in the second polymer; and performing etching process via the etching hole so as to form the hole in the second conductive layer. In one embodiment, the second polymer has greater solubility than the first polymer in the solvent, and the first polymer has greater solubility than the second polymer in the developer.

Abstract: A semiconductor device includes a support body, a first substrate provided on a surface at one side of the support body, a second substrate provided on a surface at the other side of the support body, and a semiconductor chip provided on the first substrate exposed to an opening part piercing the support body and the second substrate. The first substrate includes a first dielectric layer and a wiring layer, a plurality of first electrodes connected to the semiconductor chip which first electrodes are provided on a first surface of the first substrate exposed to an inside of the opening part, and the second substrate includes a second dielectric layer made of a material substantially the same as the first dielectric layer.

Abstract: A method for removing a damaged dielectric material following an etch process, an ashing process, or a wet cleaning process is described. A dry, non-plasma removal process is implemented to remove a thin layer of damaged material on a feature following formation of the feature. The dry, non-plasma removal process includes a chemical treatment of the damaged material, followed by a thermal treatment of the chemically treated surface layer. The two steps, chemical and thermal treatment, can be repeated.

Abstract: Methods of forming a dielectric layer of a MIM capacitor can include forming a passivation layer on a dielectric layer of a MIM capacitor to separate the dielectric layer from direct contact with an overlying photo-resist pattern. Related capacitor structures are also disclosed.

Abstract: There is provided a plasma etching method capable of achieving a sufficient organic film modifying effect by high-velocity electrons. In forming a hole in an etching target film by plasma etching, a first condition of generating plasma within a processing chamber by way of turning on a plasma-generating high frequency power application unit and a second condition of not generating the plasma within the processing chamber by way of turning off the plasma-generating high frequency power application unit are repeated alternately. Further, a negative DC voltage is applied from a first DC power supply such that an absolute value of the applied negative DC voltage during a period of the second condition is greater than an absolute value of the applied negative DC voltage during a period of the first condition.

Abstract: Embodiments of MEMS devices include support structures having substantially vertical sidewalls. Certain support structures are formed through deposition of self-planarizing materials or via a plating process. Other support structures are formed via a spacer etch. Other MEMS devices include support structures at least partially underlying a movable layer, where the portions of the support structures underlying the movable layer include a convex sidewall. In further embodiments, a portion of the support structure extends through an aperture in the movable layer and over at least a portion of the movable layer.

Abstract: A microelectromechanical systems device having an electrical interconnect connected to at least one of an electrode and a movable layer within the device. At least a portion of the electrical interconnect is formed from the same material as a movable layer of the device. A thin film, particularly formed of molybdenum, is provided underneath the electrical interconnect. The movable layer preferably comprises aluminum.

Abstract: An electronic package and methods by which the package reduces thermal fatigue failure of conductors in the electronic package. The electronic package includes a carrier substrate having first and second surfaces and a plurality of anchor vias having a via material extending from the first surface toward the second surface. The electronic package includes a first conducting layer having a length and a width extending laterally in two dimensions across a major part of the first surface of the carrier substrate. The anchor vias have plural attachments along the length and the width of the first conducting layer to secure the first conducting layer to the carrier substrate.

Abstract: The present invention is directed to the formation of sublithographic features in a semiconductor structure using self-assembling polymers. The self-assembling polymers are formed in openings in a hard mask, annealed and then etched, followed by etching of the underlying dielectric material. At least one sublithographic feature is formed according to this method. Also disclosed is an intermediate semiconductor structure in which at least one interconnect wiring feature has a dimension that is defined by a self-assembled block copolymer.

Abstract: A probe electrode structure on a substrate is described, comprising a first probe electrode and a neighboring second probe electrode on a layer sequence that generally includes, in a direction from the substrate to the probe electrodes, an electrically conductive bottom layer, an electrically insulating center layer and a electrically conductive top layer. The probe-electrode structure of the invention provides a means to detect an undercutting of the first probe electrode in an etching step that aims at removing the top layer from regions outside the first probe electrode. An undercutting that exceeds an admissible distance from the first edge of the first electrode will remove the first top-layer probe section in the first probe opening, which causes a detectable change of the electrical resistance between the first and second probe electrodes.

Abstract: A method for fabricating the embedded thin film resistors of a printed circuit board is provided. The embedded thin film resistors are formed using a resistor layer built in the printed circuit board. In comparison with conventional discrete resistors, embedded thin film resistors contribute to a smaller printed circuit board as the space for installing conventional resistors is saved, and better signal transmission speed and quality as the parasitic capacitive reactance effect caused by two contact ends of the conventional resistors is also avoided. The method for fabricating the embedded thin film resistors provided by the invention can be conducted using the process and equipment for conventional printed circuit boards and thereby saving the investment on new types of equipment. The method can be applied in the mass production of printed circuit boards and thereby reduce the manufacturing cost significantly.

Abstract: A method of manufacturing a capacitor device includes forming at least one through-hole in a capacitor laminate formed with laminated multiple capacitors, conducting a dry desmear treatment in the at least one through-hole after forming the at least one through-hole, and forming seed metal through dry processing in the at least one through-hole after conducting the dry desmear treatment.

Abstract: A resist pattern thickening material has resin, a crosslinking agent and a compound having a cyclic structure, or resin having a cyclic structure at a part. A resist pattern has a surface layer on a resist pattern to be thickened with etching rate (nm/s) ratio of the resist pattern to be thickened the surface layer of 1.1 or more, under the same condition, or a surface layer to a resist pattern to be thickened. A process for forming a resist pattern includes applying the thickening material after forming a resist pattern to be thickened on its surface. A semiconductor device has a pattern formed by the resist pattern. A process for manufacturing the semiconductor device has applying, after forming a resist pattern to be thickened, the thickening material to the surface of the resist pattern to be thickened, and patterning the underlying layer by etching, the pattern as a mask.

Abstract: A microelectromechanical systems device having support structures formed of sacrificial material surrounded by a protective material. The microelectromechanical systems device includes a substrate having an electrode formed thereon. Another electrode is separated from the first electrode by a cavity and forms a movable layer, which is supported by support structures formed of a sacrificial material.

Abstract: A microelectromechanical systems device having support structures formed of sacrificial material surrounded by a protective material. The microelectromechanical systems device includes a substrate having an electrode formed thereon. Another electrode is separated from the first electrode by a cavity and forms a movable layer, which is supported by support structures formed of a sacrificial material.

Abstract: The invention relates to a printed circuit board having metal bumps which are of even heights and are directly connected to a circuit pattern without using additional bump pads thus allowing an arrangement thereof at fine pitches.

Abstract: The present invention provides a manufacturing method of a substrate for an ink jet head including forming an ink supply opening to a silicon substrate, including (a) forming, at the back surface of the silicon substrate, an etching mask layer, which has an opening that is asymmetric with a center line, extending in the longitudinal direction, of an area on the surface of the silicon substrate where the ink supply opening is to be formed; (b) forming a non-through hole on the silicon substrate via the opening on the etching mask layer; and (c) forming the ink supply opening by performing a crystal anisotropic etching to the silicon substrate from the opening.

Abstract: To provide an electrode for a dielectrophoretic apparatus in which a background detected by reflecting an excited light on an electrode present under the substance (molecule) is reduced and an S/N ratio is enhanced. Also, there is provided an dielectrophoretic apparatus, in an apparatus in which a liquid containing substances to be separated is present in a non-uniform electric field formed by a dielectrophoretic electrode, and separation is carried out by a dielectrophoretic force exerting on the substances, wherein the collecting ability of substances is enhanced. The present invention is characterized in that a vacant space is provided in an electrode whereby substances subjected to influence by a negative dielectrophoretic force can be concentrated in said vacant space of an electrode, or above or below portion of the space.

Abstract: A method for preparing an interconnect is provided. The method comprises: providing a conductive base sheet including a first face and a second face, the first and second faces are disposed on opposite sides of the base sheet; preparing anode gas flow passages on the first face of the conductive base sheet; preparing cathode gas flow passages on the second face of the conductive base sheet; and selecting anode gas flow passage geometry having a first geometric configuration; and selecting cathode gas flow passage geometry having a second geometric configuration that is different from the first geometric configuration so as to optimize fuel and oxidant gas flow according to system requirements.

Abstract: A manufacturing method of a circuit board is provided. Firstly, a substrate board having a plurality of through holes is provided. Next, a first metal layer is electro-less plated on the surface of the substrate board and the surface of the through holes. Then, a second metal layer is plated on the first metal layer. After that, the second metal layer and the first metal layer are patterned to form a patterned circuit layer. Lastly, a third metal layer is plated on the patterned circuit layer.

Abstract: A method for manufacturing a wiring board which can simplify a manufacturing step. In a preparation step, a core board and an electronic component are prepared. In an insulating layer formation and fixing step, after accommodating the electronic component in an accommodation hole, a lowermost resin insulating layer is formed, and a gap between the electronic component and the core board is filled with a part of the lowermost resin insulating layer so as to fix the electronic component to the core board. In an opening portion formation step, a portion of the lowermost resin insulating layer located directly above the gap between the electronic component and the core board is removed so as to form an opening portion exposing a part of a core board main surface side conductor and a component main surface side electrode.

Abstract: Disclosed are a printed circuit board and a manufacturing method thereof. The manufacturing method of a printed circuit board includes: mounting an electronic device on an upper surface of an adhesive layer; laminating an insulator on an upper side of the electronic device and a lower side of the adhesive layer, respectively, such that the electronic device is buried; and forming a circuit pattern and a via on the insulator.

Abstract: A process for etching a silicon-containing substrate to form structures is provided. In the process, a metal is deposited and patterned onto a silicon-containing substrate (commonly one with a resistivity above 1-10 ohm-cm) in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. The metallized substrate is submerged into an etchant aqueous solution comprising about 4 to about 49 weight percent HF and an oxidizing agent such as about 0.5 to about 30 weight percent H2O2, thus producing a metallized substrate with one or more trenches. A second silicon etch is optionally employed to remove nanowires inside the one or more trenches.

Abstract: This publication discloses a method for manufacturing an electronic module, in which manufacture commences from an insulating-material sheet (1). At least one recess (2) is made in the sheet (1) and extends through the insulating-material layer (1) as far as the conductive layer on the opposite surface (1a). A component (6) is set in the recess, with its contact surface towards the conductive layer and the component (6) is attached to the conductive layer. After this, a conductive pattern (14) is formed from the conductive pattern closing the recess, which is electrically connected from at least some of the contact areas or contact protrusions of the component (6) set in the recess.

Abstract: Methods for fabrication of microfluidic systems on printed circuit boards (PCB) are described. The PCB contains layers of insulating material and a layer or layers of metal buried within layers of insulating material. The metal layers are etched away, leaving fully enclosed microfluidic channels buried within the layers of insulating material.

Abstract: The method according to the invention is essentially characterised in that a resistance material (5)—for example nickel or a nickel alloy—is attached on a first structured conductor layer (2)—it may be of copper or a copper alloy. Subsequently, the first structured conductor layer (5) is removed again at least at those locations at which a resistor is to arise. This may be effected by way of firstly removing the insulating material (1) on which the first conductor layer adheres, firstly from the rear side at the desired locations for example by way of plasma etching. The conductor layer 2 my be subsequently removed at least in regions.

Abstract: A coplanar waveguide includes a signal line formed on a major surface of a high-resistivity silicon substrate, a pair of ground conductors placed on opposite sides of the signal line, and a pair of trenches formed in the substrate between the signal line and the ground conductors. Because of the trenches, the attenuation characteristics of the coplanar waveguide are highly uniform, and are comparable to the attenuation characteristics of coplanar waveguides formed on compound semiconductor substrates.

Abstract: Provided are a piezoelectric microspeaker and a method of fabricating the same. In the piezoelectric microspeaker, a diaphragm includes a first region and a second region. The first region may be formed of a material capable of maximizing an exciting force, and the second region may be formed of a material having less initial stress and a lower Young's modulus than the first region.