Abstract: The temperature of a bipolar semiconductor element using a wide-gap semiconductor is raised using heating means, such as a heater, to obtain a power semiconductor device being large in controllable current and low in loss. The temperature is set at a temperature higher than the temperature at which the decrement of the steady loss of the wide-gap bipolar semiconductor element corresponding to the decrement of the built-in voltage lowering depending on the temperature rising of the wide-gap bipolar semiconductor element is larger than the increment of the steady loss corresponding to the increment of the ON resistance increasing depending on the temperature rising.

Abstract: There is a need for providing a technology capable of decreasing on-resistance of a power transistor in a semiconductor device that integrates the power transistor and a control integrated circuit into a single semiconductor chip. There is another need for providing a technology capable of reducing a chip size of a semiconductor device. A semiconductor chip includes a power transistor formation region to form a power transistor, a logic circuit formation region to form a logic circuit, and an analog circuit formation region to form an analog circuit. A pad is formed in the power transistor formation region. The pad and a lead are connected through a clip whose cross-section is larger than that of a wire. On the other hand, a bonding pad is connected through the wire 29.

Abstract: The power semiconductor apparatus includes a resin package made up of a power semiconductor element and a control semiconductor element which are mounted on a main front surface of a lead frame and sealed with mold resin, a power terminal led out of the resin package and electrically connected to the power semiconductor element, a control terminal led out of the resin package and electrically connected to the control semiconductor element and a cylindrical case which is formed in a manner separable from the resin package and encloses the resin package, wherein the power terminal and the control terminal are led out of lead insertion slots formed in the case, and a part of the power terminal which is led out of the case is bent along an end face of the case.

Abstract: A rectifier for rectifying alternating current into direct current is described, in which a three-phase generator includes a three-phase stator winding. The phases of the stator winding are triggered via switching elements of a power circuit. The power circuit is controlled via a control part, which includes a controller component. The rectifier includes a control part (control module) having control terminals and a power circuit (power module) controlled by the control module and optionally provided with a cooling device, in which all the power-conducting components are designed as power MOS components and integrated in a stacked construction.

Abstract: A semiconductor device includes a semiconductor chip, leads for sending and receiving signals between the semiconductor chip and an external device, fine metal wires, an encapsulant for sealing the leads, and a lid member. On the surface of each of the leads, a metal oxide film is formed by an oxidation treatment. The metal oxide film has a thickness larger than a natural oxide film and no more than 80 nm.

Abstract: In one embodiment, a semiconductor package structure includes a plurality of upright clips having ends with mounting surfaces for vertically mounting the package to a next level of assembly. A semiconductor chip is interposed between the upright clips together with one or more spacers.

Abstract: The present invention provides inhibiting an electrical leakage caused by anion migration. A trenched portion 15 is provided as ion migration-preventing zone between a source electrode 4 and a gate electrode 5. The trenched portion 15 is formed so as to surround a periphery of the source electrode 4.

Abstract: A semiconductor device is provided which comprises a connecting lead 4 mounted between a MOS-FET 1 and a regulatory IC 2 on a support plate 3. Connecting lead 4 has a thermally radiative and electrically conductive substrate 6 and electrically insulative and thermal transfer-resistive covering 7. Substrate 6 has one end 6a providing one main surface 4a of connecting lead 4 which is mounted and electrically connected on the other main surface 1b of MOS-FET 1. Covering 7 provides the other main surface 4b of connecting lead 4 for supporting regulatory IC 2 at one end 6a of substrate 6.

Abstract: A power module includes a power semiconductor, a non-power semiconductor, one resin substrate and a cooling device. The power semiconductor and the non-power semiconductor configure a power supply circuit for performing power conversion. Both the power semiconductor and the non-power semiconductor are mounted on the resin substrate. The cooling device is disposed in order to cool the power semiconductor.

Abstract: A power semiconductor module of the present invention comprises: a heat sink 1; a circuit substrate 2 mounted on the heat sink 1; a conductive pattern 10 provided on the circuit substrate 2; a low dielectric constant film 11 covering the conductive pattern 10; a case 7 provided on the heat sink 1 so as to enclose the circuit substrate 2; and a soft insulator 9 filling the space within the case 7. The low dielectric constant film 11 is preferably formed of silicon rubber, polyimide, or epoxy resin.

Abstract: An arrangement for cooling a power semiconductor module, the power semiconductor module having a substrate with a ceramic plate and may have a metallization thereon, the arrangement has a container for the intake of a coolant with a heat-conducting plate; the heat-conducting plate having two sides, one side joined to the metallization of the substrate and the other side being in contact with the coolant; wherein the heat-conducting plate is made of materials having a metal matrix composite (MMC) material with a filling content, which results in a thermal expansion of below that of copper.

Abstract: The power semiconductor apparatus includes a resin package made up of a power semiconductor element and a control semiconductor element which are mounted on a main front surface of a lead frame and sealed with mold resin, a power terminal led out of the resin package and electrically connected to the power semiconductor element, a control terminal led out of the resin package and electrically connected to the control semiconductor element and a cylindrical case which is formed in a manner separable from the resin package and encloses the resin package, wherein the power terminal and the control terminal are led out of lead insertion slots formed in the case, and a part of the power terminal which is led out of the case is bent along an end face of the case.

Abstract: A semiconductor device is provided, which is capable of improving mounting flexibility relatively and increasing general versatility, as well as realizing heat radiation characteristics and low on-resistance. Moreover, the semiconductor device is provided, which is capable of improving reliability, performing processing in manufacturing processes easily and reducing manufacturing costs. Also, the semiconductor device capable of decreasing the mounting area is provided. A semiconductor chip in which an IGBT is formed and a semiconductor chip in which a diode is formed are mounted over a die pad. Then, the semiconductor chip and the semiconductor chip are connected by using a clip. The clip is arranged so as not to overlap with bonding pads formed at the semiconductor chip in a flat state. The bonding pads formed at the semiconductor chip are connected to electrodes by using wires.

Abstract: The present invention provides a technology for reducing the parasitic inductance of the main circuit of a power source unit. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETS, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.

Abstract: A semiconductor chip packaging structure comprising a dielectric film having one or more through holes aligned with the one or more contact pads of at least one power semiconductor chip. A patterned electrically conductive layer adjacent to the dielectric film has one or more electrically conductive posts which extend through the one or more though holes aligned with the contact pads to electrically couple the conductive layer to the contact pads. In certain embodiments, one or more air gaps may be formed between the dielectric film and the active surface of the at least one power semiconductor chip. Methods for fabricating the semiconductor chip packaging structure are also disclosed.

Abstract: Semiconductor-mounted device comprises wired board, first semiconductor chip mounted on first side of wired board, second semiconductor chip mounted on second side of wired board and sealing resin sealing, with a same height, a region disposed at and around first semiconductor chip and opposite, across wired board, to at least an area of projecting electrodes of second semiconductor chip; and a producing method thereof. Semiconductor-mounted device also comprises wired board, first semiconductor chip mounted on first side of wired board, second semiconductor chip mounted on second side of wired board and resin sheet covering, at substantially a same height as first semiconductor chip, a region disposed around first semiconductor chip and opposite, across wired board, to at least an area of projecting electrodes of second semiconductor chip, back surface of first semiconductor chip being exposed; and a producing method thereof.

Abstract: An insulating substrate includes a metal base as a base member, an insulating layer which is a room temperature, aerosol deposited shock solidification film formed on the metal base, and a circuit pattern which is a cold sprayed thermal spray coating formed on the insulating layer. A semiconductor device incorporates the insulating substrate, and thereby has improved heat radiation characteristics.

Abstract: In a semiconductor apparatus in which a main current of a semiconductor device flows through a wiring pattern formed on an insulation circuit board, the rise in temperature of the wiring pattern is suppressed and the increase in cost of parts can be minimized. On the insulation circuit board, a copper pattern is formed. A heat spreader is soldered to the copper pattern, and the heat spreader is loaded with a semiconductor chip. An external electrode and the heat spreader are arranged to shorten the distance between the side of the external electrode and the side of the heat spreader.

Abstract: A semiconductor package that includes two power semiconductor dies, such as power MOSFET dies, including vertical conduction MOSFETs, arranged in a half-bridge configuration is disclosed. The package may be mounted on a split conductive pad including two isolated die pads, each die pad being electrically connected to the second power electrode of the die that is on it. The split pad may include several conductive leads, including at least one output lead electrically connected to a first electrode of the first semiconductor die on the same side of the die as the control electrode and to the second electrode of the second die located on the opposite side of the second die from the control electrode.

Abstract: A semiconductor or electronic device, such as a power module uses at least one spring terminal as a control terminal. The spring terminal is led outside a case through a coil-accommodating member, which can be a frame or removable cover. With this arrangement, the spring terminal can be arranged at an arbitrary position inside the case. The spring terminal can be joined by soldering or bonding to the electrode of an in-case substrate while being held by the frame or cover. The in-case substrate can be accessed for solder joining through at least one aperture formed in the frame.

Abstract: A high reverse voltage diode includes a hetero junction made up from a silicon carbide base layer, which constitutes a first semiconductor base layer, and a polycrystalline silicon layer, which constitutes a second semiconductor layer, and whose band gap is different from that of the silicon carbide base layer. A low concentration N type polycrystalline silicon layer is deposited on a first main surface side of the silicon carbide base layer, and a metal electrode is formed on a second main surface side of the silicon carbide base layer which is opposite to the first main surface side thereof.

Abstract: A compression assembled semiconductor package for housing a power semiconductor die which includes two major pole pieces in intimate electrical contact with respective major electrodes of a power semiconductor die. The package includes a plastic molded insulation ring disposed around the power semiconductor die. The pole pieces are secured to respective ends of the plastic molded insulation ring. One of the pole pieces may include an annular flange that penetrates the plastic molded insulation ring from an interior wall thereof and is embedded in its body. The annular flange preferably comprises a projection having a squared tab and circular distal end that is received by a receiving groove having a notch (to receive the squared tab) and a cavity (to receive the distal end).

Abstract: A rectification chip terminal structure for soldering a rectification chip on a terminal filled with a packaging material to form a secured mounting for the rectification chip is to be inserted in a coupling bore of a circuit board. The structure includes a conductive element which has a buffer portion and a base seat to prevent bending and deformation under external forces, and has a stress buffer zone to prevent the chip from being damaged and moisture from entering. It can be installed easily in the coupling bore of the circuit board and hold the packaging material securely without breaking away.

Abstract: When a silicone gel is injected into a case, since the gel is liquid before curing, the gel attempts to rise along a minute gap formed between a front face of a first electrode and a rear face of a resin member due to capillary action. However, since the gap becomes larger at a cavity in the first electrode, the rising motion of the gel stops at the level of the cavity. More specifically, the gel is prevented from reaching portions of the first electrode and a second electrode for connection with external terminals. Further, since the rising motion of the gel can be prevented by the cavity, the first electrode and the second electrode can be arranged in a close relationship with each other.

Abstract: A semiconductor module includes a parts-mounting or packaging substrate, a plurality of power metal insulator semiconductor (MIS) chips which have top surfaces and back surfaces and are mounted by flip chip bonding on or above the package substrate while letting the top-surfaces face the package substrate, a drive-use integrated circuit (IC) chip which is mounted by flip chip bonding above the package substrate for driving the gates of metal insulator semiconductor field effect transistors (MISFETs) that are formed on the power MIS chips, a plurality of heat sinks disposed on or above the back surfaces of the power MXS chips, and a resin member for sealing the power MIS chips and the driver IC chip together in a single package.

Abstract: A semiconductor device of the present invention comprises a semiconductor chip, metal layers formed on a first main surface of the semiconductor chip, a first conductive layer layered on a second main surface of the semiconductor chip, consisting of a plurality of conductive films, a second conductive layer layered on the metal layer, having a layered structure consisting of a plurality of conductive films formed in the same order as in the first conductive layer as viewed from the semiconductor chip and a third conductive layer layered on the metal layer, having a layered structure consisting of a plurality of conductive films formed in the same order as in the first conductive layer as viewed from the semiconductor chip. The plurality of conductive films comprise a nickel film and a low contact resistance conductive film having contact resistance with the semiconductor chip which is lower than that of the nickel film.

Abstract: A fault detection system detecting malfunctions or deteriorations, which may result in an inverter fault, is provided. The system has a temperature sensor installed on a semiconductor module to monitor a temperature rise rate. It is judged that an abnormal condition has occurred if the thermal resistance is increased by the deterioration of a soldering layer of the semiconductor module or by drive circuit malfunctions and, as a result, the relation between an operation mode and the temperature rise rate falls outside a predetermined range.

Abstract: A power switching module is provided having at least one power switch placed above at least one other power switch, each power switch in turn including an upper wall and a lower wall, each of which is cooled through thermal conduction by a cooling medium that circulates in channels and voids that are provided along the walls for this purpose.

Abstract: A novel architecture of high-power four-quadrant hybrid power modules based on high-current trench gate IGBTs and arrays of low-current wide-bandgap diodes is conceived. The distributed physical layout of high power density wide-bandgap devices improves the cooling inside a fully-sealed module case, thus avoiding excessive internal heat flux build up and high PN junction temperature, and benefiting the converter's reliability and efficiency. The design of multiple-in-one hybrid integrated AC-switch module at high power ratings is enabled by using hybrid AC switch cells and aluminum nitride substrate structure.

Abstract: A method and apparatus for increasing the immunity of new generation microprocessors from electrostatic discharge events involve shielding the microprocessors at the die level. A gasket of a lossy material is provided on the substrate upon which the microprocessor is mounted. The gasket surrounds the microprocessor to protect it from electrostatic discharge pulses. A heat spreader is arranged in heat conducting relation with the microprocessor and atop at least a portion of the gasket adjacent the die. The material is a static dissipative material having a volume resistivity of greater than 102 ohm cm and a shielding effectiveness to protect the microprocessor from at least 4 kV of electrostatic discharge pulse at the computer system level in which the microprocessor is to be used.

Abstract: A rectification chip terminal structure for soldering a rectification chip encased in a glass passivated pallet (GPP) on a terminal filled with a packaging material to form a secured mounting for the rectification chip is to be inserted in a coupling bore of a circuit board. The structure includes a conductive element which has a buffer portion and a base seat to prevent the GPP from fracturing when the packaging material is heated and expanded or prevent the conductive element from bending and deforming under external forces, and has a stress buffer zone to prevent the chip from being damaged and moisture from entering. It can prevent the GPP from fracturing when the packaging material is heated and expanded and be installed easily in the coupling bore of the circuit board and hold the packaging material securely without breaking away.

Abstract: This power switching cell comprises: at least two power components (4–6) forming a chain (2) of components electrically linked in series by way of at least one intermediate bond (52, 70), and a dielectric substrate inside which are incorporated said at least two components (4–6). Each intermediate bond (52, 70) as well as the faces of the components linked to this intermediate bond are entirely incorporated inside said substrate, and the faces not linked to an intermediate bond (52, 70) of the components situated at the ends of said chain (2) are disposed in such a way as to be separated from one another by way of the dielectric material forming said substrate (22). This substrate is formed of a stack of parallel sheets (24–27) of dielectric material, and each of the components (4–6) following in said chain is incorporated in the thickness of a different sheet.

Abstract: A semiconductor integrated circuit device has a semiconductor integrated circuit chip, a package enclosing the chip, and a plurality of conductors connecting the bonding pads of the chip to the leads of the package. The chip has an internal circuit, a plurality of bonding pads having signal paths formed between themselves and the internal circuit, and a switching circuit provided in a predetermined signal path so as to perform a switching operation to allow the internal circuit to be connected selectively to one of different bonding pads. The switching circuit is fed with an external signal to perform its switching operation in such a way as to prevent the signals passing through mutually adjacent conductors from affecting each other.

Abstract: A family of emitter controlled thyristors employ plurality of control schemes for turning the thyristor an and off. In a first embodiment of the present invention a family of thyristors are disclosed all of which comprise a pair of MOS transistors, the first of which is connected in series with the thyristor and a second which provides a negative feedback to the thyristor gate. A negative voltage applied to the gate of the first MOS transistor causes the thyristor to turn on to conduct high currents. A zero to positive voltage applied to the first MOS gate causes the thyristor to turn off. The negative feedback insures that the thyristor only operates at its breakover boundaries of the latching condition with the NPN transistor portion of the thyristor operating in the active region. Under this condition, the anode voltage VA continues to increase without significant anode current increase.

Abstract: A power semiconductor module has a circuit assembly body, which includes a metal base, a ceramic substrate, and a power semiconductor chip, and is combined with a package having terminals formed integrally. The ceramic substrate of the module has a structure such that an upper circuit plate and a lower plate are joined to both sides of a ceramic plate, respectively, and the metal base and the ceramic substrate are fixed to one another using solder, thereby improving reliability and lengthening a life of a power semiconductor module by optimizing a ceramic substrate and a metal base thereof, the dimensions thereof, and material and method used for a join formed between the ceramic substrate and metal base.

Abstract: The power semiconductor includes a module housing having a conductive cover plate and a conductive baseplate and also an insulating housing wall arranged between the cover plate and the baseplate. A power semiconductor circuit is accommodated in the module housing. Two terminals of the power semiconductor circuit are led out of the module housing, a first of the at least two terminals being provided for the contact connection of the cover plate. The two terminals are arranged on opposite areas of a printed circuit board led out of the module housing, which printed circuit board can be contact-connected by means of a standard connector. The power semiconductor module according to the invention has improved contacts with regard to stability and inductance.

Abstract: A method and apparatus are disclosed for reducing crosstalk and dispersion in a crosspoint monolithic microwave integrated circuit (MMIC) switch array operating in a range between DC and microwave frequencies. In accordance with an exemplary embodiment, the crosspoint MMIC switch array includes a dielectric stack, a substrate, a first ground plane, a plurality of thyristor switches, a plurality of signal transmission lines arranged in rows; and a plurality of signal transmission lines arranged in columns. The plurality of signal transmission lines arranged in columns intersect the plurality of signal transmission lines arranged in rows at a plurality of intersection points. Each of the plurality of thyristor switches is associated with one of the plurality of intersection points. Each of the plurality of thyristor switches is in electrical contact with the signal transmission lines that intersect at the associated intersection point.

Abstract: A novel architecture of high-power four-quadrant hybrid power modules based on high-current trench gate IGBTs and arrays of low-current wide-bandgap diodes is conceived. The distributed physical layout of high power density wide-bandgap devices improves the cooling inside a fully-sealed module case, thus avoiding excessive internal heat flux build up and high PN junction temperature, and benefiting the converter's reliability and efficiency. The design of multiple-in-one hybrid integrated AC-switch module at high power ratings is enabled by using hybrid AC switch cells and aluminum nitride substrate structure.

Abstract: This is a semiconductor power module provided with: a ceramic substrate; a metallic plate bonded to a surface of this substrate; a cylindrical metallic flange which is hermetically bonded to a surface of substrate or the metallic plate; a ceramic housing for hermetically sealing an opening of the metallic flange; and at least one or more semiconductor chips soldered to the metallic plate. The metallic flange is made of metal with a low thermal expansion coefficient. A hermetically sealed container is created by welding the metallic flange, the ceramic substrate and the housing with silver brazing. Moreover, external collector, emitter and gate electrodes are bonded on the housing by using the silver brazing. The collector, emitter and gate conductive pillars are respectively connected to the external collector, emitter and gate electrodes with calking. Thus, this hermetically sealed container is strong in mechanical strength and high in explosion-proof durability and excellent in moisture resistance.

Abstract: A semiconductor substrate with integrated circuit devices on its front side and a high thermal conductivity layer such as diamond on its back side, with components such as capacitors embedded in the high thermal conductivity layer and coupled to the front side integrated circuits with vias through the substrate.

Abstract: A semiconductor thyristor device incorporates buried regions to achieve low breakover voltage devices, and the buried regions are offset laterally with respect to the emitter regions. The low voltage thyristor devices can be incorporated into five-pin protection modules for protecting customer circuits.

Abstract: A power semiconductor module has a circuit assembly body, which includes a metal base, a ceramic substrate, and a power semiconductor chip, and is combined with a package having terminals formed integrally. The ceramic substrate of the module has a structure such that an upper circuit plate and a lower plate are joined to both sides of a ceramic plate, respectively, and the metal base and the ceramic substrate are fixed to one another using solder, thereby improving reliability and lengthening a life of a power semiconductor module by optimizing a ceramic substrate and a metal base thereof, the dimensions thereof, and material and method used for a join formed between the ceramic substrate and metal base.

Abstract: A semiconductor device having a supporting member that reduces a resonance phenomenon. A pair of reinforcing members is fixed on a gate drive substrate with spacers interposed there between and upright portions of the pair of reinforcing members are fastened with screws on a side wall of a cathode flange. A spacer is fixed on the gate drive substrate and a projection of the spacer is inserted in an engaging member fixed on the bottom of the cathode fin electrode and thus fixed on the bottom of the cathode fin electrode. The pair of upright portions as the first and second supporting points and the projection of the spacer as the third supporting point stably support the gate drive substrate on the cathode fin electrode without freedom of rotation at the three positions arranged to surround an opening.

Abstract: The present invention relates to power semiconductor devices and particularly to a power semiconductor device which contains a plurality of power semiconductor elements, and an object of the invention is to provide a power semiconductor device which is capable of reducing differences in impedance caused by differences in length among wire interconnections, facilitating the electric connection between the main circuit terminals and the outside, and lightening restrictions on the number and layout of the power semiconductor elements installed.

Abstract: An insulating element insulates a contact area of an electronic component from other contact areas of the component. In order to ensure an assembly that is as trouble-free as possible as well as a trouble-free operation, the insulation element has at least on a first section, which is accommodated inside a contact recess of a contact during operation, is provided with an outer contour that enables an accommodation with the utmost smallest amount of play inside the contact recess.

Abstract: After a trench 54 is formed in a conductive foil 60, the circuit elements are mounted, and the insulating resin is applied on the conductive foil 60 as the support substrate. After being inverted, the conductive foil 60 is polished on the insulating resin 50 as the support substrate for separation into the conductive paths. Accordingly, it is possible to fabricate the circuit device in which the conductive paths 51 and the circuit elements 52 are supported by the insulating resin 50, without the use of the support substrate. And the interconnects L1 to L3 requisite for the circuit are formed, and can be prevented from slipping because of the curved structure 59 and a visor 58.

Abstract: A compression assembled semiconductor package for housing a power semiconductor die which includes two major pole pieces in intimate electrical contact with respective major electrodes of a power semiconductor die. The package includes a plastic molded insulation ring disposed around the power semiconductor die. The pole pieces are secured to respective ends of the plastic molded insulation ring. One of the pole pieces may include an annular flange that penetrates the plastic molded insulation ring from an interior wall thereof and is embedded in its body. An annular flange may also be embedded in the plastic molded insulation ring and connected to an annular rib of a pole piece by a circular connector.

Abstract: A power device having a multi-chip package structure and a manufacturing method therefor are provided. In the power device, a transistor, which is a switching device, and a control integrated circuit (IC) chip, which is a driving device, are mounted together in a package, thereby requiring a high insulation withstand voltage between the transistor chip and the control IC chip. The power device and the manufacturing method can simplify a packaging process by attaching the control IC chip on a chip pad of a lead frame using an insulating adhesive tape at a level with the transistor chip. Furthermore, the overall size of a package in the power device can be reduced by attaching the control IC chip on top of the transistor chip using the insulating adhesive tape. In the case of attaching the control IC chip on the top of the transistor chip, a liquid non-conductive adhesive can be used instead of an insulating adhesive tape.

Abstract: A turn-off high power semiconductor device with the inner pnpn-layer structure of a Gate-Commutated Thyristor and a first gate on the cathode side has an additional second gate on the anode side, said second gate contacting the n-doped base layer and having a second gate contact. A second gate lead which is of rotationally symmetrical design and is disposed concentrically with respect to the anode contact is in contact with said second gate contact. Said second gate lead is brought out of the component and electrically insulated from the anode contact.

Abstract: An electrode wiring structure is disclosed which realizes a semiconductor apparatus as a power semiconductor module with the current path set as shortest as possible and uniformly. The semiconductor apparatus includes: a plurality of semiconductor devices mounted in one array or more on a substrate; a main current electrode mounted along the array(s) of the semiconductor devices, and commonly connected to each of the plurality of semiconductor devices through the substrate. The substrate is connected to the main current electrode through a plurality of wires arranged along the array(s) at equal or substantially equal distances.