Light Responsive Structure Patents (Class 257/184)
  • Patent number: 9590022
    Abstract: An organic electroluminescence (EL) device is provided, including a transparent substrate and an array of pixels over the transparent substrate. Each of the pixels includes at least one first sub-pixel and at least one second sub-pixel, wherein the at least one first sub-pixel each includes a first organic light emitting diode for providing light in a first direction, and the second sub-pixel each includes a second organic light emitting diode for providing light in a second direction substantially opposite to the first direction.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: March 7, 2017
    Assignee: AU OPTRONICS CORPORATION
    Inventor: Shuo-Hsiu Hu
  • Patent number: 9583644
    Abstract: A semiconductor optical device has a substrate including a primary surface with first to fourth areas; a first conductivity-type semiconductor layer disposed on the third and fourth areas; a first semiconductor laminate disposed on the first conductivity-type semiconductor layer and the third area; a resin body disposed on the second to fourth areas; a first electrode connected with the first semiconductor laminate through a first opening of the resin body in the third area; a first pad electrode disposed on the first area; and a wiring conductor extending on a first side and a top of the resin body in the second and third areas and on the first area to connect the first electrode to the first pad electrode. The first side of the resin body is disposed in the second area. The first semiconductor laminate includes a second conductivity-type semiconductor region being in contact with the first electrode.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: February 28, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Hideki Yagi
  • Patent number: 9577121
    Abstract: The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is formed directly atop the absorption layer, a plurality of cathode electrodes electrically coupled to the buffered layer or directly to the cap layer, and at least one anode electrode electrically coupled to a p-type region in the cap layer. The position sensing detector has a photo-response non-uniformity of less than 2% and a position detection error of less than 10 ?m across the active area.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: February 21, 2017
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 9575257
    Abstract: An optical device comprises optical fibers and a holder. The holder includes one end portion, an other end portion, and a supporting portion extending in a direction of a first axis from the one end portion to the other end portion. The one end portion includes a first end face extending along a first reference plane intersecting with the first axis from a side of the holder to cladding regions of the optical fibers; a second end face extending along a second reference plane from the one end portion to the other end portion; and a third end face extending along a third reference plane inclined at an angle of less than 90 degrees and more than zero degrees relative to the first axis. The cladding regions of the optical fibers are disposed at the second end face. The optical fibers have respective tips disposed at the third end face.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: February 21, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Akira Furuya, Yasunori Murakami, Koichi Koyama
  • Patent number: 9553222
    Abstract: A Ge-on-Si photodetector constructed without doping or contacting Germanium by metal is described. Despite the simplified fabrication process, the device has responsivity of 1.24 A/W, corresponding to 99.2% quantum efficiency. Dark current is 40 nA at ?4 V reverse bias. 3-dB bandwidth is 30 GHz.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: January 24, 2017
    Assignee: Elenion Technologies, LLC
    Inventors: Thomas Wetteland Baehr-Jones, Yi Zhang, Michael J. Hochberg, Ari Novack
  • Patent number: 9548414
    Abstract: Optical devices based on bismuth-containing III-V compound semiconductor materials are disclosed. The optical device includes an optically active pseudomorphic superlattice formed on a substrate. The superlattice includes alternating InAsSby layers (where y is greater than or equal to zero) and InAsBi layers.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: January 17, 2017
    Assignee: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
    Inventors: Preston T. Webster, Ankur R. Sharma, Chaturvedi Gogineni, Shane R. Johnson, Nathaniel A. Riordan
  • Patent number: 9523871
    Abstract: A semiconductor optical modulator includes a substrate having a principal surface; a waveguide disposed on the principal surface of the substrate, the waveguide extending in a first direction; a first electrode disposed on the waveguide, the first electrode being in contact with an upper surface of the waveguide; a first wiring connected to the first electrode, the first wiring extending in a second direction intersecting the first direction; a build-up portion connected to the first wiring; a second wiring connected to the build-up portion, the second wiring extending in a plane parallel to the principal surface of the substrate; and a resin layer disposed on the substrate, the resin layer embedding the first wiring and the build-up portion. The build-up portion extends along a third direction, the third direction intersecting perpendicularly to the principal surface of the substrate. The second wiring is disposed on the resin layer.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: December 20, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamitsu Kitamura, Hideki Yagi, Daisuke Kimura, Hirohiko Kobayashi, Masataka Watanabe
  • Patent number: 9478689
    Abstract: A high-speed germanium on silicon (Ge/Si) avalanche photodiode may include a substrate layer, a bottom contact layer disposed on the substrate layer, a buffer layer disposed on the bottom contact layer, an electric field control layer disposed on the buffer layer, an avalanche layer disposed on the electric field control layer, a charge layer disposed on the avalanche layer, an absorption layer disposed on the charge layer, and a top contact layer disposed on the absorption layer. The electric field contact layer may be configured to control an electric field in the avalanche layer.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: October 25, 2016
    Assignee: SIFOTONICS TECHNOLOGIES CO., LTD.
    Inventors: Mengyuan Huang, Pengfei Cai, Liangbo Wang, Su Li, Wang Chen, Ching-yin Hong, Dong Pan
  • Patent number: 9472705
    Abstract: An integrated avalanche photodetector and a method for fabrication thereof. The integrated avalanche photodetector comprises a Ge body adapted to conduct an optical mode. The Ge body comprises a first p-doped region that extends from a first main surface to a second main surface of the Ge body. The Ge body further comprises a first n-doped region that extends from the first main surface towards the second main surface of the Ge body. An intrinsic region occupies the undoped part of the Ge body. A first avalanche junction is formed by the first n-doped region that is located aside the p-doped region. The Ge body further comprises an incidence surface, suitable for receiving an optical mode, and a second n-doped Ge region that covers the Ge body and forms a second avalanche junction with the first p-doped region at the first main surface.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: October 18, 2016
    Assignees: IMEC VZW, Universiteit Gent
    Inventors: Hongtao Chen, Joris Van Campenhout, Gunther Roelkens
  • Patent number: 9472697
    Abstract: Methods and structures for providing single-color or multi-color photo-detectors leveraging plasmon resonance for performance benefits. In one example, a radiation detector includes a semiconductor absorber layer having a first electrical conductivity type and an energy bandgap responsive to radiation in a first spectral region, a semiconductor collector layer coupled to the absorber layer and having a second electrical conductivity type, and a plasmonic resonator coupled to the collector layer and having a periodic structure including a plurality of features arranged in a regularly repeating pattern.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: October 18, 2016
    Assignee: RAYTHEON COMPANY
    Inventors: Justin Gordon Adams Wehner, Edward Peter Gordon Smith
  • Patent number: 9466637
    Abstract: A low noise infrared photodetector has an epitaxial heterostructure that includes a photodiode and a transistor. The photodiode includes a high sensitivity narrow bandgap photodetector layer of first conductivity type, and a collection well of second conductivity type in contact with the photodetector layer. The transistor includes the collection well, a transfer well of second conductivity type that is spaced from the collection well and the photodetector layer, and a region of first conductivity type between the collection and transfer wells. The collection well and the transfer well are of different depths, and are formed by a single diffusion.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: October 11, 2016
    Assignee: Sensors Unlimited, Inc.
    Inventors: Peter Dixon, Navneet Masaun
  • Patent number: 9462203
    Abstract: An image sensor and an image processing system. The image sensor comprises: a CMOS photosensitive array used for converting an optical signal into an electrical signal; a control signal conversion circuit used for converting into a second control signal a first control signal for driving a CCD photosensitive array to operate, the first control signal at least comprising a vertical transfer signal, a horizontal transfer signal, an electronic shutter signal and a read-out clock signal, and the second control signal at least comprising a column address signal, a row reset control signal and a row read-out control signal; a row selection circuit used for generating a row reset signal according to the row reset control signal and generating a row read-out signal according to the row read-out control signal; and a column selection circuit used for conducting column gating on the CMOS photosensitive array under the control of the column address signal and outputting a column read-out signal.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: October 4, 2016
    Assignee: BRIGATES MICROELECTRONICS (KUNSHAN) CO., LTD.
    Inventors: Wenzhe Luo, Xiujie Hao, Dexing Dong
  • Patent number: 9444552
    Abstract: An optical receiver module includes: a circuit board; a plurality of photo detectors mounted on a first surface of the circuit board; a plurality of amplifiers mounted on the first surface; a plurality of anode wiring patterns that are respectively formed between anode terminals of the photo detectors and the amplifiers on the first surface; a plurality of cathode wiring patterns that are respectively formed between cathode terminals of the plurality of photo detectors and the plurality of amplifiers on the first surface; and an electrode formed on a second surface of the circuit board or in an inner layer of the circuit board so as to include a region in which the plurality of cathode wiring patterns are formed. The plurality of cathode wiring patterns are respectively electrically connected to the electrode.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: September 13, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Takatoshi Yagisawa
  • Patent number: 9431572
    Abstract: A method for providing and operating a device in a first mode as a light-emitting transistor and in a second mode as a high speed electrical transistor, including the following steps: providing a semiconductor base region of a first conductivity type between semiconductor emitter and collector regions of a second semiconductor type; providing, in the base region, a quantum size region; providing, in the base region between the quantum size region and the collector region, a carrier transition region; applying a controllable bias voltage with respect to the base and collector regions to control depletion of carriers in at least the carrier transition region; and applying signals with respect to the emitter, base, and collector regions to operate the device as either a light-emitting transistor or a high speed electrical transistor, depending on the controlled bias signal.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: August 30, 2016
    Assignee: Quantum Electro Opto Systems Sdn. Bhd.
    Inventor: Gabriel Walter
  • Patent number: 9406819
    Abstract: A photovoltaic component that includes at least one first array of photovoltaic nano-cells is disclosed. Each photovoltaic component includes an optical nano-antenna exhibiting an electromagnetic resonance in a first resonant spectral band, at least one lateral dimension of the optical nano-antenna being subwavelength in size, and a spectral conversion layer allowing at least part of the solar spectrum to be converted to said first resonant spectral band.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: August 2, 2016
    Assignees: Centre National de la Recherche Scientifique—CNRS, ELECTRICITÉ DE FRANCE—EDF, UNIVERSITE PIERRE ET MARIE CURIE—PARIS 6
    Inventors: Jean-Luc Pelouard, Jean-François Guillemoles, Florian Proise, Myriam Paire, Daniel Lincot
  • Patent number: 9397309
    Abstract: An OLED having an organic layer formed of a dopant and a host, where the organic layer is disposed between an anode and a cathode is disclosed. The dopant's concentration level in the organic layer, along a direction perpendicular to the first and second planar surfaces of the organic layer, defines a novel concentration gradient that enhances the OLED's efficiency.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: July 19, 2016
    Assignee: Universal Display Corporation
    Inventors: Mauro Premutico, Chuanjun Xia, Chun Lin
  • Patent number: 9391113
    Abstract: Embodiments of an image-sensor device structure and a method of manufacturing thereof are provided. The image-sensor device structure includes a semiconductor substrate and a light-sensing region in the semiconductor substrate. The image-sensor device structure also includes an interconnect structure over the semiconductor substrate, and the interconnect structure includes a transparent dielectric layer over the light-sensing region. The transparent dielectric layer has an optical transmittance ranging from about 90% to about 97%.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: July 12, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Ming Chiu, Chun-Yan Chen, Chyi-Tsong Ni, Ruei-Hung Jang
  • Patent number: 9379170
    Abstract: An organic light emitting diode (OLED) display device can include a gate line including a gate electrode; an active layer over the gate line with a gate insulating layer interposed therebetween and including an amorphous zinc oxide semiconductor; a first protective layer over color filters on an insulating layer over first source and drain electrodes; second source and drain electrodes on the first protective layer and connected to the first source and drain electrodes; a second protective layer having a third contact hole; a pixel electrode on the second protective layer and connected to the second drain electrode through the third contact hole; a partition partitioning the pixel region; and an organic light emitting layer over the partition. Also, the gate electrode is located to cover a lower portion of the active layer and the second source electrode is extended to cover the channel region of the active layer.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: June 28, 2016
    Assignee: LG Display Co., Ltd.
    Inventors: KiSul Cho, JinChae Jeon
  • Patent number: 9373733
    Abstract: A semiconductor light-receiving device includes a substrate having a principal surface including first and second areas; a post disposed on the first area, the post including a semiconductor mesa; and a resin layer disposed on the second area in contact with a side surface of the post. The resin layer has, on a ray extending from a first point within the first area through a second point within the second area, a first thickness and a second thickness respectively at a third point and a fourth point that are located within the second area at different distances from the first point. The distance from the first point to the fourth point is larger than the distance from the first point to the third point. The first thickness is larger than the second thickness. The resin layer has a surface that monotonically changes from the first thickness to the second thickness.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: June 21, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Yasuhiro Iguchi
  • Patent number: 9356169
    Abstract: Some demonstrative embodiments include devices and/or methods of Back Side Illumination (BSI) Complementary Metal-Oxide-Semiconductor (CMOS) pixel array. For example, a BSI CMOS pixel array may include a plurality of pixels, a pixel of the plurality of pixels may include one or more Metal-Oxide-Semiconductor (MOS) transistors comprising one or more well regions, a well region of the one or more well regions comprising an N-Well (NW) region or a P-well (PW) region; a photodiode; an epitaxial (epi) layer comprising an absorption area and a collection area, the absorption area to absorb incoming photons and to generate electrons responsive to absorbed photons, and the collection area connecting the absorption area to the photodiode to provide the electrons from the absorption area to the photodiode; and a barrier layer separating the absorption area from the one or more well regions.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: May 31, 2016
    Assignee: Tower Semiconductor Ltd.
    Inventors: Assaf Lahav, Amos Fenigstein
  • Patent number: 9312462
    Abstract: A lead 1 includes a die-bonding portion 11 with an opening 11a penetrating in a thickness direction. Another lead 2 is spaced from the lead 1. An LED unit 3 includes an LED chip 30 with a electrode terminal 31 connected to the lead 1 and another electrode terminal 32 connected to the lead 2. The LED unit 3, mounted on a surface of the die-bonding portion 11 on a first side in z direction, overlaps the opening 11a. A wire 52 connects the lead 2 and the electrode terminal 32. A support member 4 supporting the leads 1-2 is held in contact with another surface of the die-bonding portion 11 on a second side in z direction. These arrangements ensure efficient heat dissipation from the LED chip 30 and efficient use of light emitted from the LED chip 3.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: April 12, 2016
    Assignee: ROHM CO., LTD.
    Inventor: Masahiko Kobayakawa
  • Patent number: 9306191
    Abstract: An organic light-emitting display apparatus includes: a substrate; a plurality of thin film transistors on the substrate, each of the thin film transistors including an active layer, a gate electrode, and source and drain electrodes; first electrodes electrically connected to the plurality of thin film transistors, respectively, and being on respective pixels corresponding to the plurality of thin film transistors; organic layers on the first electrodes, respectively, and including light-emitting layers; auxiliary electrodes each of which is on at least a portion between adjacent organic layers of the organic layers; and a second electrode facing the first electrodes and covering the organic layers and the auxiliary electrodes.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 5, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventor: Won-Kyu Choe
  • Patent number: 9281434
    Abstract: A method of forming infra red detector arrays is described, starting with the manufacture of a wafer. The wafer is formed from a GaAs or GaAs/Si substrate having CMT deposited thereon by MOVPE. The CMT deposited can include a number of layers of differing composition, the composition being controlled during the MOVPE process and being dependent on the thickness of the layer deposited. A CdTe buffer layer can aid deposition of the CMT on the substrate. Once the wafer is formed, the buffer layer, an etch stop layer and any intervening layers can be etched away leaving a wafer suitable for further processing into an infra red detector.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: March 8, 2016
    Assignee: SELEX ES LTD
    Inventors: Christopher Jones, Sudesh Bains
  • Patent number: 9281441
    Abstract: A device comprising a semiconductor layer including a plurality of compositional inhomogeneous regions is provided. The difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer can be at least thermal energy. Additionally, a characteristic size of the plurality of compositional inhomogeneous regions can be smaller than an inverse of a dislocation density for the semiconductor layer.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: March 8, 2016
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Jinwei Yang, Remigijus Gaska
  • Patent number: 9269846
    Abstract: Disclosed herein is a phototransistor (PT) comprising an emitter, a collector, a floating base, wherein the PT is configured to detect a photon flux incident on the PT and the photon flux being lower than one single photon within f, or wherein the PT is configured to detect a photon flux incident on the PT and the photon flux being below a photon shot noise of the photon flux within f, or wherein the PT is configured to detect a photon flux incident on the PT and the photon flux is 1/?{square root over (?)} of a photon shot noise of the photon flux within f, or wherein the PT is capable of detecting a photon flux incident on the PT and the photon flux being below 2f, or wherein the PT is capable of detecting a photon flux incident on the PT and the photon flux being 2f/?, wherein f is an electrical bandwidth of the PT and ? is a current amplification gain of the PT.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: February 23, 2016
    Assignee: WAVEFRONT HOLDINGS, LLC
    Inventor: Jie Yao
  • Patent number: 9231361
    Abstract: A monolithically integrated thermal tunable laser comprising a layered substrate comprising an upper surface and a lower surface, and a thermal tuning assembly comprising a heating element positioned on the upper surface, a waveguide layer positioned between the upper surface and the lower surface, and a thermal insulation layer positioned between the waveguide layer and the lower surface, wherein the thermal insulation layer is at least partially etched out of an Indium Phosphide (InP) sacrificial layer, and wherein the thermal insulation layer is positioned between Indium Gallium Arsenide (InGaAs) etch stop layers.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: January 5, 2016
    Assignee: Futurewei Technologies, Inc.
    Inventors: Hongmin Chen, Xuejin Yan, Rongsheng Miao, Xiao Shen, Zongrong Liu
  • Patent number: 9224768
    Abstract: A semiconductor structure having: a silicon structure; and a plurality of laterally spaced PiN diodes formed in the silicon structure; and a surface of the silicon structure configured to reduce reverse bias leakage current through the PiN diodes. In one embodiment, a gate electrode structures is disposed on a surface of the silicon structure, the gate electrode structure having portions disposed between adjacent pairs of the diodes, the gate structure being biased to prevent leakage current through the diodes.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: December 29, 2015
    Assignee: Raytheon Company
    Inventors: John J. Drab, Justin Gordon Adams Wehner, Christian M. Boemler
  • Patent number: 9209322
    Abstract: A polymer substrate and back contact structure for a photovoltaic element, and a photovoltaic element include a CIGS photovoltaic structure, a polymer substrate having a device side at which the photovoltaic element can be located and a back side opposite the device side. A layer of dielectric is formed at the back side of the polymer substrate. A metal structure is formed at the device side of the polymer substrate.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: December 8, 2015
    Assignee: ASCENT SOLAR TECHNOLOGIES, INC.
    Inventors: Lawrence M. Woods, Hobart Stevens, Joseph H. Armstrong
  • Patent number: 9175004
    Abstract: The present invention provides the catalyst precursor that has excellent safety and stability, has high stable activity retention rate, can be recycled, increases yield resulted from a reaction, and is easily processed into various forms. The catalyst precursor comprises a structure in which the entire structure is composed of gold or a gold-based alloy and the surface of the structure is modified with elemental sulfur, or at least the surface of the structure is composed of gold or a gold-based alloy and the surface of the structure is modified with elemental sulfur, and a catalytic metal compound supported on the structure, wherein the catalyst precursor has peaks derived from the catalytic metal compound and also sulfur as analyzed by photoelectron spectroscopy, and wherein the peak derived from sulfur is of the sulfur 1s orbital observed within a range of 2470 eV±2 eV in terms of the peak top position.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: November 3, 2015
    Assignees: NATIONAL UNIVERSITY CORPORATION HOKKAIDO UNIVERSITY, FURUYA METAL CO., LTD.
    Inventors: Mitsuhiro Arisawa, Satoshi Shuto, Naoyuki Hoshiya
  • Patent number: 9171997
    Abstract: A semiconductor light emitting device is provided including a first conductivity-type semiconductor layer, an active layer including at least one quantum barrier layer made of InxGa(1-x)N, wherein 0?x<y, and at least one quantum well layer made of InyGa(1-y)N, wherein 0<y?1, disposed therein, and a second conductivity-type semiconductor layer, wherein the quantum barrier layer includes first and second graded layers disposed in order toward the first conductivity-type semiconductor layer. The first graded layer contains indium whose content increases in a direction towards the second conductivity-type semiconductor layer, and the second graded layer contains indium whose content decreased in a direction toward the second conductivity-type semiconductor layer.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: October 27, 2015
    Assignees: SAMSUNG ELECTRONICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Eun Deok Sim, Sang Jo Kim, Sung Tae Kim, Young Sun Kim, Seong Ju Park, Suk Ho Yoon, Sang Jun Lee
  • Patent number: 9164972
    Abstract: A panorama display application shows objects from a spreadsheet such as charts in primary screen of a mobile device adjoined by left and right virtual screens. The application overlays interaction controls such as sort and filter functions on the object. The application also provides additional interaction controls for the object on the left virtual screen and associated objects links on the right virtual screen. The application may expose the additional interaction controls and the associated objects links by overlaying portions of the virtual screens on the primary screen. The application fluidly shifts content from virtual screens to the primary screen subsequent to detected user action on the overlaid portions.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: October 20, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Amy Lin, Melissa MacBeth, Daniel Battagin
  • Patent number: 9142689
    Abstract: A solid-state imaging apparatus in which a first substrate, a second substrate electrically connected to the first substrate through a connector and circuit elements disposed in the first substrate and in the second substrate, and forming pixels, each of the pixels includes a photoelectric conversion element disposed in the first substrate and configured to generate a signal corresponding to an amount of incident light, and a signal holder disposed in the second substrate in correspondence with the photoelectric conversion element and configured to hold an output signal corresponding to the signal generated by the corresponding photoelectric conversion element, and the signal holder is formed by laminating a capacitance element including a plurality of electrodes on a plurality of layers within the second substrate.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: September 22, 2015
    Assignee: OLYMPUS CORPORATION
    Inventor: Toru Kondo
  • Patent number: 9136402
    Abstract: A flexible solar cell comprises an epitaxially grown III-V layer having a first layer grown on a base substrate, at least one intermediate layer grown on the first layer, and a cap layer grown on the at least one intermediate layer, the III-V layer being separated from the base substrate by controllably spalling the first layer from the base substrate; and a flexible substrate coupled to the epitaxially grown III-V layer. The flexible solar cell may be used to provide power to an electronic device.
    Type: Grant
    Filed: October 22, 2012
    Date of Patent: September 15, 2015
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 9136418
    Abstract: Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: September 15, 2015
    Assignee: ALTA DEVICES, INC.
    Inventors: Hui Nie, Brendan M. Kayes, Isik C. Kizilyalli
  • Patent number: 9093591
    Abstract: Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: July 28, 2015
    Assignee: ALTA DEVICES, INC.
    Inventors: Hui Nie, Brendan M. Kayes, Isik C. Kizilyalli
  • Patent number: 9064992
    Abstract: A dual-band infrared detector structure based on Type-II superlattices (T2SL) has been developed and experimentally validated. The structure according to the principles of the present invention is designed for a single Indium bump architecture and utilizes a T2SL barrier design that omits the traditional p-n junction region. The barrier design comprises multiple periods where each period comprises multiple monolayers doped P type. By selecting the composition, number of monolayers per period and number of periods, a transition region is created in the conduction band between a first absorber layer and a second absorber layer that allows operation at low biases (<100 mV for both bands) and exhibits a dark current density in the longer wavelength band comparable to that obtained with single-color detectors.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: June 23, 2015
    Assignee: HRL Laboratories, LLC
    Inventors: Brett Z Nosho, Rajesh D Rajavel, Hasan Sharifi, Sevag Terterian
  • Publication number: 20150115132
    Abstract: A detector for detecting visible and NIR electromagnetic radiation is disclosed. The aforesaid detector comprises: (a) a substrate made of conventional temperature grown semi-insulating gallium arsenide (GaAs); (b) an active layer; and (c) means for applying electric fields to the active layer. The active layer is made of low temperature grown semi-insulating GaAs or made of ion implanted conventional temperature grown semi insulating GaAs. Also disclosed an imager based on monolithically integrated array of detectors and read-out integrated circuit (ROIC).
    Type: Application
    Filed: June 5, 2013
    Publication date: April 30, 2015
    Inventor: ISRAEL HIRSCH
  • Publication number: 20150115318
    Abstract: An ultraviolet (UV) photo-detecting device, including: a first nitride layer; a secondary light absorption layer disposed on the first nitride layer; a primary light absorption layer disposed on the secondary light absorption layer; and a Schottky junction layer disposed on the primary light absorption layer. The secondary light absorption layer includes a nitride layer having lower band-gap energy than the primary light absorption layer.
    Type: Application
    Filed: December 29, 2014
    Publication date: April 30, 2015
    Inventors: Ki Yon PARK, Hwa Mok KIM, Kyu Ho LEE, Sung Hyun LEE, Hyung Kyu KIM
  • Patent number: 9018675
    Abstract: A heterojunction III-V photovoltaic (PV) cell includes a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: April 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Norma Sosa Cortes, Keith E. Fogel, Devendra Sadana, Ghavam Shahidi, Davood Shahrjerdi
  • Publication number: 20150097211
    Abstract: A composite photonic device comprises a platform, a chip, and a contact layer. The platform comprises silicon. The chip is made of a III-V material. The contact layer has indentations to help control a flow of solder during bonding of the platform with the chip. In some embodiments, pedestals are placed under an optical path to prevent solder from flowing between the chip and the platform at the optical path.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 9, 2015
    Applicant: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse, Amit Mizrahi, Timothy Creazzo, Elton Marchena, John Y. Spann
  • Publication number: 20150097210
    Abstract: A method for fabricating a composite device comprises providing a platform, providing a chip, and bonding the chip to the platform. The platform has a base layer and a device layer above the base layer. An opening in the device layer exposes a portion of the base layer. The chip is bonded to the portion of the base layer exposed by the opening in the device layer. A portion of the chip extends above the platform and is removed.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 9, 2015
    Applicant: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse, Amit Mizrahi, Timothy Creazzo, Elton Marchena, John Y. Spann
  • Patent number: 9000415
    Abstract: The disclosed light emitting device includes an intermediate layer interposed between the light emitting semiconductor structure and the substrate. The light emitting semiconductor structure includes a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer, wherein the active layer has a multi quantum well structure including at least one period of a pair structure of a quantum barrier layer including AlxGa(1-x)N (0<x<1) and a quantum well layer including AlyGa(1-y)N (0<x<y<1), and at least one of the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer includes AlGaN. The intermediate layer includes AlN and has a plurality of air voids formed in the AlN. At least some of the air voids are irregularly aligned and the number of the air voids is 107 to 1010/cm2.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: April 7, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventors: Hae Jin Park, Kyoung Hoon Kim, Dong Ha Kim, Kwang chil Lee, Jae Hun Kim, Hwan Hui Yun
  • Patent number: 8994083
    Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: March 31, 2015
    Assignee: Sony Corporation
    Inventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
  • Patent number: 8987037
    Abstract: A method of manufacturing a solar cell includes forming a buffer layer between an optical absorption layer and a window electrode layer. Forming the buffer layer includes depositing a metal material on the optical absorption layer, supplying a non-metal material on the optical absorption layer, supplying a gas material including oxygen atoms on the optical absorption layer, and reacting the metal material with the non-metal material. The gas material reacts with the metal material and the non-metal material to form a metal sulfur oxide on the optical absorption layer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 24, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong-Duck Chung, Dae-Hyung Cho, Won Seok Han
  • Patent number: 8981460
    Abstract: The subject disclosure presents power semiconductor devices, and methods for manufacture thereof, with improved ruggedness and. In an aspect, the power semiconductor devices are power field effect transistors (FETs) having enhanced suppression of the activation of the parasitic bipolar junction transistor (BJT) and a normal threshold value. The devices comprise a doped source (14) of a first conductivity type, a doped body (15) of a second conductivity type, a source electrode (20) short-connecting the doped body and the doped source, a doped drift region (10) of the first conductivity type, a first layer (30) of a gate dielectric region (36) covering the surface of the doped drift region (10), and forming channel from the doped source (14) to the doped drift region (10), a second layer (31) of the gate dielectric region (36) over the first layer (30), a third layer (32) of the gate dielectric region (36) over the second layer (31), and a gate electrode (21) over the third layer (32).
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: March 17, 2015
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Johnny Kin On Sin, Xianda Zhou
  • Patent number: 8981431
    Abstract: A semiconductor light emitting device including: a substrate made of GaAs; and a semiconductor layer formed on the substrate, in which part of the substrate on a side opposite to the semiconductor layer is removed by etching so that the semiconductor light emitting device has a thickness of not more than 60 ?m.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: March 17, 2015
    Assignee: Rohm Co., Ltd.
    Inventors: Tadahiro Hosomi, Kentaro Mineshita
  • Patent number: 8981338
    Abstract: A semiconductor photocathode includes an AlXGa1-XN layer (0?X<1) bonded to a glass substrate via an SiO2 layer and an alkali-metal-containing layer formed on the AlXGa1-XN layer. The AlXGa1-XN layer includes a first region, a second region, an intermediate region between the first and second regions. The second region has a semiconductor superlattice structure formed by laminating a barrier layer and a well layer alternately, the intermediate region has a semiconductor superlattice structure formed by laminating a barrier layer and a well layer alternately. When a pair of adjacent barrier and well layers is defined as a unit section, an average value of a composition ratio X of Al in a unit section decreases monotonously with distance from an interface position between the second region and the SiO2 layer at least in the intermediate region.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: March 17, 2015
    Assignees: Sanken Electric Co., Ltd., Hamamatsu Photonics K.K.
    Inventors: Shunro Fuke, Tetsuji Matsuo, Yoshihiro Ishigami, Tokuaki Nihashi
  • Publication number: 20150060908
    Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The p-type contact layer and electron blocking layer can be doped with a p-type dopant. The dopant concentration for the electron blocking layer can be at most ten percent the dopant concentration of the p-type contact layer. A method of designing such a heterostructure is also described.
    Type: Application
    Filed: September 3, 2014
    Publication date: March 5, 2015
    Applicant: SENSOR ELECTRONIC TECHNOLOGY, INC.
    Inventors: Rakesh Jain, Maxim S. Shatalov, Jinwei Yang, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Patent number: 8962376
    Abstract: An optoelectronic device, including a semiconductor body having a surface to receive photons and a plurality of doped regions of opposite doping polarities, the doped regions extending substantially from the surface of the semiconductor body and into the semiconductor body, and being arranged in one or more pairs of opposite doping polarities such that each pair of doped regions forms a corresponding space charge region having a corresponding electric field therein, the space charge region extending substantially from the surface of the semiconductor body and into the semiconductor body such that photons entering the semiconductor body through the surface and travelling along paths within the space charge region generate electron-hole pairs in the space charge region that are separated in opposing directions substantially orthogonal to the photon paths by the electric field and collected by the corresponding pair of doped regions, thereby providing an electrical current to be conducted from the device.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: February 24, 2015
    Assignee: The Silanna Group Pty Ltd
    Inventors: Petar Branko Atanackovic, Steven Grant Duvall
  • Patent number: 8963123
    Abstract: A light-emitting diode includes a substrate, a stacked semiconductor structure on one side of the substrate, and a reflection layer on the other side of the substrate opposite to the stacked semiconductor structure. At least one contact electrode is disposed on the stacked semiconductor structure. The contact electrode includes a pad electrode and at least one finger electrode extending from the pad electrode. A light-guiding structure is disposed along the finger electrode.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: February 24, 2015
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Keng-Ying Liao, Yu-Hsuan Liu