Imaging Array Patents (Class 257/291)
  • Patent number: 8835909
    Abstract: Thin-film transistors are made using an organosilicate glass (OSG) as an insulator material. The organosilicate glasses may be SiO2-silicone hybrid materials deposited by plasma-enhanced chemical vapor deposition from siloxanes and oxygen. These hybrid materials may be employed as the gate dielectric, as a subbing layer, and/or as a back channel passivating layer. The transistors may be made in any conventional TFT geometry.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: September 16, 2014
    Assignee: The Trustees of Princeton University
    Inventors: Lin Han, Prashant Mandlik, Sigurd Wagner
  • Patent number: 8835203
    Abstract: An organic light emitting diode (OLED) display and a method for manufacturing the same are provided. The OLED display includes a substrate, an active layer and a capacitor lower electrode positioned on the substrate, a gate insulating layer positioned on the active layer and the capacitor lower electrode, a gate electrode positioned on the gate insulating layer at a location corresponding to the active layer, a capacitor upper electrode positioned on the gate insulating layer at a location corresponding to the capacitor lower electrode, a first electrode positioned to be separated from the gate electrode and the capacitor upper electrode, an interlayer insulating layer positioned on the gate electrode, the capacitor upper electrode, and the first electrode, a source electrode and a drain electrode positioned on the interlayer insulating layer, and a bank layer positioned on the source and drain electrodes.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: September 16, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Hyunho Kim, Seokwoo Lee, Heedong Choi, Sangjin Lee, Seongmoh Seo
  • Patent number: 8835998
    Abstract: A compositionally graded semiconductor device and a method of making same are disclosed that provides an efficient p-type doping for wide bandgap semiconductors by exploiting electronic polarization within the crystalline lattice. The compositional graded semiconductor graded device includes a graded heterojunction interface that exhibits a 3D bound polarization-induced sheet charge that spreads in accordance with ??(z)=??·P(z), where ??(z) is a volume charge density in a polar (z) direction, and ? is a divergence operator, wherein the graded heterojunction interface is configured to exhibit substantially equivalent conductivities along both lateral and vertical directions relative to the graded heterojunction interface.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: September 16, 2014
    Assignee: University of Notre Dame du Lac
    Inventors: John Simon, Debdeep Jena, Huili Xing
  • Patent number: 8836839
    Abstract: Provided is an organic pixel, which includes a semiconductor substrate including a pixel circuit, an interconnection layer having a first contact and a first electrode formed on a semiconductor substrate, and an organic photo-diode formed on the interconnection layer. For example, the organic photo-diode includes an insulation layer formed on the first electrode, a second electrode and a photo-electric conversion region formed between the first contact, the insulation layer and the second electrode. The photo-electric conversion region includes an electron donating organic material and an electron accepting organic material. The organic photo-diode may further include a second contact electrically connected to the first contact. The horizontal distance between the second contacts and the insulation layer may be less than or equal to a few micrometers, for example, 10 micrometers.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: September 16, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyo Jin Choo, Hirosige Goto, Kyu Sik Kim, Yun Kyung Kim, Kyung Bae Park, Jin Ho Seo, Sang Chul Sul, Kyung Ho Lee, Kwang Hee Lee
  • Patent number: 8829577
    Abstract: Provided is an image sensor including a drive transistor as a voltage buffer, which can suppress generation of secondary electrons from a channel of the drive transistor to prevent generation of image defects caused by dark current. The transistor includes a gate electrode formed on a substrate, source and drain regions formed in the substrate exposed to both sides of the gate electrode, respectively, and an electric field attenuation region formed on the drain region and partially overlapping the gate electrode.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: September 9, 2014
    Assignee: Intellectual Ventures II LLC
    Inventor: Man Lyun Ha
  • Patent number: 8829579
    Abstract: A solid-state imaging device includes photoelectric conversion elements on an imaging surface of a substrate, receiving light incident on a light receiving surface and performing photoelectric conversion to produce a signal charge. Electrodes are interposed between the photoelectric conversion elements and light blocking portions are provided above the electrodes and interposed between the photoelectric conversion elements. The light blocking portions include an electrode light blocking portion formed to cover the corresponding electrode, and a pixel isolation and light blocking portion protruding convexly from the upper surface of the electrode light blocking portion. The photoelectric conversion elements are arranged at first pitches on the imaging surface. The electrode light blocking portions and the pixel isolation and light blocking portions are arranged at second and third pitches on the imaging surface.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: September 9, 2014
    Assignee: Sony Corporation
    Inventor: Yoshiaki Masuda
  • Patent number: 8823123
    Abstract: According to one embodiment, there is provided a solid-state image sensor including a photoelectric conversion layer, and a multilayer interference filter. The multilayer interference filter is arranged to conduct light of a particular color, of incident light, selectively to the photoelectric conversion layer. The multilayer interference filter has a laminate structure in which a first layer having a first refraction index and a second layer having a second refraction index are repeatedly laminated, and a third layer which is in contact with a lower surface of the laminate structure and has a third refraction index. A lowermost layer of the laminate structure is the second layer. The third refraction index is not equal to the first refraction index and is higher than the second refraction index.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 2, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Kokubun, Yusaku Konno
  • Patent number: 8823067
    Abstract: A solid-state imaging apparatus including: a sensor substrate that has a plurality of pixels configured to receive incident light, the plurality of pixels being arranged on an upper surface of a semiconductor substrate; a transparent substrate that has a lower surface facing an upper surface of the sensor substrate and is configured to transmit the incident light therethrough; and a diffraction grating that is provided at any position between an upper surface of the transparent substrate and the upper surface of the sensor substrate and is configured to transmit the incident light therethrough, in which the diffraction grating is formed so as to diffract reflected diffraction light caused by that the incident light is incident on a pixel area in which the plurality of pixels are arranged on the upper surface of the semiconductor substrate and is diffracted.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: September 2, 2014
    Assignee: Sony Corporation
    Inventor: Masanori Iwasaki
  • Patent number: 8822258
    Abstract: A wafer-level bonding method for fabricating wafer level camera lenses is disclosed. The method includes: providing a lens wafer including lenses arranged in an array and a sensor wafer including sensors arranged in an array; measuring and analyzing an FFL of each lens to obtain a corresponding FFL compensation value for each lens; forming a thin transparent film (TTF) on each sensor of the sensor wafer, and the thickness of TTF is determined by the FFL compensation value of the corresponding lens; aligning and bonding the lens wafer with the sensor wafer having TTFs formed thereon. Since the focal length of each lens is adjusted to compensate the FFL of the lens by adding a TTF of transparent optical material with an index of refraction that is similar to the index of refraction of the sensor cover glass, the FFL variation of each camera lens can be reduced.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: September 2, 2014
    Assignee: OmniVision Technologies (Shanghai) Co., Ltd.
    Inventor: Regis Fan
  • Patent number: 8822255
    Abstract: A method of manufacturing a solar cell, which includes an edge deletion step using a laser beam, and a manufacturing apparatus which is used in such a method, the method and the apparatus being capable of preventing a shunt and cracks from being generated are provided. By radiating a first laser beam to a multilayer body, which includes a transparent electrode layer, a photoelectric conversion layer, and a back electrode layer sequentially formed on a transparent substrate, from a side of the transparent substrate, the photoelectric conversion layer and the back electrode layer in a first region are removed, and by radiating a second laser beam into the region such that the second laser beam is spaced from a peripheral rim of the region, the transparent electrode layer in a second region is removed.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: September 2, 2014
    Assignee: Ulvac, Inc.
    Inventors: Yoshiaki Yamamoto, Hitoshi Ikeda, Tomoki Ohnishi, Kouichi Tamagawa
  • Patent number: 8823069
    Abstract: A solid-state imaging device that includes: a pixel array section configured by an array of a unit pixel, including an optoelectronic conversion section that subjects an incoming light to optoelectronic conversion and stores therein a signal charge, a transfer transistor that transfers the signal charge stored in the optoelectronic conversion section, a charge-voltage conversion section that converts the signal charge provided by the transfer transistor into a signal voltage, and a reset transistor that resets a potential of the charge-voltage conversion section; and voltage setting means for setting a voltage of a well of the charge-voltage conversion section to be negative.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: September 2, 2014
    Assignee: Sony Corporation
    Inventor: Fumihiko Koga
  • Publication number: 20140239158
    Abstract: A photoelectric converter includes a first pn junction comprised of at least two semiconductor regions of different conductivity types, and a first field-effect transistor including a first source connected with one of the semiconductor regions, a first drain, a first insulated gate and a same conductivity type channel as that of the one of the semiconductor regions. The first drain is supplied with a second potential at which the first pn junction becomes zero-biased or reverse-biased relative to a potential of the other of the semiconductor regions. When the first source turns to a first potential and the one of the semiconductor regions becomes zero-biased or reverse-biased relative to the other semiconductor regions, the first pn junction is controlled not to be biased by a deep forward voltage by supplying a first gate potential to the first insulated gate, even when either of the semiconductor regions is exposed to light.
    Type: Application
    Filed: October 5, 2012
    Publication date: August 28, 2014
    Applicants: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE, RICOH COMPANY, LTD.
    Inventors: Yutaka Hayashi, Toshitaka Ota, Yasushi Nagamune, Hirofumi Watanabe, Takaaki Negoro, Kazunari Kimino
  • Patent number: 8816415
    Abstract: A photodiode structure includes a photodiode and a concave reflector disposed below the photodiode. The concave reflector is arranged to reflect incident light from above back toward the photodiode.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: August 26, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Che-Min Lin, Volume Chien, Chih-Kang Chao, Chi-Cherng Jeng, Pin Chia Su, Chih-Mu Huang
  • Patent number: 8815723
    Abstract: A method of forming an image sensor device includes forming a light sensing region at a front surface of a silicon substrate and a patterned metal layer there over. Thereafter, the method also includes performing an ion implantation process to the back surface of the silicon substrate and performing a green laser annealing process to the implanted back surface of the silicon substrate. The green laser annealing process uses an annealing temperature greater than or equal to about 1100° C. for a duration of about 100 to about 400 nsec. After performing the green laser annealing process, a silicon polishing process is performed on the back surface of the silicon substrate.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: August 26, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shou Shu Lu, Hsun-Ying Huang, I-Chang Lin, Chia-Chi Hsiao, Yung-Cheng Chang
  • Patent number: 8816405
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: August 26, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Patent number: 8816412
    Abstract: An image sensor having a light receiving region and an optical black region includes a semiconductor substrate, an interconnection disposed on the semiconductor substrate and extending along an interface between the light receiving region and the optical black region, and via plugs disposed between the interconnection and the semiconductor substrate and serving as light shielding members at the interface. The via plugs are arranged in a zigzagging pattern along the interface.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keon Yong Cheon, Jong-Won Choi, Sung-Hyun Yoon
  • Patent number: 8816416
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: August 26, 2014
    Assignee: Sony Corporation
    Inventor: Kiyoshi Hirata
  • Publication number: 20140231887
    Abstract: A backside illuminated image sensor comprises a photodiode and a first transistor in a sensor region and located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads, the bonding pads disposed outside of the sensor region.
    Type: Application
    Filed: February 18, 2013
    Publication date: August 21, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
  • Patent number: 8809922
    Abstract: Disclosed is a solid-state image sensing device including: a first photoelectric conversion element having a first semiconductor region of a first conductivity type formed inside a semiconductor substrate; a second photoelectric conversion element having a second semiconductor region of a first conductivity type formed at a deeper position of the semiconductor substrate than the first photoelectric conversion element; a gate electrode laminated on the semiconductor substrate and to which a predetermined voltage is applied at a charge transfer time; a floating diffusion region to which the charges accumulated in the first photoelectric conversion element and the second photoelectric conversion element are transferred at the charge transfer time; and a third semiconductor region of a first conductivity type arranged between the first semiconductor region and the second semiconductor region in a depth direction of the semiconductor.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: August 19, 2014
    Assignee: Sony Corporation
    Inventors: Hitoshi Moriya, Hiroaki Ishiwata, Kazuyoshi Yamashita, Hiroyuki Mori
  • Patent number: 8809921
    Abstract: A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: August 19, 2014
    Assignee: Sony Corporation
    Inventors: Akihiro Yamada, Atsuhiko Yamamoto, Hideo Kido
  • Patent number: 8809924
    Abstract: According to an aspect of the invention, an imaging device includes a plurality of photoelectric conversion elements and a read-out portion. The photoelectric conversion elements are arranged above a substrate. The read-out portion reads out signal corresponding to charges which are generated from each of the photoelectric conversion elements. Each of the photoelectric conversion elements includes a first electrode that collects the charge, a second electrode that is disposed opposite to the first electrode, a photoelectric conversion layer that generates the charges and disposed between the first electrode and the second electrode, and an electron blocking layer that is disposed between the first electrode and the photoelectric conversion layer. Distance between the first electrodes of adjacent photoelectric conversion elements is 250 nm or smaller. Each of the electron blocking layers has a change in surface potential of ?1 to 3 eV from a first face to a second face.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: August 19, 2014
    Assignee: FUJIFILM Corporation
    Inventors: Hideyuki Suzuki, Kiyohiko Tsutsumi
  • Patent number: 8809923
    Abstract: A backside illuminated imaging sensor includes a semiconductor substrate having a front surface and a back surface. The semiconductor substrate has at least one imaging array formed on the front surface. The imaging sensor also includes a carrier substrate to provide structural support to the semiconductor substrate, where the carrier substrate has a first surface coupled to the front surface of the semiconductor substrate. A re-distribution layer is formed between the front surface of the semiconductor substrate and the second surface of the carrier substrate to route electrical signals between the imaging array and a second surface of the carrier substrate.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: August 19, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hsin-Chih Tai, Howard E. Rhodes, Duli Mao, Vincent Venezia, Yin Qian
  • Publication number: 20140211106
    Abstract: A photoelectric sensor, comprising: a first thin film transistor (T1) for converting a photo signal into an electrical signal; a second thin film transistor (T2) for performing an integration operation on the electrical signal; a third thin film transistor (T3) for reading the electrical signal; and a first capacitor (C1) for storing an energy of the electrical signal, wherein a drain electrode of the first thin film transistor (T1) is connected to one end of the first capacitor (C1) and a source electrode of the third thin film transistor (T3); a source electrode of the first thin film transistor (T1) is connected to a drain electrode of the second thin film transistor (T2); a gate electrode of the first thin film transistor (T1) is supplied with a bias signal; wherein a gate electrode of the second thin film transistor (T2) is supplied with an integration signal; a source electrode of the second thin film transistor (T2) is connected to a high level end of a power source; the other end of the first capacito
    Type: Application
    Filed: December 30, 2013
    Publication date: July 31, 2014
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Shiming Shi, Yunfei Li, Lu Wang
  • Publication number: 20140209986
    Abstract: A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.
    Type: Application
    Filed: March 31, 2014
    Publication date: July 31, 2014
    Applicant: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Patent number: 8792034
    Abstract: A solid-state imaging device includes a plurality of pixels, each of which includes a photoelectric converter section formed on a first substrate to generate and accumulate signal charges corresponding to incident light, a charge accumulation capacitor section formed on the first substrate or a second substrate to temporarily hold the signal charges transferred from the photoelectric converter section, and a plurality of MOS transistors formed on the second substrate to transfer the signal charges accumulated in the charge accumulation capacitor section, connection electrodes formed on the first substrate, and connection electrodes formed on the second substrate and electrically connected to the connection electrodes formed on the first substrate.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: July 29, 2014
    Assignee: Sony Corporation
    Inventor: Hiroshi Takahashi
  • Patent number: 8791514
    Abstract: An apparatus and method to decrease light saturation in a photosensor array and increase detection efficiency uses a light distribution profile from a scintillator-photodetector geometry to configure the photosensor array to have a non-uniform sensor cell pattern, with varying cell density and/or varying cell size and shape. A solid-state photosensor such as a SiPM sensor having such a non-uniform cell structure realizes improved energy resolution, higher efficiency and increased signal linearity. In addition the non-uniform sensor cell array can have improved timing resolution due to improvements in statistical fluctuations. A particular embodiment for such photosensors is in PET medical imaging.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: July 29, 2014
    Assignees: Siemens Medical Solutions USA, Inc., Siemens Aktiengesellschaft
    Inventors: Debora Henseler, Ronald Grazioso, Nan Zhang
  • Patent number: 8791512
    Abstract: An imaging device is formed in a semiconductor substrate. The device includes a matrix array of photosites. Each photosite is formed of a semiconductor region for storing charge, a semiconductor region for reading charge specific to said photosite, and a charge transfer circuit configured so as to permit a transfer of charge between the charge storage region and the charge reading region. Each photosite further includes at least one buried first electrode. At least one part of that buried first electrode bounds at least one part of the charge storage region. The charge transfer circuit for each photosite includes at least one second buried electrode.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: July 29, 2014
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Francois Roy, Julien Michelot
  • Patent number: 8791513
    Abstract: A metal wiring suitable for a substrate of large size is provided. The present invention is characterized in that at least one layer of conductive film is formed on an insulating surface, a resist pattern is formed on the conductive film, and the conductive film having the resist pattern is etched to form a metal wiring while controlling its taper angle ? in accordance with the bias power density, the ICP power density, the temperature of lower electrode, the pressure, the total flow rate of etching gas, or the ratio of oxygen or chlorine in etching gas. The thus formed metal wiring has less fluctuation in width or length and can satisfactorily deal with an increase in size of substrate.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: July 29, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Ono, Hideomi Suzawa
  • Patent number: 8785991
    Abstract: A solid state imaging device includes a photoelectric conversion portion in which the shape of potential is provided such that charge is mainly accumulated in a vertical direction.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: July 22, 2014
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8786732
    Abstract: An image sensor comprises a pixel array having a plurality of pixel regions, wherein the pixel array is adapted to generate at least one signal from each pixel region and a separate signal from a subset of pixels within each pixel region, both during a single exposure period. In one embodiment, the sensor is in communication with a shift register which accumulates the separate signal and transfers the separate signal to an amplifier. The shift register further accumulates the at least one signal from the pixel region after the separate signal has been transferred to the amplifier and transfers the at least one signal to the amplifier.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: July 22, 2014
    Assignee: Pixon Imaging, Inc.
    Inventors: Richard C. Puetter, Vesa Junkkarinen
  • Patent number: 8779481
    Abstract: A method of manufacturing a CMOS image sensor is disclosed. A silicon-on-insulator substrate is provided, which includes providing a silicon-on-insulator substrate including a mechanical substrate, an insulator layer substantially overlying the mechanical substrate, and a seed layer substantially overlying the insulator layer. A semiconductor substrate is epitaxially grown substantially overlying the seed layer. The mechanical substrate and at least a portion of the insulator layer are removed. An ultrathin oxide later is formed substantially underlying the semiconductor substrate. A mono layer of metal is formed substantially underlying the ultrathin oxide layer.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: July 15, 2014
    Assignee: SRI International
    Inventor: James Robert Janesick
  • Patent number: 8780247
    Abstract: Disclosed herein is a solid-state image pickup element, including: a photoelectric conversion region; a transistor; an isolation region of a first conductivity type configured to isolate the photoelectric conversion region and the transistor from each other; a well region of the first conductivity type having the photoelectric conversion region, the transistor, and the isolation region of the first conductivity type formed therein; a contact portion configured to supply an electric potential used to fix the well region to a given electric potential; and an impurity region of the first conductivity type formed so as to extend in a depth direction from a surface of the isolation region of the first conductivity type in the isolation region of the first conductivity type between the contact portion and the photoelectric conversion region, and having a sufficiently higher impurity concentration than that of the isolation region of the first conductivity type.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: July 15, 2014
    Assignee: Sony Corporation
    Inventor: Shinya Yamakawa
  • Patent number: 8780248
    Abstract: One or more embodiments relate to an image pickup apparatus including multiple pixels. Each of the multiple pixels includes a photoelectric-conversion unit, and an amplifier which outputs a signal based on charge generated by the photoelectric-conversion unit. Within an electric path between the photoelectric-conversion unit and an input node of the amplifier, there are disposed a first holder, a second holder disposed following the first holder, a first transfer unit which transfers charge to the first holder, a second transfer unit which transfers charge of the first holder to the second holder, and a third transfer unit which transfers charge of the second holder. The first holder includes a first-conductive-type first semiconductor region holding charge. The second holder includes a first-conductive-type second semiconductor region holding charge. Impurity concentration of the first semiconductor region is lower than impurity concentration of the second semiconductor region.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: July 15, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuichiro Yamashita, Masahiro Kobayashi, Itsutaku Sano, Takeshi Kojima
  • Patent number: 8779467
    Abstract: To provide a light emitting device high in reliability with a pixel portion having high definition with a large screen. According to a light emitting device of the present invention, on an insulator (24) provided between pixel electrodes. an auxiliary electrode (21) made of a metal film is formed, whereby a conductive layer (20) made of a transparent conductive film in contact with the auxiliary electrode can be made low in resistance and thin. Also, the auxiliary electrode (21) is used to achieve connection with an electrode on a lower layer, whereby the electrode can be led out with the transparent conductive film formed on an EL layer. Further, a protective film (32) made of a film containing hydrogen and a silicon nitride film which are laminated is formed, whereby high reliability can be achieved.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: July 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masaaki Hiroki, Masakazu Murakami, Hideaki Kuwabara
  • Patent number: 8779430
    Abstract: A semiconductor device (18) includes: a gate electrode (102) formed on a substrate (101); a semiconductor layer (104) formed above the gate electrode (102) and including a source region, a drain region, and a channel region; a source electrode (106) connected to the source region above the semiconductor layer (104); and a drain electrode (107) connected to the drain region above the semiconductor layer (104). The semiconductor layer (104) has, at a portion overlapping the drain electrode (107), a protrusion that protrudes outward along an extending direction of a drain line drawn out from the drain electrode (107). At an outside of the channel region sandwiched between the drain electrode (107) and the source electrode (106), the semiconductor layer (104) has an adjustment portion where an outer boundary of the semiconductor layer (104) is positioned more inward than an outer boundary of the gate electrode (102).
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: July 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shoji Okazaki, Takeshi Yaneda, Wataru Nakamura, Hiromitsu Katsui
  • Patent number: 8759135
    Abstract: According to one embodiment, a method of manufacturing a camera module includes, disposing a first member on the image sensor, the first member includes a first non-conductor, a first metal film covering the first non-conductor, and a first insulation film covering the first metal film, disposing a second member on or above the first member, the second member includes a second non-conductor, a second metal film covering the second non-conductor, and a second insulation film covering the second metal film, and applying a predetermined voltage between the first member and the second member or between the image sensor and the second member, thereby breaking at least parts of the first insulation film and the second insulation film.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Manabu Yamada
  • Publication number: 20140167124
    Abstract: A solid-state imaging apparatus includes a transfer gate electrode formed on a semiconductor substrate; a photoelectric conversion unit including an electric charge storage area that is formed from a surface side of the semiconductor substrate in a depth direction, a transfer auxiliary area formed of a second conductive type impurity area that is formed in such a manner as to partially overlap the transfer gate electrode, and a dark current suppression area that is a first dark current suppression area formed in an upper layer of the transfer auxiliary and formed so as to have positional alignment in such a manner that the end portion of the transfer auxiliary area on the transfer gate electrode side is at the same position as the end portion of the transfer auxiliary area; and a signal processing circuit configured to process an output signal output from the solid-state imaging apparatus.
    Type: Application
    Filed: February 24, 2014
    Publication date: June 19, 2014
    Applicant: Sony Corporation
    Inventors: Mikiko Kobayashi, Sanghoon Ha
  • Patent number: 8754457
    Abstract: An output terminal of a photoelectric conversion element included in the photoelectric conversion device is connected to a drain terminal and a gate terminal of a MOS transistor which is diode-connected, and a voltage Vout generated at the gate terminal of the MOS transistor is detected in accordance with a current Ip which is generated at the photoelectric conversion element. The voltage Vout generated at the gate terminal of the MOS transistor can be directly detected, so that the range of output can be widened than a method in which an output voltage is converted into a current by connecting a load resistor, and so on.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: June 17, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Makoto Yanagisawa, Atsushi Hirose
  • Publication number: 20140159128
    Abstract: A photodetector may have a structure including conductive patterns and an intermediate layer interposed between the conductive patterns. A length L of at least one side of the second conductive pattern that overlaps the first conductive pattern and the intermediate layer satisfies the equation L=?/2neff, wherein the neff is an effective refractive index of a surface plasmon waveguide mode by a surface plasmon resonance formed of the first conductive pattern, the intermediate layer, and the second conductive pattern. Heat generated in the intermediate layer when the electromagnetic wave having the wavelength ? is incident thereon generates a current variation.
    Type: Application
    Filed: November 27, 2013
    Publication date: June 12, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: HyunSeok LEE, Jung-Kyu JUNG, Yoondong PARK, Taeyon LEE
  • Patent number: 8748951
    Abstract: A solid-state image sensing device has a unit pixel containing a photoelectric conversion element for detecting a light to generate photoelectrons and pixel drive circuits for driving the unit pixel. The photoelectric conversion element has a photogate structure, and the pixel drive circuits apply a voltage selected from three voltages to the photogate of the photoelectric conversion element to generate or transfer the photoelectrons. The three voltages include at least a first voltage, a second voltage higher than the first voltage, and a third voltage higher than the first voltage and lower than the second voltage.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: June 10, 2014
    Assignee: Honda Motor Co., Ltd.
    Inventors: Keisuke Korekado, Tomoyuki Kamiyama
  • Patent number: 8748953
    Abstract: Methods and devices that incorporate microlens arrays are disclosed. An image sensor includes a pixel layer and a dielectric layer. The pixel layer has a photodetector portion configured to convert light absorbed by the pixel layer into an electrical signal. The dielectric layer is formed on a surface of the pixel layer. The dielectric layer has a refractive index that varies along a length of the dielectric layer. A method for fabricating an image sensor includes forming an array of microlenses on a surface of the dielectric layer, emitting ions through the array of microlenses to implant the ions in the dielectric layer, and removing the array of microlenses from the surface of the dielectric layer.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: June 10, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Giovanni Margutti, Andrea Del Monte
  • Patent number: 8748952
    Abstract: A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region, the substrate having a front side and a backside. A co-implant process is performed along the backside of the substrate opposing a photosensitive element positioned along the front side of the substrate. The co-implant process utilizes a first pre-amorphization implant process that creates a pre-amorphization region. A dopant is then implanted wherein the pre-amorphization region retards or reduces the diffusion or tailing of the dopants into the photosensitive region. An anti-reflective layer, a color filter, and a microlens may also be formed over the co-implant region.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: June 10, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Tsung Chen, Hsun-Ying Huang, Yung-Cheng Chang, Yung-Fu Yeh, Yu-Ping Chen, Chi-Yuan Liang, Shou Shu Lu, Juan-Lin Chen, Jia-Ren Chen, Horng-Daw Shen, Chi-Hsun Hsieh
  • Publication number: 20140151769
    Abstract: A detection apparatus includes a conversion layer configured to convert incident light or radiation into a charge, electrodes configured to collect a charge produced as a result of the conversion by the conversion layer, and impurity semiconductor layers arranged between the electrodes and the conversion layer. The conversion layer is arranged over the electrodes so as to cover the electrodes. A part of the conversion layer which covers a region between an adjacent pair of the electrodes includes a portion smaller in film thickness than a part of the conversion layer which covers edges of the electrodes.
    Type: Application
    Filed: November 20, 2013
    Publication date: June 5, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroshi Wayama, Minoru Watanabe, Keigo Yokoyama, Masato Ofuji, Jun Kawanabe, Kentaro Fujiyoshi, Akiya Nakayama
  • Publication number: 20140151768
    Abstract: A pixel circuit including: a differential detection circuit having first and second transistors coupled in series between differential output nodes of an antenna, the antenna being configured to be sensitive to terahertz radiation, and wherein: a first main conducting node of the first transistor is coupled to a first of the differential output nodes of the antenna; and a first main conducting node of the second transistor is coupled to a second of said differential output nodes of the antenna, wherein second main conducting nodes of the first and second transistors are formed by a common semiconductor region.
    Type: Application
    Filed: December 3, 2012
    Publication date: June 5, 2014
    Inventors: Ullrich Pfeiffer, Hani Sherry, Andreia Cathelin
  • Patent number: 8742525
    Abstract: A solid-state imaging device includes pixels each having a photoelectric conversion element for converting incident light to an electric signal, color filters associated with the pixels and having a plurality of color filter components, microlenses converging the incident light through the color filters to the photoelectric conversion elements, a light shielding film disposed between the color filter components of the color filters, and a nonplanarized adhesive film provided between the color filters and the light shielding film.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: June 3, 2014
    Assignee: Sony Corporation
    Inventors: Tomoharu Ogita, Atsushi Yamamoto, Keiji Tatani, Yoichi Ootsuka
  • Publication number: 20140145251
    Abstract: A structure comprising at least one DTI-type insulating trench in a substrate, the trench being at the periphery of at least one active area of the substrate forming a pixel, the insulating trench including a cavity filled with a dielectric material, the internal walls of the cavity being covered with a layer made of a boron-doped material.
    Type: Application
    Filed: January 30, 2014
    Publication date: May 29, 2014
    Applicant: STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Laurent Favennec, Arnaud Tournier, François Roy
  • Patent number: 8734008
    Abstract: An active sensor apparatus includes an array of sensor elements arranged in a plurality of columns and rows of sensor elements. The sensor apparatus includes a plurality of column and row thin film transistor switches for selectively activating the sensor elements, and a plurality of column and row thin film diodes for selectively accessing the sensor elements to obtain information from the sensor elements. The thin film transistor switches and thin film diodes are formed on a common substrate.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: May 27, 2014
    Assignee: Next Biometrics AS
    Inventor: Matias N. Troccoli
  • Patent number: 8735952
    Abstract: A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged on a semiconductor substrate, in which each of the pixels includes a photoelectric converting portion and a charge converting portion for converting a charge generated by photoelectric conversion into a pixel signal and blooming is suppressed by controlling a substrate voltage of the semiconductor substrate.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: May 27, 2014
    Assignee: Sony Corporation
    Inventors: Maki Sato, Yoshiharu Kudoh
  • Patent number: 8736009
    Abstract: The image sensor includes a substrate, an insulating structure formed on a first surface of the substrate and including a first metal wiring layer exposed by a contact hole penetrating the substrate, a conductive spacer formed on sidewalls of the contact hole and electrically connected to the first metal wiring layer, and a pad formed on a second surface of the substrate and electrically connected to the first metal wiring layer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 27, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung Jun Park, Yong Woo Lee, Chang Rok Moon
  • Patent number: 8735892
    Abstract: An object of one embodiment of the disclosed invention is to provide a semiconductor device having a novel structure in which stored data can be held even when power is not supplied and the number of times of writing is not limited. The semiconductor device is formed using an insulating layer formed over a supporting substrate and, over the insulating layer, a highly purified oxide semiconductor and single crystal silicon which is used as a sililcon on insulator (SOI). A transistor formed using a highly purified oxide semiconductor can hold data for a long time because leakage current thereof is extremely small. Further, by using an SOI substrate and utilizing features of thin single crystal silicon formed over an insulating layer, fully-depleted transistors can be formed; therefore, a semiconductor integrated circuit with high added values such as high integration, high-speed driving, and low power consumption can be obtained.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: May 27, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki