Abstract: An image sensor includes a plurality of photodiodes arranged into an array of rows and columns. The photodiodes are grouped into pixel units, where each pixel unit includes at least four photodiodes and shared pixel unit circuitry coupled to each of the four photodiodes. In one aspect the shared pixel unit circuitry may include a shared source follower transistor. In another aspect the shared pixel unit circuitry includes a shared reset transistor. Two of the photodiodes of the pixel unit are in a first column of the array and another two of the photodiodes are in a second column of the array. One of the photodiodes in the second column is in a row that is between rows of the two photodiodes in the first column.

Abstract: To provide a crystalline oxide semiconductor film, an ion is made to collide with a target including a crystalline In—Ga—Zn oxide, thereby separating a flat-plate-like In—Ga—Zn oxide in which a first layer including a gallium atom, a zinc atom, and an oxygen atom, a second layer including an indium atom and an oxygen atom, and a third layer including a gallium atom, a zinc atom, and an oxygen atom are stacked in this order; and the flat-plate-like In—Ga—Zn oxide is irregularly deposited over a substrate while the crystallinity is maintained.

Abstract: A solid-state imaging device in which a plurality of pixels are two-dimensionally arranged includes a silicon layer; a plurality of photodiodes which are formed in the silicon layer to correspond to the pixels and generate signal charges by performing photoelectric conversion on incident light; and a plurality of color filters formed above the silicon layer to correspond to the plurality of the pixels. A protrusion is formed in a region on a side of the silicon layer between adjacent ones of the color filters wherein the protrusion has a refractive index lower than refractive indices of the adjacent ones of the color filters and, each of the color filters is in contact with the adjacent ones of the color filters, above the protrusion.

Abstract: A light receiving layer is formed with an array of photodiodes for accumulating signal charge produced by photoelectric conversion of incident light. A wiring layer provided with electrodes and wiring for controlling the photodiodes is formed behind the light receiving layer in a traveling direction of the incident light. In the light receiving layer, there is formed a projection and depression structure in which a pair of inclined surfaces have symmetric inclination directions and each inclined surface corresponds to each photodiode. Each inclined surface makes the incident light enter each photodiode by a light amount corresponding to an incident angle.

Abstract: A device includes a semiconductor substrate having a front side and a backside, a photo-sensitive device disposed on the front side of the semiconductor substrate, and a first and a second grid line parallel to each other. The first and the second grid lines are on the backside of, and overlying, the semiconductor substrate. The device further includes an adhesion layer, a metal oxide layer over the adhesion layer, and a high-refractive index layer over the metal layer. The adhesion layer, the metal oxide layer, and the high-refractive index layer are substantially conformal, and extend on top surfaces and sidewalls of the first and the second grid lines.

Abstract: An image sensor integrated circuit may contain image sensor pixels. A channel for receiving a fluid with particles such as fluorescent biological samples may be formed on top of the image sensor. Light-control layers may be interposed between the fluid channel and the top of the image sensor. The light-control layers may include a color filter array, a microlens array over the color filter array, and a plasmonic color filter. The plasmonic color filter may be formed from a patterned metal layer on the color filter array or on the microlens array. The patterned metal layer may include openings that are configured to use plasmonic effects to control the colors of light that pass through the plasmonic color filter. The color filter array and the plasmonic color filter, in combination, may block light from a light source in the system while passing fluorescent light from the sample.

Abstract: A radiation detector assembly including an organic photodetector that generate charge in response to an incident radiation, a thin film transistor array including a plurality of pixels. The plurality of pixels may produce electric signals corresponding to the charge generated by the organic photodetector. The radiation detector assembly also includes a spacer disposed on the thin film transistor array. The spacer surrounds one or more pixels and may confine the organic photodetector within the surrounded one or more pixels such that the surrounded one or more pixels are electrically isolated from a neighboring pixel.

Abstract: In one embodiment, the image sensor includes a first photodiode configured to convert an optical signal into a photocharge, a sensing node configured to store the photocharge of the first photodiode, and a circuit configured to selectively output an electrical signal corresponding to the photocharge at the sensing node on an output line. The circuit is connected to at least a first conductive contact, and the output line is disposed between the sensing node and the first conductive contact.

Abstract: A photodiode structure includes a photodiode and a concave reflector disposed below the photodiode. The concave reflector is arranged to reflect incident light from above back toward the photodiode.

Abstract: An electronic device may include a display having an array of organic light-emitting diode display pixels. Color filter elements may be used to allow the display to present color images. A blue subpixel may be formed using part of an emissive layer and red and green subpixels may share a separate second part of the emissive layer. In four-subpixel designs, a white or yellow subpixel may also share the emissive layer with the red and green subpixels. Tandem diode configurations may be used in which a blue subpixel has two blue diodes connected in series and other subpixels are formed from respective pairs of series-connected diodes. A pixel definition layer may be formed from a light-absorbing material to suppress ambient light reflections.

Abstract: According to one embodiment, there is provided a solid-state imaging device in which vertical signal lines VL1-1, VL1-2, VL2-1, VL2-2, VL3-1, and VL3-2 are respectively arranged between power lines DL1-1, DL1-3, DL2-1, DL2-3, DL3-1, and DL3-3, power lines DL1-2, DL2-2, and DL3-2 are respectively arranged between the vertical signal lines VL1-1, VL1-2, VL2-1, VL2-2, VL3-1, and VL3-2, power lines DL1-1 and DL1-3 are arranged to cross each other in each pixel in the column direction, power lines DL2-1 and DL2-3 are arranged to cross each other in each pixel in the column direction, and power lines DL3-1 and DL3-3 are arranged to cross each other in each pixel in the column direction.

Abstract: A pixel circuit includes a plurality of pixel units, and one of the pixel units includes a photosensor, a readout circuit, and a switch circuit. The readout circuit is coupled to a supply voltage and the photosensor, which includes a floating diffusion node for storing data of the photosensor and an output node for outputting data of the floating diffusion node. The switch circuit is coupled between the photosensor and a tail node, wherein the tail node is coupled to the floating diffusion node of another pixel unit.

Abstract: A solid-state image pickup apparatus of the present invention includes a plurality of pixels arranged in a matrix. For the convenience sake, among the plurality of pixels, two pixels from which signals are not read in parallel are set to be a first pixel and a second pixel. A first reset transistor is disposed in an electrical path between a first reset power supply line and the control electrode of an amplifying transistor contained in the first pixel. A second reset transistor is disposed in an electrical path between the control electrode of the amplifying transistor contained in the first pixel and the control electrode of an amplifying transistor contained in the second pixel. A third reset transistor is disposed in an electrical path between the control electrode of the amplifying transistor contained in the second pixel and a second reset power supply line.

Abstract: A solid-state imaging device includes: an epilayer; pixel electrodes; a photoelectric converting film formed above the pixel electrodes and converting incident light into electric signals; a transparent electrode formed on the photoelectric converting film; charge accumulating regions of an n-type each (i) formed in the epilayer to correspond to one of the pixel electrodes, (ii) electrically connected to the one corresponding pixel electrode, and (iii) accumulating signal charges generated by the photoelectric converting film through the photo-electrically conversion; charge barrier regions of a p-type each formed in the epilayer to contact a bottom of a corresponding one of the charge accumulating regions; and charge draining regions of an n-type each formed in the epilayer to contact a bottom of a corresponding one of the charge barrier regions.

Abstract: Embodiments of radiographic imaging systems and/or methods can monitor the state of calibration of a digital x-ray detector, the detector including a solid state sensor with a plurality of pixels, an optional scintillating screen and at least one embedded microprocessor. In one embodiment, a method can use a computer or the embedded microprocessor or both, for setting a calibration operating mode of the portable detector; taking a plurality of dark images in the calibration mode; determining a dark difference image between pixel readings between two of the plurality of dark images; identifying pixels in the dark difference image that differ by over a threshold amount from at least some surrounding pixels in the dark difference image as defective pixels.

Abstract: A display panel and a manufacturing method thereof are disclosed herein. The display panel includes a substrate, a peripheral circuit, a plurality of pixel electrodes, a plurality of switches, and an insulating layer. The substrate has a display region and a non-display region. At least a portion of the peripheral circuit is located on the display region of the substrate. The pixel electrodes are located on the display region of the substrate. The switches are respectively and electrically connected to the pixel electrodes, configured to be respectively switched on according to a plurality of scan signals, so as to transmit a plurality of data signals to the pixel electrodes. The insulating layer is located between the peripheral circuit and the pixel electrodes, and is configured to prevent the peripheral circuit from interfering with the pixel electrodes.

Abstract: Disclosed herein is a solid-state imaging apparatus including: a semiconductor base; a photodiode created on the semiconductor base and used for carrying out photoelectric conversion; a pixel section provided with pixels each having the photodiode; a first wire created by being electrically connected to the semiconductor base for the pixel section through a contact section and being extended in a first direction to the outside of the pixel section; a second wire made from a wiring layer different from the first wire and created by being extended in a second direction different from the first direction to the outside of the pixel section; and a contact section for electrically connecting the first and second wires to each other.

Abstract: A photoelectric conversion device, comprising a photoelectric conversion portion, provided in a semiconductor substrate, including a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type provided adjacent to the first semiconductor region, a third semiconductor region of the first conductivity type provided at a position away from the second semiconductor region, and a gate electrode provided between the second semiconductor region and the third semiconductor region, wherein the second semiconductor region is provided at a position away from the gate electrode, and the semiconductor substrate includes a region of a second conductivity type within a region extending from an edge of the second semiconductor region to below the gate electrode.

Abstract: Time delay and integration sensor comprising a matrix of photosensitive pixels organized in rows and columns. Each pixel of a column comprises a photosensitive element, a storage node, and a first transfer transistor connecting the photosensitive element to the storage node. Each pixel of a column, except for the last one, further comprises a second transfer transistor which connects the storage node of the pixel to the photosensitive element of the next pixel of the column. The two transfer transistors are connected to be active at the same time. With such a configuration, it is possible to define a sliding group of several consecutive pixels in a column, to expose the group of pixels, to aggregate the information of the pixels of the group, and to start again after shifting the group of pixels by one pixel.

Abstract: Provided is a semiconductor device having improved performance and an improved manufacturing yield. Over photodiodes formed in a semiconductor substrate, a plurality of first to third embedded insulating films are stacked to form a waveguide for light incident on each of the photodiodes. The first embedded insulating film is formed simultaneously with plugs when the plugs are formed. The second embedded insulating film is formed simultaneously with first wires when the first wires are formed. The third embedded insulating film is formed simultaneously with second wires when the second wires are formed.

Abstract: A semiconductor structure includes a semiconductor layer of a first conductivity type, a photosensitive zone configured such that photogenerated charges may be accumulated in a first potential well, a region of the first conductivity type, formed in the semiconductor layer, for temporarily storing the photogenerated charges in a second potential well, a transfer gate between the region of the second conductivity type and the photosensitive zone for defining a potential barrier between the first and second potential wells during a non-transfer phase, and for eliminating the potential barrier between the first and second potential wells during a transfer phase, and a readout structure for reading out the temporarily stored photogenerated charges, which includes a JFET, the gate of which is formed by the region of the second conductivity type.

Abstract: To provide a display device with low power consumption. The display device includes a plurality of pixels each having a light-emitting element having a structure in which light emitted from a light-emitting layer is resonated between a reflective electrode and a light-transmitting electrode, wherein no color filter layers are provided or color filter layers with high transmittance are provided in pixels for light with relatively short wavelengths (e.g., pixels for blue and/or green), and a color filter layer is selectively provided in pixels for light with a long wavelength (e.g., pixels for red), and thereby maintaining color reproducibility and consuming less power.

Abstract: Embodiments of mechanisms of a backside illuminated image sensor device structure are provided. The backside illuminated image sensor device structure includes a substrate having a frontside and a backside and a pixel array formed in the frontside of the substrate. The backside illuminated image sensor device structure further includes an antireflective layer formed over the backside of the substrate, and the antireflective layer is made of silicon carbide nitride.

Abstract: A composite substrate includes a moisture-proof substrate, and a resin substrate pasted on a surface of the moisture-proof substrate. The resin substrate is formed to be smaller than the moisture-proof substrate in planar view. An end side of the resin substrate is an inclined face that is inclined inward. In an organic electroluminescence device, an organic light-emitting multilayer provided on a surface of the resin substrate is sealed with a sealing member. A moisture-proof film coats at least part of the surface of the resin substrate in which no lead-out electrode is formed.

Abstract: A liquid crystal display includes: a liquid crystal display panel; a backlight unit including a light emitting diode; a first flexible printed circuit having first and second end portions and a bent portion, the first end portion of the first flexible printed circuit connected to the liquid crystal display panel; a second flexible printed circuit having first and second end portions, and a bent portion, the first end portion of the second flexible printed circuit coupled with the light emitting diode and a second end portion of the second flexible printed circuit connected to the first flexible printed circuit; an anisotropic conductive film connecting the first flexible printed circuit and the second flexible printed circuit; and a case including a recess portion at rear surface, the second end portion of the second flexible printed circuit is within the recess portion.

Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor region, a first diffusion layer, a second diffusion layer, a third diffusion layer, an insulating film, a potential layer, and a read electrode. The semiconductor region includes first and second surfaces. The first diffusion layer is formed in the first surface. The first diffusion layer's concentration is a maximum value in a position at a first depth. The charge accumulation layer has a second depth. The second diffusion layer contacts the first diffusion layer. The third diffusion layer is formed in a position which faces the second diffusion layer in respect to the first diffusion layer. The insulating film is formed on the first surface. The potential layer is formed on the insulating film and has a predetermined potential. The read electrode is formed on the insulating film.

Abstract: A back side illuminated image sensor may be provided with an array of image sensor pixels. Each pixel may include a substrate having a front surface and a back surface. The pixels may have a charge storage region at the back surface and a charge readout node at the front surface of the substrate. The pixels may receive light at the back surface. Photo-generated charge may be accumulated at the charge storage region during a charge integration cycle. Upon completion of the charge integration cycle, a transfer gate formed at the front surface may be pulsed high to move the charge from the charge storage region to the charge readout node using a global shutter algorithm. The pixels may include two reset transistors that are coupled to column feedback amplifier circuitry for mitigating kTC-reset noise when the pixels are operated in a global shutter mode.

Abstract: An integrated circuit including a semiconductor device has a power component including a plurality of trenches in a cell array, the plurality of trenches running in a first direction, and a sensor component integrated into the cell array of the power component and including a sensor cell having an area which is smaller than an area of the cell array of the power component. The integrated circuit further includes isolation trenches disposed between the sensor component and the power component, an insulating material being disposed in the isolation trenches. The isolation trenches run in a second direction that is different from the first direction.

Abstract: The present invention provides an image sensor and a fabricating method of the image sensor. The image sensor comprises: a first type epitaxial layer, a photodiode region, a first type well region, a gate region of a source follower transistor, and a first type implant isolation region. The first type well region is formed within the first type epitaxial layer with a first horizontal distance to the photodiode region and a vertical distance to a surface of the first type epitaxial layer. The gate region of a source follower transistor is formed on the surface of the first type epitaxial layer and above the first type well region, and has a second horizontal distance to the photodiode region. There is a distance between the first type implant isolation region and the first type well region as an anti-blooming path.

Abstract: A solid-state imaging device includes, on a semiconductor substrate, a pixel portion having a plurality of pixels provided with a photoelectric conversion portion, which photoelectrically converts incident light to obtain a signal charge and a pixel transistor portion, which converts the signal charge read from the photoelectric conversion portion to a voltage, wherein an element isolation region disposed in the pixel portion includes an insulating film buried in a trench disposed in the semiconductor substrate, and the insulating film includes an insulating film having a negative charge.

Abstract: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of bond pads electrically interconnected, wherein each bond pad of the bond pad array is of a small size which can reduce the dishing effect of a big bond pad. The plurality of bond pads of a bond pad array may be interconnected at the same layer of the pad or at a different metal layer. The BSI sensor may be bonded to an ASIC in a face-to-face fashion where the bond pad arrays are aligned and bonded together.

Abstract: A solid-state image sensor which comprises a pixel group in which unit pixels each including a microlens and a plurality of photo-electric converters are arrayed two-dimensionally, wherein a shielding unit that shields part of all of a plurality of photo-electric converters corresponding to a single microlens is provided in a portion of the unit pixels.

Abstract: Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The manufacturing method of an array substrate, comprising: forming a gate electrode on a base substrate by a first patterning process, and then depositing a gate insulating layer on the base substrate on which the gate electrode is formed; forming source and drain electrodes on the base substrate obtained after the above step, by a second patterning process; forming an active layer formed of a graphene layer, and a protective layer disposed on the active layer, on the base substrate obtained after the above steps, by a third patterning process; and forming a planarizing layer on the base substrate, obtained after the above steps, by a fourth patterning process, in which the planarizing layer is provided with a through hole through which the source or drain electrode is exposed.

Abstract: A unit pixel of an image sensor is provided. The unit pixel includes a photoelectric conversion element configured to generate photocharge varying with the intensity of incident light, a transfer transistor configured to transfer the photocharge to a floating diffusion in response to a transfer control signal, and a supplemental transistor connected to the floating diffusion. Because the unit pixel includes only one transistor in addition to the transfer transistor, the area of the unit pixel is minimized, and, as a result, the resolution of a pixel array is increased and the power consumption of the pixel array is decreased.

Abstract: Disclosed herein is a solid-state imaging device including, a first semiconductor region of the first conduction type, a photoelectric conversion part having a second semiconductor region of the second conduction type formed in the region separated by the isolation dielectric region of the first semiconductor region, pixel transistors formed in the first semiconductor region, a floating diffusion region of the second conduction type which is formed in the region separated by the isolation dielectric region of the first semiconductor region, and an electrode formed on the first semiconductor region existing between the floating diffusion region and the isolation dielectric region and is given a prescribed bias voltage.

Abstract: According to one embodiment, a solid-state image sensing device includes a semiconductor substrate having a first and second surface, an insulating film covering an element on the first surface, a pixel array including pixels configured to photoelectrically convert light applied on the side of the second surface, contact regions in the semiconductor substrate, one or more through-electrodes respectively provided in the contact regions, and first pads provided on the side of the second surface to correspond to the respective contact regions. The first pad extends in a first direction from the contact regions toward the pixel array.

Abstract: A photoelectric conversion device includes circuit portions disposed on a substrate, a first electrode electrically connected to one of the circuit portions, an optically transparent second electrode opposing the first electrode, and a photoelectric conversion portion disposed between the first electrode and the second electrode. The photoelectric conversion portion has a multilayer structure including a light absorption layer made of a p-type compound semiconductor film having a chalcopyrite structure, an amorphous oxide semiconductor layer, and a window layer made of an n-type semiconductor film.

Abstract: A correlated double sampling (CDS) circuit includes a correction circuit configured to receive an input pixel signal through a first node via a column line, correct the input pixel signal, and output the corrected pixel signal through a second node; and a comparator including first and second input terminals, the first input terminal being connected to the second node and being configured to receive the corrected pixel signal, and the second input terminal configured to receive a ramp signal, the comparator being configured to compare the corrected pixel signal with the ramp signal and output a comparison signal indicating a result of the comparing, wherein the correction circuit includes, a first capacitor connected between the first and second nodes, and one or more metal lines disposed adjacent to the first capacitor, and wherein at least one other capacitor is formed by the first capacitor and the metal line.

Abstract: In a photoelectric conversion apparatus including a plurality of pixels arranged in a matrix, each pixel including a photoelectric conversion unit, first and second holding units that hold electric charge, a first transfer unit that connects the photoelectric conversion unit and the first holding unit, a second transfer unit that connects the first and second holding units, and a third transfer unit that connects the photoelectric conversion unit and a power supply, each pixel is controlled so that the potential of the third transfer unit for electric charge held in the photoelectric conversion unit is higher than that of the first transfer unit at least during a charge accumulation period of the pixel, and thereafter, the potential of the third transfer unit is higher than that of the photoelectric conversion unit while the potentials of the first and second transfer units are lower than that of the photoelectric conversion unit.

Abstract: A semiconductor device includes a semiconductor substrate, a plurality of photoelectric conversion elements arranged on the semiconductor substrate to collectively form an image sensor, a plurality of trenches each formed between the photoelectric conversion elements adjacent to each other, and a plurality of impurity diffusion layers each provided at a bottom of the trench at a position deeper than a p-n junction of the photoelectric conversion element.

Abstract: A multi-chip package may include an image sensor chip, an image signal processor (ISP) chip, a cover glass, and a package substrate. The ISP chip may be placed on the substrate. The image sensor chip may be placed over the ISP chip. An adhesive film may be formed between the ISP and image sensor chips. A cover glass may be suspended above the image sensor chip. The ISP chip and the image sensor chip may be wire bonded to the substrate. The multi-chip package may be hermetically sealed using a liquid compound or a dam structure. During normal operation, the ISP chip sends control signals to the image sensor chip via a first set of wire bond members and conductive traces in the substrate while the image sensor chip sends output signals to the ISP chip via a second set of wire bond terminals and conductive traces in the substrate.

Abstract: A back-side illuminated image sensor formed from a thinned semiconductor substrate, wherein: a transparent conductive electrode, insulated from the substrate by an insulating layer, extends over the entire rear surface of the substrate; and conductive regions, insulated from the substrate by an insulating coating, extend perpendicularly from the front surface of the substrate to the electrode.

Abstract: An organic light emitting display device includes a first substrate including a pixel area and a non-pixel area; a pixel array formed on the pixel area of the first substrate; a protective layer formed over the pixel array, and having a trench that exposes at least a portion of the non-pixel area; a second substrate disposed above the first substrate; a sealing material disposed between the second substrate and the protective layer at the outside of the trench; and a getter disposed between the second substrate and the first substrate exposed by the trench. Moisture and/or oxygen penetrated through the sealing material and the protective layer, which are disposed at a side of the organic light emitting display device, are absorbed into the getter, thereby improving the lifespan of the organic light emitting display device.

Abstract: An array substrate, a manufacturing method, and a display device thereof are disclosed.

Abstract: An image sensor device comprises an isolation well region within a substrate. A gate stack is over the isolation well region on the first surface of the substrate. The gate stack has an edge. A doped isolation feature is within the substrate between the isolation well region and the gate stack. The doped isolation feature surrounds an active area. The gate stack is over the active area. The doped isolation feature extends from the edge of the gate stack under the gate stack.

Abstract: Provided are a solid-state imaging element, which suppresses occurrence of a dark current and a white spot and even suppresses occurrence of a residual image, and a manufacturing method for the solid-state imaging element. A solid-state imaging element (1) is provided with: a gate electrode (4) above a substrate (2); a charge storage region (5) formed at a position inside the substrate (2) and apart from a top surface (2a) of the substrate (2); a read region (6) formed at a position inside the substrate (2) and on the opposite side to the charge storage region (5) with the gate electrode (4) interposed therebetween; a channel region (7, 8) formed inside the substrate (2) and immediately below the gate electrode (4); and a shield region (9) and an intermediate region (10) formed inside the substrate (2) and between the top surface (2a) of the substrate (2) and the charge storage region (5).

Abstract: The present invention relates to a thin film transistor substrate and method for fabricating the same which can secure an alignment margin and reduce the number of mask steps. A thin transistor substrate according to the present invention includes a gate line and a data line crossing each other to define a pixel, a gate metal pattern under the data line, a thin film transistor having a gate electrode, a source electrode and a drain electrode in the pixel, and a pixel electrode connected to the drain electrode of the thin film transistor by a connection electrode, wherein the data line has a plurality of first slits to disconnect the gate metal pattern from the gate line.

Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Abstract: In the case of using an analog buffer circuit, an input voltage is required to be added a voltage equal to a voltage between the gate and source of a polycrystalline silicon TFT; therefore, a power supply voltage is increased, thus a power consumption is increased with heat. In view of the foregoing problem, the invention provides a depletion mode polycrystalline silicon TFT as a polycrystalline silicon TFT used in an analog buffer circuit such as a source follower circuit. The depletion mode polycrystalline silicon TFT has a threshold voltage on its negative voltage side; therefore, an input voltage does not have to be increased as described above. As a result, a power supply voltage requires no increase, thus a low power consumption of a liquid crystal display device in particular can be realized.

Abstract: According to embodiments of the present invention, there are provided a TFT array substrate, a method for manufacturing the TFT array substrate and an electronic device.