With Shield, Filter, Or Lens Patents (Class 257/294)
  • Patent number: 7161592
    Abstract: A pixel electrode and a thin film transistor connected to the electrode are provided above one substrate. A shading film is provided above another substrate. The shading film has an overhanging portion defining a corner cutting in an opening area of each pixel in the crossing area where the data line and the scan line cross with each other. A channel region of the thin film transistor is arranged in the crossing areas. Thus, light resistance is enhanced and a high-grade image is displayed in an electro-optical apparatus.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: January 9, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Masao Murade
  • Patent number: 7161129
    Abstract: An image capture device includes a focusing lens, a light sensor array having a plurality of pixels arranged in a matrix of rows and columns and a plurality of optical components. Each optical component is configured to focus light on a light-sensing portion of one of the pixels. The locations of the optical components define a grid of parallel and perpendicular lines and a line spacing of the grid varies as a function of a distance from an optical axis of the focusing lens.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: January 9, 2007
    Assignee: Transchip, Inc.
    Inventors: Tiberiu Galambos, Eugene Fainstain, Alex Shnayder, Yair Elmakias
  • Patent number: 7157759
    Abstract: A solid-state imaging device comprises: photoelectric converting regions, wherein each of the photoelectric converting regions includes first photoelectric converting regions and second photoelectric converting regions arranged in row and column directions; and microlenses each of which being formed above and covering each of the first photoelectric converting regions, wherein each of the second photoelectric converting regions is placed between ones of the microlenses covering adjacent ones of the first photoelectric converting regions, a length in a first direction with respect to an opening center of each of the second photoelectric converting regions is longer than a length in a second direction with respect to the same, and among directions of incidence in a plan view of light entering the second photoelectric converting regions, the microlenses blocks the light along the first direction by a highest degree and blocks the light along the second direction by a lowest degree, respectively.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: January 2, 2007
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Hirokazu Kobayashi
  • Patent number: 7157742
    Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: January 2, 2007
    Assignee: Tessera Technologies Hungary Kft.
    Inventor: Avner Badehi
  • Patent number: 7157686
    Abstract: An optical receiver is provided to receive light signals in a specific frequency range and transform into an electric current. The optical receiver has a photo diode with a sensitization area coated with an anti-reflection film and a filter film. The filter film allows a light of a specific frequency range to go through. In comparison with a filter lens used in prior arts, the optical receiver using the filter film has a comparatively smaller volume.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: January 2, 2007
    Assignee: Delta Electronics, Inc.
    Inventor: Yu-Hong Shiu
  • Patent number: 7154136
    Abstract: Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 ?m into the substrate. The isolating structure prevents photons and electrons originating in peripheral circuitry from reaching the active area. Where the substrate has a heavily-doped lower layer and an upper layer on it, the trench can extend through the upper layer to the lower layer. A thermal oxide can be grown on the trench walls. A liner can also be deposited on the sidewalls of each trench. A fill material having a high-extinction coefficient is then deposited over the liner. The liner can also be light absorbent so that both the liner and fill material block photons.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: December 26, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Bryan G. Cole, Troy Sorensen
  • Patent number: 7148509
    Abstract: A TFT array panel is provided, including an insulating substrate, gate lines horizontally provided on the insulating substrate, data lines isolated from the gate lines and intersecting the gate lines, a pixel electrode in a pixel region defined by intersecting the gate lines and data lines, a TFT for transmitting or intercepting an image signal transmitted through the plurality of data lines to the pixel electrode in response to a scanning signal transmitted from the plurality of gate lines, a transmission gate for distributing the image signal input from an input line to the plurality of data lines, and a repair line intersecting the input line of the transmission gate. Therefore, since the input repair line and the input line of the transmission gate are intersected, a parasitic capacitance occurring between the repair line and the input line of the transmission gate can be reduced.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: December 12, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul-Ho Kim, Il-Gon Kim, Cheol-Min Kim, Tae-Hyeong Park
  • Patent number: 7148510
    Abstract: A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from escaping into a film or electrode adjacent to the interlayer insulating film. A TFT is formed and then a nitrogen-containing inorganic insulating film that transmits less moisture compared to organic resin film is formed so as to cover the TFT. Next, organic resin including photosensitive acrylic resin is applied and an opening is formed by partially exposing the organic resin film to light. The organic resin film where the opening is formed, is then covered with a nitrogen-containing inorganic insulating film which transmits less moisture than organic resin film does.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: December 12, 2006
    Assignee: Semiconductor Energy Laboratory Co. Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Masahiko Hayakawa, Kiyoshi Kato, Mitsuaki Osame, Takashi Hirosue, Saishi Fujikawa
  • Patent number: 7148529
    Abstract: A semiconductor package includes (a) an interposer, (b) a wiring layer containing conductors formed adjacent to each other at intervals that cause no short circuit among the conductors, the wiring layer covering a given area of the interposer, to block light from passing through the given area, (c) a light blocking layer covering a no-wiring area of the interposer not covered by the wiring layer, to block light from passing through the no-wiring area, (d) a semiconductor chip electrically connected to the wiring layer, and (e) a resin mold sealing the wiring layer, the light blocking layer, and the semiconductor chip.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: December 12, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuru Oida, Masatoshi Fukuda, Yasuhiro Koshio, Hiroshi Funakura
  • Patent number: 7138618
    Abstract: A solid-state image pickup device 20 according to the present invention includes a plurality of light-receiving sensor portions 2 arrayed in the horizontal and vertical directions and interconnection layers of a plurality of layers formed through interlayer insulators so as to form opening portions 423 at their portions corresponding to the respective light-receiving sensor portions 2, wherein the opening portions 423 of the uppermost layer of the interconnection layer are shifted from the light-receiving sensor portions 2 toward the center of the image pickup area in any one direction of the horizontal direction or the vertical directions. Thus, it is possible to provide a solid-state image pickup device and an image pickup camera including this solid-state image pickup device capable of restraining shading while interconnection and layout of interconnection layers are being facilitated.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: November 21, 2006
    Assignee: Sony Corporation
    Inventors: Koji Mishina, Ryoji Suzuki
  • Patent number: 7126175
    Abstract: A semiconductor device comprising: a first light shielded region including a first semiconductor element, the first light shielded region being defined by a first light shielding wall provided in the periphery thereof; a second light shielded region including a second semiconductor element, the second light shielded region being defined by a second light shielding wall provided in the periphery thereof and being provided in a position adjacent to the first light shielded region; a first opening provided in the first light shielding wall; a second opening provided in the second light shielding wall and positioned facing to the first opening; a first wiring layer coupled with the first semiconductor element and brought out to the outside of the first light shielded region from the first opening; a second wiring layer coupled with the second semiconductor element and brought out to the outside of the second light shielded region from the second opening; and a light shielding film provided at least above a region
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: October 24, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Susumu Inoue, Yo Takeda, Yutaka Maruo
  • Patent number: 7110034
    Abstract: An image pickup apparatus comprises a plurality of photoelectric conversion areas, and a light adjustment area including a first transmission portion for transmitting light which is provided in association with a first photoelectric conversion area included in the plurality of photoelectic conversion areas and a second transmission portion for transmitting light which is provided in association with a second photoelectric conversion area included in the plurality of photoelectric conversion areas. The light adjustment area is configured to cause a part of light incident on the second transmission portion to be incident on the first transmission portion.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: September 19, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yasuo Suda
  • Patent number: 7102185
    Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: September 5, 2006
    Assignee: Eastman Kodak Company
    Inventors: David N. Nichols, David L. Losee, Christopher Parks
  • Patent number: 7091532
    Abstract: An image sensor includes a substrate containing photosensitive areas; an insulator spanning the substrate; and a first and second layer of a multi-layer metalization structure wherein the first layer forms the light shield regions over portions of the photosensitive area as well as forming circuit interconnections and barrier regions to prevent spiking into the substrate or gates at contacts in the non-imaging area, and the second layer spanning the interconnections and barrier regions of the first layer only over the non-imaging area.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: August 15, 2006
    Assignee: Eastman Kodak Company
    Inventor: Eric G. Stevens
  • Patent number: 7087945
    Abstract: A process for manufacturing a semiconductor device comprising the steps of: forming a transparent film on a semiconductor substrate including a photoelectric conversion section, the transparent film having a concave portion above the photoelectric conversion section; forming a material film on the transparent film, the material film being made of a photosensitive material having a refractive index higher than that of the transparent film; and irradiating selectively a predetermined portion of the material film with rays, and then developing the material film, whereby forming an intralayer lens having a convex portion facing into the concave portion.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: August 8, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junichi Nakai, Tetsuro Aoki
  • Patent number: 7084445
    Abstract: A mechanism and methodology is provided for performing high-throughput thin-film experimentation with the use and integration of a heater. A single flange assembly contains an automated two-dimensional shutter system (which provides variable masking schemes for spatially selective shadow deposition) and a rotatable (indexed) chip/wafer/substrate heater. The automated two-dimensional shutter system comprises two shutter plate mounts that move in two perpendicular (x and y) directions, so that mounted shutters overlap with each other in certain regions. The substrate heater can be used in the gradient temperature mode or uniform temperature mode. The shutter plates and the heater plate are detachable and exchangeable from experiment to experiment in order to minimize cross contamination of materials.
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: August 1, 2006
    Assignee: University of Maryland
    Inventors: Ichiro Takeuchi, Russell W. Wood, Ratnakar D. Vispute
  • Patent number: 7078779
    Abstract: A semiconductor device including a substrate having a plurality of image sensing elements formed therein, a plurality of spaced apart color filters overlying the substrate and a light blocking material interposed between adjacent spaced apart color filters.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: July 18, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Wen-De Wang, Dun-Nian Yaung, Tzu-Hsuan Hsu
  • Patent number: 7078260
    Abstract: CMOS image sensors and methods for fabricating the same are disclosed. A disclosed CMOS image sensor comprises: a semiconductor substrate; a photo diode; a microlens located over the photo diode; and a color filter layer located over the microlens.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: July 18, 2006
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: In Gyun Jeon
  • Patent number: 7078753
    Abstract: It is an object of this invention to provide the structure of an image sensor capable of efficiently collecting light in the center and in the periphery of an imaging plane. To achieve this object, an image sensor includes a plurality of photoelectric conversion portions, a high refractive index portion having a first portion formed into the shape of a pillar and a taper shape portion whose aperture area increases toward a side close to a photographing lens, and a low refractive index portion placed around the high refractive index portion.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: July 18, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hideki Dobashi
  • Patent number: 7075773
    Abstract: It is an object of the present invention to provide a ferroelectric capacitor which maintains high ferroelectricity. A silicon oxide layer 2, a lower electrode 12, a ferroelectric layer 8 and an upper electrode 10 are formed on a silicon substrate 2. The lower electrode 12 is formed by an alloy layer made of iridium and platinum. The alloy layer of the lower electrode 12 can be formed under appropriate lattice constant correspond with a kind and composition of the ferroelectric layer 8. So that, a ferroelectric layer having excellent ferroelectricity can be obtained. Also, it is possible to prevent vacancy of oxygen in the ferroelectric layer 8.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: July 11, 2006
    Assignee: Rohm Co., Ltd.
    Inventor: Takashi Nakamura
  • Patent number: 7061034
    Abstract: In a magnetic random access memory (MRAM) having a transistor and a magnetic tunneling junction (MTJ) layer in a unit cell, the MTJ layer includes a lower magnetic layer, an oxidation preventing layer, a tunneling oxide layer, and an upper magnetic layer, which are sequentially stacked. The tunneling oxide layer may be formed using an atomic layer deposition (ALD) method. At least the oxidation preventing layer may be formed using a method other than the ALD method.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: June 13, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-jin Park, Tae-wan Kim, Jung-hyun Lee, Wan-jun Park, I-hun Song
  • Patent number: 7057262
    Abstract: An optical device having a high reflector tunable stress coating includes a micro-electromechanical system (MEMS) platform, a mirror disposed on the MEMS platform, and a multiple layer coating disposed on the mirror. The multiple layer coating includes a layer of silver (Ag), a layer of silicon dioxide (SiO2) deposited on the layer of Ag, a layer of intrinsic silicon (Si) deposited on the layer of SiO2, and a layer of silicon oxynitride (SiOxNy) deposited on the layer of Si. The concentration of nitrogen is increased and/or decreased to tune the stress (e.g., tensile, none, compressive).
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: June 6, 2006
    Assignee: Intel Corporation
    Inventor: Michael Goldstein
  • Patent number: 7053427
    Abstract: A process for producing a solid-state imaging device which includes the steps of forming a light-receiving portion of a pixel in a surface region on the substrate, forming above the light receiving portion an inter-layer dielectric having a depression in its surface, forming on the inter-layer dielectric a light transmitting film having in its surface a concave conforming to the depression, forming at the position that covers the concave on the light transmitting film a mask layer with a convexly curved surface, and etching the mask layer and the light transmitting film all together, thereby making the light transmitting film into a shape of convex lens with an upwardly curved surface.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: May 30, 2006
    Inventor: Kouichi Tanigawa
  • Patent number: 7030918
    Abstract: The present invention discloses a solid-state image pickup device in which a photoelectric conversion part having a photoelectric conversion region, and a logic circuit part are formed on a semiconductor substrate, and outputs a potential change caused by the charges generated in the photoelectric conversion region, and is provided with a light shielding layer that covers the logic circuit part, and a light shielding film that defines the region of beam incidence on the photoelectric conversion region, where the light shielding film is provided closer to the semiconductor substrate than the light shielding layer.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: April 18, 2006
    Assignee: NEC Electronics Corporation
    Inventor: Yasutaka Nakashiba
  • Patent number: 7023017
    Abstract: A thin film transistor substrate of horizontal electric field type includes: a gate line and a first common line formed on a substrate to be in parallel to each other; a data line crossing the gate line and the first common line with a gate insulating film therebetween to define a pixel area; a second common line crossing the first common line having the gate insulating film therebetween; a thin film transistor connected to the gate line and the data line; a common electrode extending from the second common line in said pixel area; a pixel electrode that is parallel to the common electrode and the second common line; a protective film for covering the thin film transistor; a gate pad having a lower gate pad electrode connected to an upper gate pad electrode through a first contact hole; a common pad having a lower common pad electrode connected to an upper common pad electrode through a second contact hole; and a data pad having a lower data pad electrode connected to an upper data pad electrode provided with
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: April 4, 2006
    Assignee: LG. Philips LCD Co., LTD
    Inventors: Byung Chul Ahn, Oh Nam Kwon, Heung Lyul Cho
  • Patent number: 7019374
    Abstract: A compact imaging module comprising a case having a lens holding barrel portion, an optical system member housed in the lens holding barrel portion, a circuit substrate having a wiring pattern and disposed in an image side of the optical system member, a plurality of electrodes disposed on the circuit substrate, an imaging sensor mounted on a surface of the circuit substrate, an opposite side of the contained optical system member, and a frame member provided on a periphery of the circuit substrate, the case including a substrate mounting surface having a sensor window, the circuit substrate being attached to the substrate mounting surface of the case, the frame member including conductive electrodes to guide out a signal of the imaging sensor mounted on the circuit substrate.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: March 28, 2006
    Assignee: Citizen Electronics Co., Ltd.
    Inventors: Yasuaki Kayanuma, Akihito Watanabe
  • Patent number: 6998660
    Abstract: An array of vertical color filter (VCF) sensor groups, each VCF sensor group including at least two vertically stacked, photosensitive sensors. Preferably, the array is fabricated, or the readout circuitry is configured (or has a state in which it is configured), to combine the outputs of sensors of multiple sensor groups such that the array emulates a conventional array of single-layer sensors arranged in a Bayer pattern or other single-layer sensor pattern, and such that the outputs of at least substantially all of the sensors of each of the VCF sensor groups are utilized to emulate the array of single-layer sensors.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: February 14, 2006
    Assignee: Foveon, Inc.
    Inventors: Richard F. Lyon, Richard B. Merrill
  • Patent number: 6995800
    Abstract: In order to prevent an image quality from being lowered by shading and or the like, an image pickup apparatus is provided which includes an image pickup area including a plurality of photoelectric conversion areas, a plurality of converging lenses for converging light on a plurality of photoelectric conversion areas, and a light shielding area having a plurality of opening areas through which light is incident upon the plurality of photoelectric conversion areas, wherein positions of the converging lens and opening area are shifted inward than a corresponding photoelectric conversion area.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: February 7, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hidekazu Takahashi, Tetsunobu Kochi
  • Patent number: 6974973
    Abstract: An imager temperature sensor and a current correction apparatus are provided which use dark pixel measurements from an imager chip during operation together with a fabrication process constant as well as a chip dependent constant to calculate chip temperature. The chip temperature may be used to generate a current correction signal. The correction signal is used to tune a current on the imager chip to correct for temperature variations.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: December 13, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Giuseppe Rossi, Gennadiy A. Agranov
  • Patent number: 6970293
    Abstract: In a solid state imaging device, sensitivity deterioration (shading) of the periphery of the imaging region is planned to be improved. An on-chip micro lens 28 corresponding to each sensor portion 23 in an imaging region 42 is comprised and the center of the reduction magnification of the exit pupil correction which is performed for the on-chip micro lens 28 is set to a position O deviated from the center of the imaging region 42.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: November 29, 2005
    Assignee: Sony Corporation
    Inventor: Taichi Natori
  • Patent number: 6967345
    Abstract: A quantum well infrared photodetector (QWIP) that provides two-color image sensing. Two different quantum wells are configured to absorb two different wavelengths. The QWIPs are arrayed in a focal plane array (FPA). The two-color QWIPs are selected for readout by selective electrical contact with the two different QWIPs or by the use of two different wavelength sensitive gratings.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: November 22, 2005
    Assignee: California Institute of Technology
    Inventors: Sarath D. Gunapala, Kwong Kit Choi, Sumith V. Bandara
  • Patent number: 6965136
    Abstract: An embodiment of the invention is a method to reduce light induced corrosion and re-deposition of a metal, 8, (such as copper) that is used to make the interconnect wiring during the semiconductor manufacturing process. The light induced corrosion and re-deposition is caused by the exposure of a P-N junction to light, causing a photovoltaic effect. A photon-blocking layer, 13, is used in the invention to reduce the amount of exposure of the P-N junction to light. The photon blocking layer, 13, of the invention may be a direct band-gap material with a band-gap energy that is less than the lower edge of the energy spectrum of a typical light source used in the semiconductor manufacturing facility (typically less than 1.7 eV).
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: November 15, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Yaojian Leng, Honglin Guo, Joe W. McPherson
  • Patent number: 6958862
    Abstract: An improved optical imaging system includes a vertically stacked pixel array and a lenslet array for capturing images while minimizing the focal length. The vertically stacked pixel array is configured to operate as an image sensor. The lenslet array is configure to focus the image on the image sensor. Each lens of the lenslet array focuses an image on a sub-array of the image sensor. Each sub-array is shifted from one another so that additional data obtained for each equivalent pixel in each sub-array. An image is obtained by combining the data of each sub-array.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: October 25, 2005
    Assignee: Foveon, Inc.
    Inventor: Domenick Montalbo Joseph
  • Patent number: 6953949
    Abstract: An electro-optical device according to the present invention includes, above a substrate, pixel electrodes, thin film transistors connected to the pixel electrodes, an upper light shielding film to cover the upper side of the channel regions of the thin film transistors, and a lower light shielding film to cover the lower side of the channel regions of the thin film transistors. Each of the upper light shielding film and the lower light shielding film has projecting portions to define corner cuts in an opening region of each pixel, in the intersection regions where data lines and scanning lines intersect each other. Both projecting portions are connected to each other through contact holes. The channel region of the thin film transistors are disposed in the intersection regions.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: October 11, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Masao Murade
  • Patent number: 6952022
    Abstract: The present invention relates to an image sensor comprising an amorphous silicon thin-film transistor optical sensor which functions as an image sensor used for an X-ray photography device, a fingerprint recognition apparatus, a scanner, etc., and a method of manufacturing the image sensor. Since the thin-film transistor optical sensor according to the present invention has a high-resistance silicon region by disposing an offset region in a channel region, a dark leakage current of the optical sensor remains in a low level even under a high voltage. Therefore, it is possible to apply a high voltage to the thin-film transistor optical sensor according to the present invention so that the image senor can be sensitive to a weak light. In addition, since the storage capacitance in the image sensor is formed in a double structure, the image sensor has a high value of capacitance.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: October 4, 2005
    Assignee: Silicon Display Technology
    Inventors: Jin Jang, Ji Ho Hur, Hyun Chul Nam
  • Patent number: 6950140
    Abstract: A photovoltaic element, a light shielding portion, a planarized layer, a color filter, another planarized layer and an undercoat layer are formed successively on a semiconductor substrate, followed by forming resin lenses. The undercoat layer positioned between adjacent resin lenses is subjected to an etching treatment with the resin lenses used as a resist mask so as to form ditches extending in the X- and Y-directions and other ditches extending in the XY-direction. Further, a transparent resin layer having a predetermined thickness is formed to cover the resin lenses and the ditches, thereby obtaining a solid image-pickup device comprising a micro lens array including a plurality of micro lenses.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: September 27, 2005
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Kenzo Fukuyoshi, Tadashi Ishimatsu, Satoshi Kitamura
  • Patent number: 6940153
    Abstract: A memory card includes at least one magnetic random access memory supported by a substrate, and a memory card cover disposed over the magnetic random access memory and the substrate to form a memory card, wherein at least one of the substrate and the memory card cover includes magnetic shielding to at least partially shield the magnetic random access memory from external magnetic fields, the memory card cover forming an external portion of the memory card.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: September 6, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew M. Spencer, Connie Lemus, Colin Stobbs
  • Patent number: 6936873
    Abstract: A solid state imaging device includes a transparent insulation film. The insulation film is laminated on transfer electrodes over the power supply lines. A transparent protection film, which has a refractive index that is greater than that of the insulation film, is laminated on the insulation film. The transparent insulation film has portions above the channels in which the thickness continuously increases from the center of adjacent channels to the associated channel separating region.
    Type: Grant
    Filed: March 5, 2003
    Date of Patent: August 30, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Minoru Konishi
  • Patent number: 6930337
    Abstract: The invention also relates to an apparatus and method for selectively providing a silicide coating over the transistor gates of a CMOS imager to improve the speed of the transistor gates. The method further includes an apparatus and method for forming a self aligned photo shield over the CMOS imager.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: August 16, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 6927432
    Abstract: An exemplary system and method for providing a vertically integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS layer (420); and a photosensing element (380) fabricated in a vertically integrated optically active layer (320, 350), where the optically active layer (320, 350) is bonded to the CMOS layer (420) and the optically active layer (320, 350) is positioned near a metalization surface (405) of the CMOS layer (420). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: August 9, 2005
    Assignee: Motorola, Inc.
    Inventors: Paige M. Holm, Jon J. Candelaria
  • Patent number: 6911684
    Abstract: An image sensor having micro-lenses is disclosed. The image sensor comprises a plurality of pixels formed in a semiconductor substrate, each pixel including a light sensitive element. A micro-lens is formed over each of the light sensitive elements. Finally, a trench structure surrounds each of the micro-lenses.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: June 28, 2005
    Assignee: OmniVision International Holding Ltd
    Inventor: Katsumi Yamamoto
  • Patent number: 6912003
    Abstract: A method and circuit for compensating variations induced by temperature, strain and manufacturing technology in CMOS video sensors. Using at least two reference CMOS sensors, held at the same temperature level as the CMOS video sensors to be compensated and which are not irradiated, two reference signals are generated whereof one corresponds to a reference dark value whilst the other one, in response to the application of an electric current, corresponds to a reference illumination value. The reference signals are amplified separately of each other. At least one correction value is stored in a memory unit for each CMOS video sensor point to be compensated, such that output signals corrected by FPN (=fixed pattern noise) will be obtained. The FPN-corrected output signals as well as the reference signals obtained are supplied to the A/D converter where the output signals of the CMOS video sensor are compensated and converted into digital signals.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: June 28, 2005
    Assignee: Institute for Mikroelektronik
    Inventors: Uwe Apel, Ulrich Seger, Heinz-Gerd Graf, Udo Postel, Hans-Jörg Schönherr, Armin Armbruster
  • Patent number: 6906364
    Abstract: A structure of a CMOS image sensory device is described. A photodiode sensory region and a transistor device region are isolated from each other by an isolation layer formed in the substrate. A gate structure is located on the transistor device region, and a source/drain region is in the transistor device region beside the side of the gate structure. A doped region is in the photodiode sensory region. A self-aligned block is located on the photodiode sensory region and a protective layer is formed on the entire substrate.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: June 14, 2005
    Assignee: United Microelectronics Corp.
    Inventors: Chong-Yao Chen, Chen-Bin Lin, Feng-Ming Liu
  • Patent number: 6903395
    Abstract: A semiconductor device including an overcoat layer of a transparent material disposed on a substrate, a projection formed on the overcoat layer, a convex intralayer lens of an inorganic material formed to include the projection as a core and a transparent film with a flat top surface formed on the convex intralayer lens.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: June 7, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junichi Nakai, Fujio Agoh
  • Patent number: 6902945
    Abstract: A sensor may be formed with a transistor comprising a gate that has both n-type and p-type regions to increase the gate work function. In combination with moving the p-type well such that the p-type well only partially dopes the channel of the transistor, the increased gate work function further increases the reset voltage level required to create the reset channel without having to use high doping levels in the critical regions of the sensor structure including the photo-detector and the reset transistor. The source of the reset transistor is partially beneath the n-type region of gate, while the transistor's drain is partially beneath the p-type region of the gate. The channel has a p-type well portion and a substrate portion. This construction of the sensor may eliminate the reset noise associated with the uncertainty of whether the charge left in the transistor's channel will flow back towards the photo-detector after the transistor has been turned off.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: June 7, 2005
    Assignee: ESS Technology, Inc.
    Inventors: Richard A. Mann, Lester J. Kozlowski
  • Patent number: 6891214
    Abstract: A semiconductor power module capable of efficiently utilizing the performance of the module and facilitating management of the module in custody. The semiconductor power module having one or more semiconductor power switching elements and a drive unit is provided with a non-volatile memory for storing use history of the module and a drive unit. The use history contains information of one of the number of switching times of the semiconductor power switching element, the number of over-current detections of the semiconductor power switching element and a temperature rise of the semiconductor power module.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: May 10, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhisa Mori, Takashi Ikimi, Shuji Katoh, Yutaka Sato
  • Patent number: 6888184
    Abstract: A magnetic memory fabricated on a semiconductor substrate is disclosed. The method and system include a plurality of magnetic tunneling junctions and a plurality of shields for magnetically shielding the plurality of magnetic tunneling junctions. Each of the plurality of magnetic tunneling junctions includes a first ferromagnetic layer, a second ferromagnetic layer and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer. At least a portion of the plurality of shields have a high moment and a high permeability and are conductive. The plurality of shields are electrically isolated from the plurality of magnetic tunneling junctions. The plurality of magnetic tunneling junctions are between the plurality of shields.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: May 3, 2005
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Xizeng Shi, Matthew Gibbons, Hua-Ching Tong, Kyusik Sin
  • Patent number: 6876049
    Abstract: Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: April 5, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co.
    Inventors: Yang-Tung Fan, Chiou-Shian Peng, Cheng-Yu Chu, Shih-Jane Lin, Yen-Ming Chen, Fu-Jier Fan, Kuo-Wei Lin
  • Patent number: 6872975
    Abstract: An active matrix driven electro-optical device, such as a liquid crystal device, enabled to add sufficient storage capacitance to pixel electrodes and decrease the diameter of contact holes connecting with pixel electrodes even when a fine pixel pitch is employed. The liquid crystal device has TFTs, data lines, scanning lines, storage capacitor lines, and pixel electrodes provided on a TFT array substrate. Each of the pixel electrodes is electrically connected to one of the TFTs by two contact holes through a barrier layer. A part of a semiconductor layer and each of the capacitor lines sandwich a first dielectric film and constitute a first storage capacitor, while a part of the barrier layer and each of the capacitor lines sandwich a second dielectric film and constitute a second storage capacitor.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: March 29, 2005
    Assignee: Seiko Epson Corporation
    Inventor: Masao Murade
  • Patent number: 6867435
    Abstract: Microoptical systems with clear aperture of about one millimeter or less are fabricated from a layer of photoresist using a lithographic process to define the optical elements. A deep X-ray source is typically used to expose the photoresist. Exposure and development of the photoresist layer can produce planar, cylindrical, and radially symmetric micro-scale optical elements, comprising lenses, mirrors, apertures, diffractive elements, and prisms, monolithically formed on a common substrate with the mutual optical alignment required to provide the desired system functionality. Optical alignment can be controlled to better than one micron accuracy. Appropriate combinations of structure and materials enable optical designs that include corrections for chromatic and other optical aberrations. The developed photoresist can be used as the basis for a molding operation to produce microoptical systems made of a range of optical materials.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: March 15, 2005
    Assignee: Sandia Corporation
    Inventors: William C. Sweatt, Todd R. Christenson