Physical Deformation Patents (Class 257/415)
  • Patent number: 10486963
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die, a multilayer redistribution structure, a first mold compound, and a second mold compound. The first thinned die resides over a top surface of the multilayer redistribution structure. The multilayer redistribution structure includes at least one support pad that is on a bottom surface of the multilayer redistribution structure and vertically aligned with the first thinned die. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: November 26, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Merrill Albert Hatcher, Jr., Jonathan Hale Hammond, Jon Chadwick, Julio C. Costa, Jan Edward Vandemeer
  • Patent number: 10475640
    Abstract: Provided herein is a method for manufacturing a semiconductor device. A substrate including a MEMS region and a connection region thereon is provided; a dielectric layer disposed on the substrate in the connection region is provided; a poly-silicon layer disposed on the dielectric layer is provided, wherein the poly-silicon layer serves as an etch-stop layer; a connection pad disposed on the poly-silicon layer is provided; and a passivation layer covering the dielectric layer is provided, wherein the passivation layer includes an opening that exposes the connection pad and a transition region between the connection pad and the passivation layer, and a conductive layer conformally covering the connection pad and the poly-silicon layer in the transition region is provided.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: November 12, 2019
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Yan-Da Chen, Weng Yi Chen, Chang-Sheng Hsu, Kuan-Yu Wang, Yuan Sheng Lin
  • Patent number: 10457550
    Abstract: A microelectromechanical system (MEMS) device may include a MEMS structure over a first substrate. The MEMS structure comprises a movable element. Depositing a first conductive material over the first substrate and etching trenches in a second substrate. Filling the trenches with a second conductive material and depositing a third conductive material over the second conductive material and the second substrate. Bonding the first substrate and the second substrate and thinning a backside of the second substrate which exposes the second conductive material in the trenches.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: October 29, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Chih Liang, Chia-Hua Chu, Te-Hao Lee, Jiou-Kang Lee, Chung-Hsien Lin
  • Patent number: 10455748
    Abstract: A high-frequency module includes a wiring board, a component that is mounted on an upper surface of the wiring board, a sealing resin layer that is laminated on the upper surface of the wiring board and that seals the component, a first shield layer that is laminated on the sealing resin layer so as to cover an opposite surface of the sealing resin layer and a peripheral side surface of the sealing resin layer, the opposite surface being opposite to the upper surface of the wiring board, and a second shield layer that is laminated on a portion of the first shield layer that covers the peripheral side surface of the sealing resin layer. In this case, even if the first shield layer cannot be made thick enough for obtaining desired shield characteristics, the second shield layer can provide a thickness corresponding to the insufficient thickness.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: October 22, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Issei Yamamoto
  • Patent number: 10453766
    Abstract: This disclosure provides devices and methods for 3-D device packaging with backside interconnections. One or more device elements can be hermetically sealed from an ambient environment, such as by vacuum lamination and bonding. One or more via connections provide electrical interconnection from a device element to a back side of a device substrate, and provide electrical interconnection from the device substrate to external circuitry on the back side of the device. The external circuitry can include a printed circuit board or flex circuit. In some implementations, an electrically conductive pad is provided on the back side, which is electrically connected to at least one of the via connections. In some implementations, the one or more via connections are electrically connected to one or more electrical components or interconnections, such as a TFT or a routing line.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: October 22, 2019
    Assignee: OBSIDIAN SENSORS, INC.
    Inventors: Yaoling Pan, Tallis Young Chang, John Hyunchul Hong
  • Patent number: 10442684
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die, a multilayer redistribution structure, a first mold compound, and a second mold compound. The first thinned die resides over a top surface of the multilayer redistribution structure. The multilayer redistribution structure includes at least one support pad that is on a bottom surface of the multilayer redistribution structure and vertically aligned with the first thinned die. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: October 15, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Merrill Albert Hatcher, Jr., Jonathan Hale Hammond, Jon Chadwick, Julio C. Costa, Jan Edward Vandemeer
  • Patent number: 10448168
    Abstract: A microphone includes a substrate, an opening extending through the substrate, a first electrode plate layer on the opening, a second electrode plate layer spaced apart from the first electrode plate layer, a support structure layer on the substrate including an electrode attachment portion operable to attach the second electrode plate layer and a stopper operable to block contact between the first electrode plate layer and the second electrode plate layer, a cavity delineated by the support structure layer, the first electrode plate layer, and the substrate, and a conductive material layer on the support structure layer and spaced apart from the second electrode plate layer. The microphone has a significantly lower leakage current than conventional semiconductor microphones.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: October 15, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventor: Qiang Wang
  • Patent number: 10395164
    Abstract: There is provided a fingerprint sensing module comprising a fingerprint sensor device having a sensing array arranged on a first side of the device. The fingerprint sensor device also comprises connection pads for connecting the fingerprint sensor device to external circuitry and a fingerprint sensor device cover structure, the cover structure having a first side configured to be touched by a finger, and a second side facing the sensing array, wherein the cover structure comprises conductive traces, arranged on the second side, for electrically connecting the fingerprint sensor module to external circuitry, and wherein a surface area of the cover structure is larger than a surface area of the sensor device. Moreover, the fingerprint sensor device comprises wire-bonds electrically connecting the connection pads of the fingerprint sensing device to the conductive traces of the cover structure.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: August 27, 2019
    Assignee: Fingerprint Cards AB
    Inventors: Nils Lundberg, Zhimin Mo, Mats Slottner
  • Patent number: 10377627
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die, a multilayer redistribution structure, a first mold compound, and a second mold compound. The first thinned die resides over a top surface of the multilayer redistribution structure. The multilayer redistribution structure includes at least one support pad that is on a bottom surface of the multilayer redistribution structure and vertically aligned with the first thinned die. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: August 13, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Merrill Albert Hatcher, Jr., Jonathan Hale Hammond, Jon Chadwick, Julio C. Costa, Jan Edward Vandemeer
  • Patent number: 10373884
    Abstract: The fan-out semiconductor package includes: a semiconductor chip having an active surface having a connection pad disposed thereon and an inactive surface disposed to oppose the active surface; a first capacitor disposed adjacently to the semiconductor chip; an encapsulant at least partially encapsulating the first connection member and the semiconductor chip; a first connection member disposed on the encapsulant, the first capacitor, and the semiconductor chip, and a second capacitor disposed on the other surface of the first connection member opposing one surface of the first connection member on which the semiconductor chip is disposed, wherein the first connection member includes a redistribution layer electrically connected to the connection pad of the semiconductor chip, the first capacitor, and the second capacitor, and the first capacitor and the second capacitor are electrically connected to the connection pad through a common power wiring of the redistribution layer.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: August 6, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Han Kim, Mi Ja Han, Kang Heon Hur, Young Gwan Ko
  • Patent number: 10370241
    Abstract: A physical quantity detection device includes a semiconductor element and a physical quantity detection vibrator element a portion of which overlaps the semiconductor element in a plan view of the semiconductor element. The physical quantity detection vibrator element includes a drive portion including a drive electrode, and a detection portion. At least a partial region of the drive electrode does not overlap the semiconductor element in the plan view of the semiconductor element.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: August 6, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Shinya Aoki
  • Patent number: 10358340
    Abstract: Integrated circuits having shielded micro-electromechanical system (MEMS) devices and method for fabricating shielded MEMS devices are provided. In an example, an integrated circuit having a shielded MEMS device includes a substrate, a ground plane including conductive material over the substrate, and a dielectric layer over the ground plane. The integrated circuit further includes a MEMS device over the ground plane. Also, the integrated circuit includes a conductive pillar through the dielectric layer and in contact with the ground plane. The integrated circuit includes a metallic thin film over the MEMS device and in contact with the conductive pillar, wherein the metallic thin film, the conductive pillar and the ground plane form an electromagnetic shielding structure surrounding the MEMS device. Further, the integrated circuit includes an acoustic shielding structure over the substrate and adjacent the electromagnetic shielding structure.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: July 23, 2019
    Assignee: Globalfoundries Singapore Pte. Ltd.
    Inventors: Humberto Campanella-Pineda, Rakesh Kumar, Zouhair Sbiaa, Nagarajan Ranganathan, Ramachandramurthy Pradeep Yelehanka
  • Patent number: 10351420
    Abstract: A capacitive micro electrical mechanical system (MEMS) pressure sensor in one embodiment includes a base layer, a lower oxide layer supported by the base layer, a contact layer extending within the lower oxide layer, a membrane layer positioned generally above the lower oxide layer, the membrane layer including at least one protrusion extending downwardly through a portion of the lower oxide layer and contacting the contact layer, a nitride layer extending partially over the membrane layer, an upper oxide layer above the nitride layer, a backplate layer directly supported by the membrane layer and positioned above the upper oxide layer, a front-side etched portion exposing a first portion of the membrane layer through the upper oxide layer and the nitride layer, and a backside etched portion extending through the base layer, the backside etched portion at least partially aligned with the front-side etched portion.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: July 16, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Ando Feyh, Gary O'Brien
  • Patent number: 10356531
    Abstract: A MEMS sensor, in particular a microphone, of a piezoelectric type, formed in a membrane of semiconductor material accommodating a compliant portion, which extends from a first surface to a second surface of the membrane. The compliant portion has a Young's modulus lower than the rest of the membrane. A sensitive region having piezoelectric material extends on the first surface, over the compliant portion and is fixed at its ends to the membrane on opposite sides of the compliant portion. A third area of the membrane, arranged between the compliant portion and the second surface, forms a hinge element.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: July 16, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Domenico Giusti, Sebastiano Conti
  • Patent number: 10343897
    Abstract: An integrated package of at least one environmental sensor and at least one MEMS acoustic sensor is disclosed. The package contains a shared port that exposes both sensors to the environment, wherein the environmental sensor measures characteristics of the environment and the acoustic sensor measures sound waves. The port exposes the environmental sensor to an air flow and the acoustic sensor to sound waves. An example of the acoustic sensor is a microphone and an example of the environmental sensor is a humidity sensor.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: July 9, 2019
    Assignee: INVENSENSE, INC.
    Inventors: Julius Ming-Lin Tsai, Baris Cagdaser, Martin Lim, Aleksey S. Khenkin
  • Patent number: 10322928
    Abstract: A multi-layer sealing film for high seal yield is provided. In some embodiments, a substrate comprises a vent opening extending through the substrate, from an upper side of the substrate to a lower side of the substrate. The upper side of the substrate has a first pressure, and the lower side of the substrate has a second pressure different than the first pressure. The multi-layer sealing film covers and seals the vent opening to prevent the first pressure from equalizing with the second pressure through the vent opening. Further, the multi-layer sealing film comprises a pair of metal layers and a barrier layer sandwiched between metal layers. Also provided is a microelectromechanical systems (MEMS) package comprising the multilayer sealing film, and a method for manufacturing the multi-layer sealing film.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: June 18, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chien Yang, Ming-Lun Shih, Ren-Dou Lee, Jen-Hao Liu
  • Patent number: 10317357
    Abstract: A semiconductor-based multi-sensor module integrates miniature temperature, pressure, and humidity sensors onto a single substrate. Pressure and humidity sensors can be implemented as capacitive thin film sensors, while the temperature sensor is implemented as a precision miniature Wheatstone bridge. Such multi-sensor modules can be used as building blocks in application-specific integrated circuits (ASICs). Furthermore, the multi-sensor module can be built on top of existing circuitry that can be used to process signals from the sensors. An integrated multi-sensor module that uses differential sensors can measure a variety of localized ambient environmental conditions substantially simultaneously, and with a high level of precision. The multi-sensor module also features an integrated heater that can be used to calibrate or to adjust the sensors, either automatically or as needed.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: June 11, 2019
    Assignee: STMicroelectronics Pte Ltd.
    Inventors: Olivier Le Neel, Ravi Shankar, Suman Cherian, Calvin Leung, Tien-Choy Loh, Shian-Yeu Kam
  • Patent number: 10315916
    Abstract: Microelectromechanical and/or nanoelectromechanical device comprising a support and at least one moveable element so as to be able to be displaced translationally with respect to the support, a means (G1) for translationally guiding said element, said guiding means (G1) comprising two rigid arms (6), a rotating articulation (12, 10) between each arm (6, 8) and the moveable element (4) and a rotating articulation (10, 14) between each arm (6, 8) and the support, the guiding means (G1) also comprising a coupling articulation (18) between the two arms having at least rotating articulation, said rotating articulations having axes of rotation at least parallel with each other such that during a translational displacement of the moveable element (4) the arms (6, 8) pivot with respect to each other in opposite directions, the rotating articulations being made by torsionally deformable beams.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: June 11, 2019
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Federico Maspero, Loic Joet
  • Patent number: 10308503
    Abstract: An apparatus includes a cavity within a substrate. A MEMS structure is within the cavity, wherein the cavity includes the MEMS structure. A trench is connected to the cavity, wherein the trench is not directly opposite the MEMS structure. An oxide layer lines the trench and the cavity. A seal layer seals the trench and traps a predetermined pressure within the cavity and the trench.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: June 4, 2019
    Assignee: InvenSense, Inc.
    Inventors: Jong Il Shin, Peter Smeys, Daesung Lee
  • Patent number: 10310294
    Abstract: Methods to form a device whereon flexible component elements are attached upon three-dimensional surfaces are described. In some aspects, the present invention includes incorporating flexible semiconductor devices onto three-dimensional surfaces with electrical contacts. In some aspects, the formed device may be incorporated in an ophthalmic device.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: June 4, 2019
    Assignee: Johnson & Johnson Vision Care, Inc.
    Inventors: Randall B. Pugh, James Daniel Riall, Daniel B. Otts, Adam Toner, Frederick A. Flitsch
  • Patent number: 10302670
    Abstract: An acceleration sensor includes: a sensor section having a cap section; a sensing section including movable and fixed electrodes and movable and fixed electrode connecting sections; a peripheral section. The cap section includes a movable electrode through-hole electrode in a movable electrode through hole and a fixed electrode through-hole electrode in a fixed electrode through hole. The cap section further includes a movable electrode pad connected to the movable electrode through-hole electrode and a circuit device and a fixed electrode pad connected to the fixed electrode through-hole electrode and the circuit device. The movable electrode pad and the fixed electrode pad are adjacent to each other in a region of the cap section overlapped with the peripheral section in the stacking direction.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: May 28, 2019
    Assignee: DENSO CORPORATION
    Inventors: Naoki Yoshida, Kiyomasa Sugimoto
  • Patent number: 10294096
    Abstract: In order to manufacture a packaged device, a die having a sensitive region is bonded to a support, and a packaging mass of moldable material is molded on the support so as to surround the die. During molding of the packaging mass, a chamber is formed, which faces the sensitive region and is connected to the outside environment. To this end, a sacrificial mass of material that may evaporate/sublimate is dispensed on the sensitive region; the packaging mass is molded on the sacrificial mass; a through hole is formed in the packaging mass to extend as far as the sacrificial mass; the sacrificial mass is evaporated/sublimated through the hole.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: May 21, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventor: Federico Giovanni Ziglioli
  • Patent number: 10282585
    Abstract: A fingerprint sensor-compatible overlay material which uses anisotropic conductive material to enable accurate imaging of a fingerprint through an overlay is disclosed. The anisotropic conductive material has increased conductivity in a direction orthogonal to the fingerprint sensor, increasing the capacitive coupling of the fingerprint to the sensor surface, allowing the fingerprint sensor to accurately image the fingerprint through the overlay. Methods for forming a fingerprint sensor-compatible overlay are also disclosed.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: May 7, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Roman Ogirko, Hans Klein, David G. Wright, Igor Kolych, Andriy Maharyta, Hassane El-Khoury, Oleksandr Karpin, Oleksandr Hoshtanar, Igor Kravets
  • Patent number: 10274590
    Abstract: Techniques describe structures and methods for generating larger output signals and improving image quality of ultrasonic sensors by inclusion of an acoustic cavity in the sensor stack. In some embodiments, an ultrasonic sensor unit may be tuned during manufacturing or during a provisioning phase to work with different thicknesses and materials. In some embodiments, a standing wave signal may be generated using an acoustic cavity in the ultrasonic sensor unit for capturing an ultrasonic image of an object placed on a sensor surface. In some implementations, the ultrasonic sensor may include an ultrasonic transmitter, a piezoelectric receiver, a thin film transistor (TFT) layer and a TFT substrate positioned between the transmitter and the receiver, one or more adhesive layers, and optional cover materials and coatings. The thickness, density and speed of sound of the sensor materials and associated adhesive attachment layers may be used to attain the desired acoustic cavity and improved performance.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: April 30, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Nai-Kuei Kuo, Kostadin Dimitrov Djordjev, Ranjith Ranganathan, Nao Sugawara Chuei, Ashish Hinger, David William Burns
  • Patent number: 10273146
    Abstract: A micromechanical component is provided, the micromechanical component enclosing a cavity, the micromechanical component including a sensor element situated in the cavity, and the micromechanical component including a getter situated in the cavity. The micromechanical component includes a structure, situated between the sensor element and the getter, which is designed in such a way that a particle that is desorbed by the getter is sorbed onto and/or into an area of the micromechanical component that is spaced apart from the sensor element.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: April 30, 2019
    Assignee: ROBERT BOSCH GMBH
    Inventors: Sebastian Guenther, Tobias Sebastian Frey
  • Patent number: 10273140
    Abstract: A substrate structure for a micro electro mechanical system (MEMS) device, a semiconductor structure and a method for fabricating the same are provided. In various embodiments, the substrate structure for the MEMS device includes a substrate, the MEMS device, and an anti-stiction layer. The MEMS device is over the substrate. The anti-stiction layer is on a surface of the MEMS device, and includes amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Hsien Chang, Tzu-Heng Wu, Chun-Ren Cheng, Shih-Wei Lin, Jung-Kuo Tu
  • Patent number: 10273147
    Abstract: A MEMS and a method of manufacturing MEMS components are provided. The method includes providing a MEMS wafer stack including a top cap wafer, a MEMS wafer and optionally a bottom cap wafer. The MEMS wafer has MEMS structures patterned therein. The MEMS wafer and the cap wafers include insulated conducting channels forming insulated conducting pathways extending within the wafer stack. The wafer stack is bonded to an integrated circuit wafer having electrical contacts on its top side, such that the insulated conducting pathways extend from the integrated circuit wafer to the outer side of the top cap wafer. Electrical contacts on the outer side of the top cap wafer are formed and are electrically connected to the respective insulated conducting channels of the top cap wafer. The MEMS wafer stack and the integrated circuit wafer are then diced into components having respective sealed chambers and MEMS structures housed therein.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: April 30, 2019
    Assignee: Motion Engine Inc.
    Inventor: Robert Mark Boysel
  • Patent number: 10266395
    Abstract: A semiconductive structure includes a first substrate including a first surface and a second surface opposite to the first surface, a second substrate disposed over the first surface and including a first device and a second device, a first capping structure disposed over the second substrate, and including a via extending through the first capping structure to the second device, a first cavity surrounding the first device and defined by the first capping structure and the first substrate, a second cavity surrounding the second device and defined by the first capping structure and the first substrate, and a second capping structure disposed over the first capping structure and covering the via, wherein the second cavity and the via are sealed by the second capping structure.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yen-Cheng Liu, Hsin-Ting Huang, Shang-Ying Tsai, Kuei-Sung Chang
  • Patent number: 10266396
    Abstract: The present disclosure provides a semiconductor device, which includes a first substrate comprising an upper surface and a second substrate disposed over the first substrate. The semiconductor device also includes a first electrode disposed in the second substrate and configured to move in a direction substantially parallel to the upper surface in response to a pressure difference, and a second electrode disposed in the second substrate. The second electrode is configured to provide a capacitance in conjunction with the first electrode.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ching-Kai Shen, Wen-Chuan Tai, Chia-Ming Hung, Hsiang-Fu Chen, Jung-Huei Peng, Chun-Wen Cheng
  • Patent number: 10250998
    Abstract: A Micro-Electro-Mechanical Systems (MEMS) device includes a substrate, a dielectric supporting layer, a diaphragm, a backplate. The substrate has a substrate opening corresponding to a diaphragm region. The dielectric supporting layer is disposed on the substrate, having a dielectric opening corresponding to the substrate opening to form the diaphragm region. The diaphragm within the dielectric opening is held by the dielectric supporting layer at a periphery. The backplate is disposed on the dielectric supporting layer, having a plurality of venting holes, connecting to the dielectric opening. The backplate includes a conductive layer and a passivation layer covering over the conductive layer at a first side opposite to the diaphragm, wherein a second side of the conductive layer is facing to the diaphragm and not covered by the passivation layer.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: April 2, 2019
    Assignee: Solid State Systems Co., Ltd.
    Inventors: Tsung-Min Hsieh, Chien-Hsing Lee, Cheng-Wei Tsai
  • Patent number: 10240957
    Abstract: A thermal airflow sensor includes a semiconductor device, a protective film a bonding wire, and a resin. The resin covers over a part of the semiconductor device so that the bonding wire is covered with the resin and the region including a thin-wall portion is exposed. The protective film is not covered with the resin and has an outer peripheral edge located outside the thin-wall portion.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: March 26, 2019
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Ryosuke Doi, Hiroshi Nakano, Keiji Hanzawa
  • Patent number: 10227231
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die, a multilayer redistribution structure, a first mold compound, and a second mold compound. The first thinned die resides over a top surface of the multilayer redistribution structure. The multilayer redistribution structure includes at least one support pad that is on a bottom surface of the multilayer redistribution structure and vertically aligned with the first thinned die. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: March 12, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Merrill Albert Hatcher, Jr., Jonathan Hale Hammond, Jon Chadwick, Julio C. Costa, Jan Edward Vandemeer
  • Patent number: 10217699
    Abstract: A preformed lead frame includes a plurality of lead frame units and intersecting cutting paths extending between two adjacent rows of said lead frame units, and a molding layer. Each of the lead frame units includes a die pad, and a plurality of spaced-apart leads. Each of the cutting paths has a plurality of metallic connecting portions and etched grooves. The molding layer embeds the lead frame units and the connecting portions. Each of the etched grooves is indented from the top surface of the molding layer. A top open end of each of the etched grooves includes two opposite curved edges respectively meeting an adjacent one of the leads of one of the lead frame units and an adjacent one of the leads of the other one of the lead frame units.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: February 26, 2019
    Assignee: Chang Wah Technology Co., Ltd.
    Inventor: Chia-Neng Huang
  • Patent number: 10215988
    Abstract: An optical system for displaying light from a scene includes an active optical component that includes a first plurality of light directing apertures, an optical detector, a processor, a display, and a second plurality of light directing apertures. The first plurality of light directing apertures is positioned to provide an optical input to the optical detector. The optical detector is positioned to receive the optical input and convert the optical input to an electrical signal corresponding to intensity and location data. The processor is connected to receive the data from the optical detector and process the data for the display. The second plurality of light directing apertures is positioned to provide an optical output from the display.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 26, 2019
    Assignee: Marsupial Holdings, Inc.
    Inventors: William P. Parker, Michael A. Strauss, Ian M. Rousseau, Eric M. Gallo
  • Patent number: 10210978
    Abstract: A haptic actuator having a base structure, a beam rotatably attached to the base structure by an axial member, a first coil portion, and a second coil portion is presented. The beam has a first end that includes a first magnet with magnetic poles having a first polarity, and a second end that includes a second magnet with magnetic poles having a second, opposite polarity. The first coil portion and the second coil portion are configured to generate magnetic field lines. The magnetic poles of the first magnet and the magnetic poles of the second magnet are aligned to be parallel with a central axis of the first coil portion or the second coil portion when the beam is in an equilibrium position. The beam is configured to rotate via the axial member in response to electrical current being passed through the first coil portion or the second coil portion.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: February 19, 2019
    Assignee: IMMERSION CORPORATION
    Inventors: Vahid Khoshkava, Mansoor Alghooneh, Mohammadreza Motamedi
  • Patent number: 10211128
    Abstract: An electronic device structure includes a leadframe with a die pad and a lead. A semiconductor die is mounted adjacent to the die pad. A clip having a clip tail section is attached to the lead. The clip further has a clip top section attached to the clip tail section, and the clip top section is attached to a die top side of the semiconductor die with a conductive material. The clip further has an opening disposed to extend through the clip top section. In one embodiment, after a reflow step the conductive material forms a conductive fillet at least partially covering sidewall surfaces of the opening, and has a height within the opening with respect to a bottom surface of the clip top section. The opening and the conductive fillet provide an improved approach to monitoring coverage of the conductive material between the clip top section and the die top side of the semiconductor die.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: February 19, 2019
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventor: Marc Alan Mangrum
  • Patent number: 10204855
    Abstract: Generally discussed herein are systems and methods that can include a stretchable and bendable device. According to an example a method can include (1) depositing a first elastomer material on a panel, (2) laminating trace material on the elastomer material, (3) processing the trace material to pattern the trace material into one or more traces and one or more bond pads, (4) attaching a die to the one or more bond pads, or (5) depositing a second elastomer material on and around the one or more traces, the bonds pads, and the die to encapsulate the one or more traces and the one or more bond pads in the first and second elastomer materials.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: February 12, 2019
    Assignee: Intel Corporation
    Inventors: Alejandro Levander, Tatyana Andryushchenko, David Staines, Mauro Kobrinsky, Aleksandar Aleksov, Dilan Seneviratne, Javier Soto Gonzalez, Srinivas Pietambaram, Rafiqul Islam
  • Patent number: 10202275
    Abstract: A process for manufacturing an integrated semiconductor device, envisages: forming a MEMS structure; forming an ASIC electronic circuit; and electrically coupling the MEMS structure to the ASIC electronic circuit. The MEMS structure and the ASIC electronic circuit are integrated starting from a same substrate including semiconductor material; wherein the MEMS structure is formed at a first surface of the substrate, and the ASIC electronic circuit is formed at a second surface of the substrate, vertically opposite to the first surface in a direction transverse to a horizontal plane of extension of the first surface and of the second surface.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: February 12, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alessandro Tocchio, Lorenzo Corso
  • Patent number: 10196260
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die, a multilayer redistribution structure, a first mold compound, and a second mold compound. The first thinned die resides over a top surface of the multilayer redistribution structure. The multilayer redistribution structure includes at least one support pad that is on a bottom surface of the multilayer redistribution structure and vertically aligned with the first thinned die. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: February 5, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Merrill Albert Hatcher, Jr., Jonathan Hale Hammond, Jon Chadwick, Julio C. Costa, Jan Edward Vandemeer
  • Patent number: 10192850
    Abstract: First and second contacts are formed on first and second wafers from disparate first and second conductive materials, at least one of which is subject to surface oxidation when exposed to air. A layer of oxide-inhibiting material is disposed over a bonding surface of the first contact and the first and second wafers are positioned relative to one another such that a bonding surface of the second contact is in physical contact with the layer of oxide-inhibiting material. Thereafter, the first and second contacts and the layer of oxide-inhibiting material are heated to a temperature that renders the first and second contacts and the layer of oxide-inhibiting material to liquid phases such that at least the first and second contacts alloy into a eutectic bond.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: January 29, 2019
    Assignee: SiTime Corporation
    Inventors: Paul M. Hagelin, Charles I. Grosjean
  • Patent number: 10187059
    Abstract: A light-emitting touch-switch device includes a first circuit board, a cap unit and a light-emitting element. The first circuit board is electrically coupled to a sensing chip. The cap unit is disposed on the first circuit board and that is at least partially made of an electrically conductive plastic material having a resistance of equal to or smaller than 1×105?. The cap unit and the first circuit board cooperate to define a receiving space. The light-emitting element is disposed in the receiving space and is electrically coupled to the first circuit board. A light-emitting touch-switch module including the light-emitting touch-switch device is also disclosed.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: January 22, 2019
    Assignees: Lite-On Opto Technology (Changzhou) Co., Ltd., Lite-On Technology Corp.
    Inventors: Shuo-Hung Chen, Chin-Kuan Lin
  • Patent number: 10173887
    Abstract: A device with an out-of-plane electrode includes a device layer positioned above a handle layer, a first electrode defined within the device layer, a cap layer having a first cap layer portion spaced apart from an upper surface of the device layer by a gap, and having an etch stop perimeter defining portion defining a lateral edge of the gap, and an out-of-plane electrode defined within the first cap layer portion by a spacer.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: January 8, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Andrew Graham, Gary Yama, Gary O'Brien
  • Patent number: 10177064
    Abstract: The present disclosure relates to an air-cavity package, which includes a substrate, a base, and a semiconductor die. The substrate includes a substrate body, thermal vias extending through the substrate body, and a metal trace on a bottom side of the substrate body and separate from the thermal vias. The base includes a base body, a perimeter wall extending about a perimeter of the base body, and a signal via structure. Herein, the bottom side of the substrate body resides on the perimeter wall to form a cavity, and the signal via structure extends through the perimeter wall and is electrically coupled to the metal trace. The semiconductor die is mounted on the bottom side of the substrate body, exposed to the cavity, and electrically coupled to the metal trace. The thermal vias conduct heat generated from the semiconductor die toward a top side of the substrate body.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: January 8, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Kevin J. Anderson, Anthony Chiu, Tarak A. Railkar
  • Patent number: 10171917
    Abstract: The present invention provides a capacitive microphone including a MEMS microphone. In the microphone, the movable or deflectable membrane/diaphragm moves in a lateral manner relative to the fixed backplate, instead of moving toward/from the fixed backplate. The squeeze film damping is substantially avoided, and the performances of the microphone is significantly improved.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: January 1, 2019
    Assignee: GMEMS Technologies International Limited
    Inventors: Guanghua Wu, Xingshuo Lan
  • Patent number: 10160632
    Abstract: A system and method for forming a sensor device with a buried first electrode includes providing a first silicon portion with an electrode layer and a second silicon portion with a device layer. The first silicon portion and the second silicon portion are adjoined along a common oxide layer formed on the electrode layer of the first silicon portion and the device layer of the second silicon portion. The resulting multi-silicon stack includes a buried lower electrode that is further defined by a buried oxide layer, a highly-doped ion implanted region, or a combination thereof. The multi-silicon stack has a plurality of silicon layers and silicon dioxide layers with electrically isolated regions in each layer allowing for both the lower electrode and an upper electrode. The multi-silicon stack further includes a spacer that enables the lower electrode to be accessible from a topside of the sensor device.
    Type: Grant
    Filed: August 17, 2013
    Date of Patent: December 25, 2018
    Assignee: Robert Bosch GmbH
    Inventors: Andrew Graham, Ando Feyh, Gary O'Brien
  • Patent number: 10160634
    Abstract: Deep via technology is used to construct an integrated silicon cantilever and cavity oriented in a vertical plane which creates an electrostatically-switched MEMS switch in a small wafer area. Another embodiment is a small wafer area electrostatically-switched, vertical-cantilever MEMS switch wherein the switch cavity is etched within a volume defined by walls grown internally within a silicon substrate using through vias.
    Type: Grant
    Filed: July 16, 2017
    Date of Patent: December 25, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Bucknell C. Webb
  • Patent number: 10163945
    Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: December 25, 2018
    Assignee: X-Celeprint Limited
    Inventors: Christopher Bower, Etienne Menard, Matthew Meitl, Joseph Carr
  • Patent number: 10155658
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die, a multilayer redistribution structure, a first mold compound, and a second mold compound. The first thinned die resides over a top surface of the multilayer redistribution structure. The multilayer redistribution structure includes at least one support pad that is on a bottom surface of the multilayer redistribution structure and vertically aligned with the first thinned die. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: December 18, 2018
    Assignee: Qorvo US, Inc.
    Inventors: Merrill Albert Hatcher, Jr., Jonathan Hale Hammond, Jon Chadwick, Julio C. Costa, Jan Edward Vandemeer
  • Patent number: 10150666
    Abstract: A micro-electro-mechanical device formed in a monolithic body of semiconductor material accommodating a first buried cavity; a sensitive region above the first buried cavity; and a second buried cavity extending in the sensitive region. A decoupling trench extends from a first face of the monolithic body as far as the first buried cavity and laterally surrounds the second buried cavity. The decoupling trench separates the sensitive region from a peripheral portion of the monolithic body.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: December 11, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Lorenzo Baldo, Enri Duqi, Flavio Francesco Villa
  • Patent number: 10147906
    Abstract: A high efficacy multi-layer seal structure formed on an organic light emitting diode device and the process for depositing the same. A thin film seal is formed over the substrate having OLED layers, and includes a first metallic layer formed over the substrate, an inorganic layer formed over the first metallic layer, and a second metallic layer formed of the inorganic layer. The metallic layers comprise one or more oxide or nitride layers, each oxide or nitride comprising a metal. The inorganic layer comprises a metal oxide, a metal nitride or a metal oxynitride. The process for forming the multi-layer seal structure includes depositing the first metallic layer over the substrate using atomic layer deposition, depositing the inorganic layer over the first metallic layer using sputtering, and then depositing the second metallic layer over the inorganic layer using atomic layer deposition.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: December 4, 2018
    Assignee: eMagin Corporation
    Inventors: Amalkumar Ghosh, Fridrich Vazan