Abstract: The present disclosure describes a throughput-scalable sensing system. The system includes a plurality of semiconductor dies sharing a common semiconductor substrate and a plurality of transmembrane pore based sensors configured to detect a change of current flow as a result of analyzing biological or chemical samples. Two immediately neighboring transmembrane pore based sensors are arranged on respective two semiconductor dies separated by a dicing street. Each transmembrane pore based sensor is arranged on a separate semiconductor die of the plurality of semiconductor dies. At least one transmembrane pore based sensor includes one or more detection electrodes disposed above the common semiconductor substrate and a lipid bilayer disposed above the one or more detection electrodes.

Abstract: An electro-optic module provides electro-optic signal drivers formed upon a semiconductor carrier having electrically conducting traces and passive circuit network filtering elements of electroceramic material with the electro-optic signal drivers being in electrical communication with the passive circuit elements and interface the module within a larger computing or communications system.

Abstract: An imaging system includes a light source that, in operation, emits an emitted light containing a near-infrared light in a first wavelength region, an image sensor, and a double-band pass filter that transmits a visible light in at least a part of a wavelength region out of a visible region and the near-infrared light in the first wavelength region. The image sensor includes light detection cells, a first filter that selectively transmits the near-infrared light in the first wavelength region, second to fourth filters that selectively transmit lights in second to fourth wavelength regions, respectively, which are contained in the visible light, and an infrared absorption filter. The infrared absorption filter faces the second to fourth filters and absorbs the near-infrared light in the first wavelength region.

Abstract: A photodetector includes: a substrate; a first semiconductor region, the first semiconductor region extending into the substrate from a front side of the substrate; and a second semiconductor region, the second semiconductor region further extending into the substrate from a bottom boundary of the first semiconductor region, wherein when the photodetector operates under a Geiger mode, the second semiconductor region is fully depleted to absorb a radiation source received from a back side of the substrate.

Abstract: Disclosed are an optical filter including a near infrared absorption layer on a polymer film. The polymer film has a* of about ?5.0 to about +5.0 and b* of about ?5.0 to about +5.0 in a color coordinate expressed by a CIE Lab color space. The near infrared absorption layer may be configured to transmit light in a visible region and to selectively absorb at least one part of light in a near infrared region. The near infrared absorption layer includes a first near infrared absorption material including a copper phosphate ester compound and a second near infrared absorption material including at least two different organic dyes. The second near infrared absorption material has a maximum absorption wavelength (?max) in a wavelength region of about 650 nm to about 1200 nm. An electronic device may include the optical filter.

Abstract: A method includes depositing a first reflective layer over a substrate. A first dielectric layer is deposited over the first reflective layer. A second dielectric layer is deposited over the first dielectric layer. The second dielectric layer, the first dielectric layer, and the first reflective layer are etched to form a grid isolation structure that defines a recess. The recess is filled with a color filter.

Abstract: The present disclosure describes a throughput-scalable photon sensing system. The system includes a plurality of semiconductor dies sharing a common semiconductor substrate and a plurality of photon detection sensors configured to perform a single molecule analysis of biological or chemical samples. Two immediately neighboring photon detection sensors are arranged on respective two semiconductor dies separated by a dicing street. Each photon detection sensor is arranged on a separate semiconductor die. The system further includes a first optical waveguide, a plurality of second optical waveguides disposed above the first optical waveguide, one or more wells disposed in the plurality of second optical waveguides, and one or more light guiding channels.

Abstract: Provided are a slim connector plug capable of transmitting and receiving a large amount of data at an ultra-high speed and implementing a miniaturized and slimmed structure with a thickness of 1 mm while being manufactured at low cost, and an active optical cable (AOC) assembly using the same. The connector plug includes: an optical sub-assembly in which an optical fiber seating groove on which an optical fiber is mounted is formed on one side of the optical sub-assembly and a reflective surface is formed on an inner end of the optical fiber seating groove; an optical element module having an optical engine stacked on the optical sub-assembly and generating an optical signal or receiving an optical signal; and an optical component installed on the reflective surface of the OSA and transmitting the optical signal between the optical fiber and the optical engine.

Abstract: The present disclosure describes the formation of a pad structure in an image sensor device using a sacrificial isolation region and a silicon oxide based stack with no intervening nitride etch-stop layers. The image sensor device includes a semiconductor layer comprising a first horizontal surface opposite to a second horizontal surface; a metallization layer formed on the second horizontal surface of the semiconductor layer, where the metallization layer includes a dielectric layer. The image sensor device also includes a pad region traversing through the semiconductor layer from the first horizontal surface to the second horizontal surface. The pad region includes an oxide layer with no intervening nitride layers formed on the dielectric layer of the metallization layer and a pad structure in physical contact with a conductive structure of the metallization layer.

Abstract: A camera module includes a circuit board; a photosensitive chip located on the circuit board and electrically coupled to the circuit board, a package material body arranged on the circuit board, a support member arranged on one end of the package material body away from the circuit board, and a filter having a first and a second surfaces. The package material body includes a top end bearing surface. The support member includes a support body and an extension structure, and the extension structure includes a bottom surface, the bottom surface is connected to the bearing surface, and the second surface is connected to the bottom surface. The camera module is a three-stage structure of a package material body plus a support member plus a plurality of lenses.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip has an image sensor within a substrate. A first dielectric has an upper surface that extends over a first side of the substrate and over one or more trenches within the first side of the substrate. The one or more trenches laterally surround the image sensor. An internal reflection structure arranged over the upper surface of the first dielectric. The internal reflection structure is configured to reflect radiation exiting from the substrate back into the substrate.

Abstract: Apparatuses and methods for photonic communication and photonic addressing are disclosed herein. An example apparatus includes a plurality of photonic sources, a plurality of memory die, a logic die. Each of the plurality of photonic sources provides a photonic signal of a different wavelength and are provided to a first photonic path. Each memory die of the plurality of memory die includes a photonic modulation circuit coupled to the first photonic path, and further includes a photonic detector circuit coupled to a second photonic path. Each memory die of the plurality of memory die is associated with and addressed by a respective wavelength of a photonic signal. The logic die is coupled to the first and second photonic paths, and includes a plurality of photonic circuits. Each of the photonic circuits of the plurality of photonic circuits is associated with a respective wavelength of a photonic signal.

Abstract: A photodiode includes an active area formed by intrinsic germanium. The active area is located within a cavity formed in a silicon layer. The cavity is defined by opposed side walls which are angled relative to a direction perpendicular to a bottom surface of the silicon layer. The angled side walls support epitaxial growth of the intrinsic germanium with minimal lattice defects.

Abstract: The light receiving element unit includes a first light receiving element having a light receiving region on the main surface side of the first semiconductor substrate and a second light receiving element having a light receiving region on the main surface side of the second semiconductor substrate, and a support substrate having wiring for electrically connecting the first light receiving element and the second light receiving element to the outside, one of the first light receiving element and the second light receiving element has a recess formed in a concave shape from the back surface opposite to the light receiving region toward the light receiving region, and the other is accommodated in the recess.

Abstract: A method for fabricating a throughput-scalable sensing system is disclosed. The method includes receiving a first semiconductor wafer and a second semiconductor wafer. The first semiconductor wafer includes a semiconductor substrate and a plurality of sensors disposed in the semiconductor substrate. Each sensor of the plurality of sensors is disposed in a separate semiconductor die of the first semiconductor wafer. The method further includes bonding the first semiconductor wafer to the second semiconductor wafer and preparing the bonded first semiconductor wafer and the second semiconductor wafer for conductive path redistribution. The method further includes forming one or more redistribution paths and dicing an array of semiconductor dies as a group from the plurality of semiconductor dies. The array of semiconductor dies includes a group of sensors associated with the throughput-scalable sensing system.

Abstract: A semiconductor module for an image-sensing device is disclosed. The semiconductor module may include: a printed circuit board (PCB), a photosensitive member, at least an electric component and a molding component. The PCB may have a first surface, and the photosensitive member and the electric component are positioned on the first surface of the PCB. The molding component may be formed along with the first surface of the PCB, and separate the photosensitive member and the electric component from the ambient environment. The molding component may be in direct contact with the photosensitive member, the electric component and the first surface of the PCB. At least a portion of the molding component may be transparent to allow at last 50% of the incident light to pass through the molding component to reach the photosensitive member.

Abstract: A die heat dissipation structure includes a heat dissipation unit and a die. The heat dissipation unit has a first side and a second side. The second side is formed with a contact section raised from the second side. One end of the contact section has a slightly convex form. The die has an upper surface and a lower surface. One end of the contact section attaches to and is in contact with the upper surface of the die. The upper surface has a slightly concave form in adaptation to the slightly convex form of the contact section.

Abstract: The present technology relates to a solid state imaging sensor that is possible to suppress the reflection of incident light with a wide wavelength band. A reflectance adjusting layer is provided on the substrate in an incident direction of the incident light with respect to the substrate such as Si and configured to adjust reflection of the incident light on the substrate. The reflectance adjusting layer includes a first layer formed on the substrate and a second layer formed on the first layer. The first layer includes a concavo-convex structure provided on the substrate and a material which is filled into a concave portion of the concavo-convex structure and has a refractive index lower than that of the substrate, and the second layer includes a material having a refractive index lower than that of the first layer. It is possible to reduce the reflection on the substrate such as Si by using the principle of the interference of the thin film. Such a technology can be applied to solid state imaging sensors.

Abstract: A photo diode includes a pixel unit, a photo conversion layer, and a dielectric layer. The pixel unit includes a pair of pixels. The photo conversion layer is above the pixel unit and has a pair of portions, each of which corresponds to a respective one of the pixels. The dielectric layer is between the portions of the photo conversion layer. A method of manufacturing the photo diode is also disclosed.

Abstract: Provided is an infrared absorptive material having a high refractive index layer that has a refractive index of 3.0 or higher for infrared light at any wavelength in the wavelength range of 2 ?m to 50 ?m and has a thickness of 8 nm to 15,000 nm; and a reflective layer positioned on one face of the high refractive index layer.

Abstract: A semiconductor sensor includes a detector chip that detects green light and an interference filter that optically precedes the detector chip and is permeable to green light and impermeable and reflective to red light and near-infrared radiation. A color filter optically precedes the interference filter. The color filter has a transparency of at least 60% for green light and has an absorbing effect for red light and near-infrared radiation. The semiconductor sensor appears gray or black in the region of the interference filter independently of the angle.

Abstract: Techniques disclosed herein relate generally to integrating photonic integrated circuits and electronic integrated circuits in a same package. A device includes a semiconductor substrate and a die stack on the semiconductor substrate. The die stack includes a photonic integrated circuit (PIC) die and an electronic integrated circuit (EIC) die. The PIC die includes a PIC substrate and a photonic integrated circuit formed on the PIC substrate. The EIC die includes an EIC substrate and an electronic integrated circuit formed on the EIC substrate. The EIC die and the PIC die are bonded such that the PIC substrate and the EIC substrate are disposed on opposing sides of the die stack. The PIC substrate is bonded to the semiconductor substrate. The device also includes a cooling plate bonded to the EIC substrate.

Abstract: A manufacturing method of an image sensing device includes the following steps. A substrate is provided. At least one image sensing unit is disposed in the substrate. A passivation layer is formed on the substrate. An auxiliary layer is formed on the passivation layer. A material composition of the auxiliary layer is different from a material composition of the passivation layer. An annealing process is performed to the substrate and the passivation layer. The passivation layer is covered by the auxiliary layer during the annealing process. The auxiliary layer is removed after the annealing process. The ability to constrain and/or passivate free charge in and/or near the passivation layer may be enhanced by performing the annealing process with the auxiliary layer covering the passivation layer. The electrical performance of the image sensing device may be improved accordingly.

Abstract: An image sensor device is disclosed. The image sensor device includes: a substrate having a front surface and a back surface; a radiation-sensing region formed in the substrate; an opening extending from the back surface of the substrate into the substrate; a first metal oxide film including a first metal, the first metal oxide film being formed on an interior surface of the opening; and a second metal oxide film including a second metal, the second metal oxide film being formed over the first metal oxide film; wherein the electronegativity of the first metal is greater than the electronegativity of the second metal. An associated fabricating method is also disclosed.

Abstract: An integrated circuit that includes a substrate, a photodiode, and a Fresnel structure. The photodiode is formed on the substrate, and it has a p-n junction. The Fresnel structure is formed above the photodiode, and it defines a focal zone that is positioned within a proximity of the p-n junction. In one aspect, the Fresnel structure may include a trench pattern that functions as a diffraction means for redirecting and concentrating incident photons to the focal zone. In another aspect, the Fresnel structure may include a wiring pattern that functions as a diffraction means for redirecting and concentrating incident photons to the focal zone. In yet another aspect, the Fresnel structure may include a transparent dielectric pattern that functions as a refractive means for redirecting and concentrating incident photons to the focal zone.

Abstract: A radiation imaging apparatus includes a sensor base, a sensor array that includes a plurality of sensor chips arranged in an array, and in which three or more sensor chips out of the plurality of sensor chips are arranged in one row of the sensor array, a scintillator positioned on a side opposite to the sensor base with respect to the sensor array, a bonding member that bonds the sensor array and the scintillator, and a plurality of bonding sheets that are separated from each other and bond the sensor base and the plurality of sensor chips. Two adjacent sensor chips out of the three or more sensor chips are bonded to the sensor base using separate bonding sheets out of the plurality of bonding sheets.

Abstract: A high degree of phase difference detection accuracy can be obtained using a phase difference pixel with a simpler configuration. A solid-state image-capturing device includes a pixel array unit in which a plurality of pixels including a phase difference pixel which is a pixel for focal point detection and an image-capturing pixel which is a pixel for image generation are arranged in a two-dimensional array. In this case, a predetermined layer between a light shielding layer and a micro lens formed in the image-capturing pixel has a higher refraction index than a refraction index of the predetermined layer formed in the phase difference pixel. The technique of the present disclosure can be applied to, for example, a back-illuminated-type solid-state image-capturing device and the like.

Abstract: The problem of reducing noise in image sensing devices, especially NIR detectors, is solved by providing ground connections for the reflectors. The reflectors may be grounded through vias that couple the reflectors to grounded areas of the substrate. The grounded areas of the substrate may be P+ doped areas formed proximate the surface of the substrate. In particular, the P+ doped areas may be parts of photodiodes. Alternatively, the reflectors may be grounded through a metal interconnect structure formed over the front side of the substrate.

Abstract: An image sensor device is provided. The image sensor device includes a substrate having a front surface, a back surface, and a light-sensing region. The image sensor device includes a first isolation structure extending from the front surface into the substrate. The first isolation structure includes a first insulating layer and an etch stop layer, the first insulating layer extends from the front surface into the substrate, the etch stop layer is between the first insulating layer and the substrate, and the etch stop layer, the first insulating layer, and the substrate are made of different materials. The image sensor device includes a second isolation structure extending from the back surface into the substrate. The second isolation structure is in direct contact with the etch stop layer, the second isolation structure surrounds the light-sensing region, and the second isolation structure includes a light-blocking structure.

Abstract: The present technology relates to a solid-state imaging device and an electronic apparatus capable of improving the accuracy of phase difference detection while suppressing degradation of a picked-up image. There is provided a solid-state imaging device including: a pixel array unit, a plurality of pixels being two-dimensionally arranged in the pixel array unit, a plurality of photoelectric conversion devices being formed with respect to one on-chip lens in each of the plurality of pixels, a part of at least one of an inter-pixel separation unit formed between the plurality of pixels and an inter-pixel light blocking unit formed between the plurality of pixels protruding toward a center of the corresponding pixel in a projecting shape to form a projection portion. The present technology is applicable to, for example, a CMOS image sensor including a pixel for detecting the phase difference.

Abstract: Disclosed are a near-infrared absorbing film including a polymer film, a first near-infrared absorbing layer and a second near-infrared absorbing layer on the polymer film. The first near-infrared absorbing layer may be configured to transmit light in a visible region and to selectively absorb at least one part of light in a near-infrared region. The second near-infrared absorbing layer may be disposed on a surface of the first near-infrared absorbing layer. The first near-infrared absorbing layer may include a dye represented by Chemical Formula 1. The second near-infrared absorbing layer may include a copper complex compound. An optical filter may include the near-infrared absorbing film. An electronic device may include the optical filter. In Chemical Formula 1, R1 to R12 are described in the detailed description.

Abstract: Techniques (e.g., implemented in devices, methods and/or in non-transitory storage units) are used for confining wavelengths, e.g., using a pillar photonic crystal. A semiconductor device includes a pillar photonic crystal including a structure and a plurality of pillars extending from the structure in a height direction, wherein the plurality of pillars form at least one waveguide for electromagnetic radiation at a specific wavelength, the at least one waveguide extending in at least one planar direction, wherein the structure includes a confining layer in doped semiconductor material to support propagation of surface plasmon polaritons.

Abstract: In a TSC structure, a first dielectric layer is formed over a first main surface of a substrate. The substrate includes an opposing second main surface. A TSC is formed in the first dielectric layer and the substrate so that the TSC passes through the first dielectric layer and extends into the substrate. A conductive plate is formed over the first dielectric layer and electrically coupled with the TSC. An isolation trench is formed in the substrate to surround the conductive plate and spaced apart from the conductive plate. A second dielectric layer is formed on the second main surface of the substrate. A first plurality of vias are formed in the second dielectric layer that extend into the substrate and are connected to the TSC. A second plurality of vias are formed in the second dielectric layer that extend into the substrate and are not connected to the TSC.

Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.

Abstract: A semiconductor structure includes a substrate, a barrier layer disposed over the substrate, a grid disposed over the barrier layer, and a first color filter disposed over the barrier layer. The semiconductor structure also includes a second color filter disposed over the substrate and laterally surrounded by and contacting the grid. The semiconductor structure further includes a dielectric layer disposed between the barrier layer and the substrate. The barrier layer includes an upper surface overlapping the grid and the first color filter and a bottom surface substantially level with a bottom surface of the second color filter. The dielectric layer includes a first portion overlapping a bottom surface of the first color filter and a second portion overlapping a bottom surface of the second color filter, wherein non-visible light is allowed to pass from the second color filter to the substrate through the second portion of the dielectric layer.

Abstract: A method for manufacturing light-shielded cameras includes forming a plurality of camera dies by dicing a camera wafer stack including (a) an image sensor wafer having a plurality of image sensors, (b) a cover glass bonded to the image sensor wafer, and (c) a lens wafer bonded to the cover glass and having a plurality of lenses, to form a plurality of camera dies. The method further includes, prior to the step of dicing, (i) from a first side of the image sensor wafer facing away from the cover glass and at least partly covered by an opaque layer, pre-cutting a sensor-cover wafer stack that includes the image sensor wafer and the cover glass, and (ii) depositing an opaque material in the pre-cuts. The method also includes, after the step of dicing, applying an opaque coating to second-side surfaces, of the camera dies, formed by the step of dicing.

Abstract: Provided is an image pickup device, including: a first trench provided between a plurality of pixels in a light-receiving region of a semiconductor substrate, the semiconductor substrate including the light-receiving region and a peripheral region, the light-receiving region being provided with the plurality of pixels each including a photoelectric conversion section; and a second trench provided in the peripheral region of the semiconductor substrate, wherein the semiconductor substrate has a variation in thickness between a portion where the first trench is provided and a portion where the second trench is provided.

Abstract: Methods, systems, and apparatus for implementing a unitary quantum gate on one or more qubits. In one aspect, a method includes the actions designing a control pulse for the unitary quantum gate, comprising: defining a universal quantum control cost function, wherein the control cost function comprises a qubit leakage penalty term representing i) coherent qubit leakage, and ii) incoherent qubit leakage across all frequency components during a time dependent Hamiltonian evolution that realizes the unitary quantum gate; adjusting parameters of the time dependent Hamiltonian evolution to vary a control cost according to the control cost function such that leakage errors are reduced; generating the control pulse using the adjusted parameters; and applying the control pulse to the one or more qubits to implement the unitary quantum gate.

Abstract: Provided are a single-fiber bidirectional multimode WDM optical-to-electrical converter and a fabrication method thereof. The converter includes: a PCBA, a deflection lens module, a WDM module, and a second collimation lens. The PCBA has an electrical connector, an optical fiber connector, first positioning portions, a plurality of lasers, and a plurality of photodiodes. The deflection lens module has a light incident surface, a reflecting surface, a light emergent surface, and first fitting portions. The deflection lens module is mounted on the PCBA through engagement of the first fitting portions and the first positioning portions, and a plurality of first collimation lenses is aligned with the plurality of lasers and the plurality of photodiodes. The fabrication method includes: mounting lasers and photodiodes on a PCB with respect to first positioning portions on the PCB; and mounting a deflection lens module on the PCB through the first positioning portions.

Abstract: A semiconductor device may include first and second sub chips stacked sequentially and a through contact electrically connecting the first and second sub chips to each other. Each of the first and second sub chips may include a substrate and a plurality of interconnection lines, which are interposed between the substrates. The interconnection lines of the second sub chip may include first and second interconnection lines having first and second openings, respectively, which are horizontally offset from each other. The through contact may be extended from the substrate of the second sub chip toward the first sub chip and may include an auxiliary contact, which is extended toward the first sub chip through the first and second openings and has a bottom surface higher than a top surface of the uppermost one of the interconnection lines of the first sub chip.

Abstract: The present disclosure relates to a solid-state imaging element, a manufacturing method, and an electronic device capable of further improving quality. A flattening film is formed so as to fill a recessed portion of a semiconductor substrate having a pixel region in which a plurality of pixels is arranged in an array, a recessed region is formed in the flattening film by hollowing out a region corresponding to the pixel region, and a color filter layer is formed in the recessed region. In addition, an on-chip lens layer is formed on a plane including the flattening film and the color filter layer. The present technology is applicable, for example, to a CMOS image sensor.

Abstract: A semiconductor device and a manufacturing method thereof are disclosed. In which a first opening and a second opening are vertically separated, and are no longer restricted by the condition that a deep upper opening needs to be filled with a thick photoresist when a TSV nested hole in vertical communication forms a middle opening and lower opening, thereby satisfying devices with different thicknesses requirements. The design is no longer restricted by the lateral process of the TSV nested hole, thereby enhancing the flexibility of the design. In the photolithography process, the deep hole does not need to be filled with the photoresist, the photoresist does not need to be thick, thereby reducing the complexity of the photolithography process and improving the exposure effect. The first metal layer and the second metal layer are directly led out via a first trench, thereby simplifying the process and reducing the production cost.

Abstract: Provided is a semiconductor device including: a multilayer substrate including an optical element; a light-transmitting plate provided on the substrate to cover the optical element; and a lens of an inorganic material provided between the substrate and the light-transmitting plate. A structure having a same strength as a strength per unit area of the lens is provided at a portion outside an effective photosensitive region where the optical element is formed, when the substrate is viewed in plan.

Abstract: A image sensor includes a first integrated circuit layer including pixel sensors that are grouped based on position into pixel sensor groups, a second integrated circuit layer in electrical communication with the first integrated circuit layer, the second integrated circuit layer including image processing circuitry groups that are configured to each receive pixel information from a corresponding pixel sensor group, the image processing circuitry groups further configured to perform image processing operations on the pixel information to provide processed pixel information during operation of the image sensor, a third integrated circuit layer in electrical communication with the second integrated circuit layer, and the third integrated circuit layer including neural network circuitry groups that are configured to each receive the processed pixel information from a corresponding image processing circuitry group and perform analysis for object detection on the processed pixel information during operation of the

Abstract: A light emitting device package can include a package body; a light emitting device disposed on the package body and including first and second electrode pads on a bottom surface of the light emitting device; a first through hole in the package body; a second through hole in the package body, in which the first through hole is separated from the second through hole, the first electrode pad of the light emitting device directly overlaps with the first through hole in the package body, and the second electrode pad of the light emitting device directly overlaps with the second through hole in the package body.

Abstract: An image sensor includes a semiconductor substrate having first and second surfaces facing each other and a first device isolation layer provided in the semiconductor substrate. The first device isolation layer defines pixel regions of the semiconductor substrate and includes first and second portions crossing each other. The first and second portions are provided to surround one of the pixel regions, and the first portion is provided to extend from the first surface of the semiconductor substrate toward the second surface and to have a structure inclined relative to the first surface.

Abstract: Image sensors and methods of manufacturing image sensors are provided herein. In an embodiment, a method of manufacturing an image sensor includes forming a structure having a front side and a back side. The structure includes a semiconductor layer extending between the front side and the back side of the structure, and a capacitive insulation wall extending through the semiconductor layer between the front side and the back side of the structure. The capacitive insulation wall includes first and second insulating walls separated by a region of a conductive or semiconductor material. The method further includes selectively etching, from the back side of the structure, portions of the semiconductor layer and the region of conductive or semiconductor material, while retaining adjacent portions of the first and second insulating walls.

Abstract: A method of fabricating self-aligned grids in a BSI image sensor is provided. The method includes depositing a first dielectric layer over a back surface of a substrate that has a plurality of photodiodes formed therein, forming a grid of trenches, and filling in the trenches with dielectric material to create a trench isolation grid. Here, a trench passes through the first dielectric layer and extends into the substrate. The method further includes etching back dielectric material in the trenches to a level that is below an upper surface of the first dielectric layer to form recesses overlaying the trench isolation grid, and filling in the recesses with metallic material to create a metallic grid that is aligned with the trench isolation grid.

Abstract: An object is to improve reliability of a light-emitting device. A light-emitting device has a driver circuit portion including a transistor for a driver circuit and a pixel portion including a transistor for a pixel over one substrate. The transistor for the driver circuit and the transistor for the pixel are inverted staggered transistors each including an oxide semiconductor layer in contact with part of an oxide insulating layer. In the pixel portion, a color filter layer and a light-emitting element are provided over the oxide insulating layer. In the transistor for the driver circuit, a conductive layer overlapping with a gate electrode layer and the oxide semiconductor layer is provided over the oxide insulating layer. The gate electrode layer, a source electrode layer, and a drain electrode layer are formed using metal conductive films.

Abstract: In some embodiments, the present disclosure relates to a method of forming a multi-dimensional integrated chip. The method includes forming a first plurality of interconnect layers within a first dielectric structure on a front-side of a first substrate and forming a second plurality of interconnect layers within a second dielectric structure on a front-side of a second substrate. A first redistribution layer coupled to the first plurality of interconnect layers is bonded to a second redistribution layer coupled to the second plurality of interconnect layers along an interface. A recess is formed within a back-side of the second substrate and over the second plurality of interconnect layers. A bond pad is formed within the recess. The bond pad is laterally separated from the first redistribution layer by a non-zero distance.